Benjamin Doron 9ee1b82db4 soc/intel/skylake: Use correct NHLT_PDM_DEV definition ... According to the NHLT specification[1], PDM_DEV is defined as "1" on Kabylake based platforms. coreboot currently sets it to "0" on all platforms. Add an entry to the enum and use it to define NHLT_PDM_DEV for Kabylake. "Device Type" will resume from "2" on all platforms, but entries are currently reserved. Tested on an Acer Aspire VN7-572G (Skylake-U), which has a 1ch array DMIC, on Windows 10. 1. https://01.org/sites/default/files/595976_intel_sst_nhlt.pdf Change-Id: Ifbc67228c9e7af7db5154d597ca8d67860cfd2ed Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45010 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-11-24 09:42:14 +00:00
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amd	mb/google/zork: correct USB2 phy TXVREFTUNE0 parameter name	2020-11-23 16:44:59 +00:00
cavium
example	x86: Add a minimal example SoC along with a board	2020-10-30 21:34:18 +00:00
intel	soc/intel/skylake: Use correct NHLT_PDM_DEV definition	2020-11-24 09:42:14 +00:00
mediatek	mediatek/mt8192: memlayout: Add DRAM DMA region	2020-11-20 08:40:58 +00:00
nvidia	soc/nvidia/tegra124/include/soc/clk_rst.h: Remove extra tab	2020-11-09 10:31:32 +00:00
qualcomm	src: Add missing 'include <console/console.h>'	2020-11-17 09:50:24 +00:00
rockchip	src: Change bare 'unsigned' to 'unsigned int'	2020-11-16 11:03:16 +00:00
samsung	src/soc/samsung: Move common headers to "common/include/soc"	2020-10-19 07:11:32 +00:00
sifive
ti	soc/ti/am335x: Fix timer implementation	2020-11-22 22:32:46 +00:00
ucb