Arthur Heymans aa990e9289 sb/intel/i82801jx: Move early sb init to a common place ... Setting southbridge GPIO is now done after console init, which should be fine. This code is partially copied from i82801ix. Change-Id: I51dd30de4a82898b0f1d8c4308e8de4a00d1b7aa Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36756 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2019-11-14 11:30:21 +00:00
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acpi	sb/intel: Use defined CONFIG_HPET_ADDRESS	2019-11-04 13:19:42 +00:00
bootblock.c	sb/intel/i82801jx: Enable upper 128bytes of CMOS	2019-11-13 09:22:50 +00:00
chip.h	sb/intel/i82801jx: Add common code for LPC decode	2019-11-12 18:23:07 +00:00
early_init.c	sb/intel/i82801jx: Move early sb init to a common place	2019-11-14 11:30:21 +00:00
early_smbus.c	src/southbridge: change "unsigned" to "unsigned int"	2019-10-30 11:16:56 +00:00
hdaudio.c	southbridge/intel: Tidy up preprocessor and headers	2019-08-21 07:00:45 +00:00
i82801jx.c	southbridge/intel: Tidy up preprocessor and headers	2019-08-21 07:00:45 +00:00
i82801jx.h	sb/intel/i82801jx: Move early sb init to a common place	2019-11-14 11:30:21 +00:00
Kconfig	sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol	2019-11-10 22:40:49 +00:00
lpc.c	sb/intel/i82801gx,ix,jx: Move HAVE_SMI_HANDLER conditional	2019-11-13 21:15:13 +00:00
Makefile.inc	sb/intel/i82801jx: Add common code for LPC decode	2019-11-12 18:23:07 +00:00
nvs.h	sb/intel/i82801jx/nvs.h: include required header	2019-11-04 11:35:35 +00:00
pci.c	sb/intel/{i82801g/i/j,bd82x6x}: Make use of generic set_subsystem()	2019-03-25 10:59:11 +00:00
pcie.c	intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROL	2019-10-01 01:54:08 +00:00
sata.c	southbridge/intel: Tidy up preprocessor and headers	2019-08-21 07:00:45 +00:00
smbus.c	{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()	2019-03-21 16:18:05 +00:00
smihandler.c	arch/io.h: Drop unnecessary include	2019-03-04 15:08:03 +00:00
thermal.c	{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()	2019-03-21 16:18:05 +00:00
usb_ehci.c	src/southbridge: change "unsigned" to "unsigned int"	2019-10-30 11:16:56 +00:00