Matt DeVillier bd6bdc5c1d soc/baytrail: hook up smmstore ... Adapted from implementation in sb/intel/common. Test: build/boot variants of google/rambi with Tianocore and SMMSTORE enabled Change-Id: Id8adeda982feba1cbcf5e04cf0bef0a6710ad4f0 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39190 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>		2020-03-03 10:11:42 +00:00
..
acpi	treewide: Capitalize 'CMOS'	2020-02-24 14:10:00 +00:00
bootblock	bootblock: Provide some common prototypes	2019-12-14 14:08:57 +00:00
include/soc	src: Remove unused 'include <arch/cpu.h>'	2019-12-19 05:58:50 +00:00
romstage	sb/intel/common: Declare common smbus_base() and enable_smbus()	2020-01-14 18:18:26 +00:00
acpi.c	src: Remove unused include <string.h>	2019-12-26 10:45:37 +00:00
chip.c
chip.h
cpu.c	src/soc/intel: Remove unused <stdlib.h>	2019-12-19 05:41:08 +00:00
dptf.c
ehci.c
elog.c
emmc.c
gfx.c	src/soc/intel: Remove unused <stdlib.h>	2019-12-19 05:41:08 +00:00
gpio.c
hda.c
iosf.c
Kconfig	soc/intel/baytrail: Add SOUTHBRIDGE_INTEL_COMMON_SMBUS	2020-01-14 18:16:48 +00:00
lpe.c
lpss.c
Makefile.inc	soc/intel/baytrail: Move to C_ENVIRONMENT_BOOTBLOCK	2019-11-29 17:34:12 +00:00
memmap.c	lib/cbmem_top: Add a common cbmem_top implementation	2019-11-01 11:44:51 +00:00
northcluster.c
pcie.c
perf_power.c
placeholders.c
pmutil.c	arch/x86: Replace some __SMM__ guards	2019-11-09 11:03:03 +00:00
ramstage.c	src/soc/intel: Remove unused <stdlib.h>	2019-12-19 05:41:08 +00:00
refcode.c
sata.c
scc.c
sd.c
smihandler.c	soc/baytrail: hook up smmstore	2020-03-03 10:11:42 +00:00
smm.c	ELOG, soc/intel: Avoid some preprocessor use	2019-11-08 07:51:18 +00:00
southcluster.c	src: Remove unused 'include <arch/cpu.h>'	2019-12-19 05:58:50 +00:00
tsc_freq.c
xhci.c