Angel Pons d0f971fe9a nb/intel/haswell: Decouple mainboard USB config from MRC ... With this change, only raminit.c uses pei_data.h definitions. With MRC cornered, making it optional is just a matter of writing a replacement. USB config definitions will be moved to Lynx Point code in a follow-up. Tested on Asrock B85M Pro4, still boots and still resumes from S3. Change-Id: I4bc405213e9b0828d9ced18677335533c7dd381d Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51440 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>		2021-03-25 07:51:38 +00:00
..
acpi
variants	nb/intel/haswell: Decouple mainboard USB config from MRC	2021-03-25 07:51:38 +00:00
acpi_tables.c	ACPI: Select ACPI_SOC_NVS only where suitable	2021-01-18 07:21:34 +00:00
board_info.txt
chromeos.c
chromeos.fmd
cmos.layout	mb/**/cmos.layout: Drop copy-pasted SNB entries on non-SNB	2020-11-24 17:47:15 +00:00
data.vbt
devicetree.cb	cpu/intel/haswell: Factor out ACPI C-state values	2021-01-15 11:23:23 +00:00
dsdt.asl	ACPI: Move include for <vc/google/chromeos.asl>	2021-01-28 08:59:54 +00:00
ec.c	src: Remove unused 'include <types.h>'	2020-07-14 16:10:17 +00:00
ec.h
gma-mainboard.ads
Kconfig	treewide: rename GENERIC_SPD_BIN to HAVE_SPD_BIN_IN_CBFS	2020-09-23 09:00:47 +00:00
Kconfig.name
mainboard.c	mb/google: Drop unneeded empty lines	2020-09-22 17:14:10 +00:00
Makefile.inc	arch/x86: Use wildcard for mb/smihandler.c	2021-01-24 21:06:22 +00:00
onboard.h
romstage.c	nb/intel/haswell: Consolidate memory-down SPD handling	2021-03-19 11:20:06 +00:00
smihandler.c	ACPI: Select ACPI_SOC_NVS only where suitable	2021-01-18 07:21:34 +00:00
thermal.h
variant.h	nb/intel/haswell: Consolidate memory-down SPD handling	2021-03-19 11:20:06 +00:00