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coreboot-kgpe-d16/src/soc/intel/apollolake
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Furquan Shaikh c681409a8a soc/intel/apollolake: Correct PCI write size in romstage 
1. PCI command reg write should be 16-bit.
2. HPTC reg write should be 8-bit. Also, use macros instead of
hard-coded values. Currently, the macros are defined in romstage.c,
but if more P2SB macros are added, it would be good to move them to a
separate header file.

Change-Id: Iad1eb6a95467a41ecf454092808d357425c4c2fc
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/14613
Tested-by: build bot (Jenkins)
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
2016-05-06 06:52:28 +02:00
..
acpi soc/intel/apollolake: Add handling of GNVS ACPI entry for CHROMEOS builds 2016-04-28 05:47:30 +02:00
bootblock soc/intel/apollolake: clarify Fast SPI CS2 pad configuration 2016-04-29 19:49:09 +02:00
include/soc soc/apollolake: Prevent PMC BAR reassignment during resource allocation 2016-04-30 02:34:29 +02:00
acpi.c soc/intel/apollolake: Add handling of GNVS ACPI entry for CHROMEOS builds 2016-04-28 05:47:30 +02:00
car.c soc/intel/apollolake: Flush L1D to L2 only if loaded segment is in CAR 2016-04-22 17:27:34 +02:00
chip.c soc/intel/apollolake: Add handling of GNVS ACPI entry for CHROMEOS builds 2016-04-28 05:47:30 +02:00
chip.h soc/intel/apollolake: Enable LPC bus interface 2016-04-28 05:38:34 +02:00
cpu.c cpu/x86/mp_init: remove unused callback arguments 2016-05-02 20:07:25 +02:00
exit_car.S soc/intel/apollolake: utilize postcar phase/stage 2016-03-23 14:24:44 +01:00
gpio.c soc/intel: Update license headers 2016-04-14 16:54:33 +02:00
Kconfig soc/intel/apollolake: clarify Fast SPI CS2 pad configuration 2016-04-29 19:49:09 +02:00
lpc.c soc/intel/apollolake: Add handling of GNVS ACPI entry for CHROMEOS builds 2016-04-28 05:47:30 +02:00
Makefile.inc soc/apollolake: Prevent PMC BAR reassignment during resource allocation 2016-04-30 02:34:29 +02:00
memmap.c soc/intel: Update license headers 2016-04-14 16:54:33 +02:00
mmap_boot.c soc/intel: Update license headers 2016-04-14 16:54:33 +02:00
northbridge.c soc/intel/apollolake: Avoid marking 0xe0000-0xfffff region usable 2016-04-28 05:11:11 +02:00
placeholders.c soc/intel: Update license headers 2016-04-14 16:54:33 +02:00
pmc.c soc/apollolake: Prevent PMC BAR reassignment during resource allocation 2016-04-30 02:34:29 +02:00
pmutil.c soc/apollolake: Add helper functions to access Power Management Registers 2016-04-15 16:23:55 +02:00
romstage.c soc/intel/apollolake: Correct PCI write size in romstage 2016-05-06 06:52:28 +02:00
spi.c soc/intel: Update license headers 2016-04-14 16:54:33 +02:00
tsc_freq.c soc/intel: Update license headers 2016-04-14 16:54:33 +02:00
uart.c soc/intel: Update license headers 2016-04-14 16:54:33 +02:00
uart_early.c intel/apollolake: Fix whitespace issues 2016-04-16 01:52:43 +02:00