Ronald G. Minnich da7ee9fa07 These changes incorporate steve goodrich'es fixes, and one bug that is ... disabled. cs5536: add new entires for SB control etc. cs5536.c: chip_enabled function moved to chip_init, so it only gets run once. IRQ setup improved gx2def.h: new defines added vr.h: new file, with new def's for virtual register control. mainboard config.lb: new entries added for nb and sb control. chipsetinit.c: new controls added -- I forget all the details :-) grphinit.c: new function added northbridge.c: new IRQ control added. FlashChipSetup added, controlled by chip info setupflash struct member. Currently, if enabled, this hangs OLPC in linux PCI scan. chip.h: new struct members added for unwanted device enable, flash setup git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2345 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2006-07-21 19:21:38 +00:00
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chip.h	These changes incorporate steve goodrich'es fixes, and one bug that is	2006-07-21 19:21:38 +00:00
chipsetinit.c	These changes incorporate steve goodrich'es fixes, and one bug that is	2006-07-21 19:21:38 +00:00
Config.lb	changes from AMD for making OLPC video work.	2006-06-10 22:57:15 +00:00
grphinit.c	These changes incorporate steve goodrich'es fixes, and one bug that is	2006-07-21 19:21:38 +00:00
northbridge.c	These changes incorporate steve goodrich'es fixes, and one bug that is	2006-07-21 19:21:38 +00:00
northbridge.h	adding preliminary, and almost certainly wrong, rumba support.	2006-01-27 23:46:30 +00:00
northbridgeinit.c	Fixes from AMD. Tested to build on rumba and olpc, and builds.	2006-06-20 03:53:54 +00:00
pll_reset.c	memory size in cf07	2006-05-12 18:42:34 +00:00
raminit.c	Fall back to pre-broken settings and setup for GX2.	2006-05-02 03:07:11 +00:00
raminit.h	preliminary GX DRAM initization. It is not working yet.	2006-02-23 21:39:19 +00:00