GNUBoot/coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
1429 commits 1 branch 29 tags 216 MiB
Commit graph

46 commits

Author SHA1 Message Date
Ronald G. Minnich
da7ee9fa07 These changes incorporate steve goodrich'es fixes, and one bug that is 
disabled. 

cs5536: add new entires for SB  control etc. 
cs5536.c: chip_enabled function moved to chip_init, so it only gets run
once.
IRQ setup improved
gx2def.h: new defines added
vr.h: new file, with new def's for virtual register control. 
mainboard config.lb: new entries added for nb and sb control.
chipsetinit.c: new controls added -- I forget all the details :-)
grphinit.c: new function added
northbridge.c: new IRQ control added. FlashChipSetup added, controlled
by chip info setupflash struct member. Currently, if enabled, this hangs
OLPC in linux PCI scan.
chip.h: new struct members added for unwanted device enable, flash setup 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2345 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-21 19:21:38 +00:00
Ronald G. Minnich
53a00b7138 match settings per steve goodrich. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2329 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-23 03:39:10 +00:00
Ronald G. Minnich
9d0b30dd2b Fixes from AMD. Tested to build on rumba and olpc, and builds. 
Tested to booting linux on olpc, and boots. 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2327 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-20 03:53:54 +00:00
Ronald G. Minnich
48415d5cf6 add irq mapper support for OLPC and other boards that need this mapping 
done for the gx2 north. tested on OLPC. 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2323 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-18 01:29:42 +00:00
Ronald G. Minnich
73c92a4a7c ron forget an svn add. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2319 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-12 20:37:33 +00:00
Ronald G. Minnich
90dc0db6de Get rid of #if 01 and debug prints that are compiled out. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2318 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-12 20:36:51 +00:00
Ronald G. Minnich
fb93749642 changes from AMD for making OLPC video work. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2316 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-10 22:57:15 +00:00
Ronald G. Minnich
98e904ea7c OLPC now builds and works just fine. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2305 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-15 04:44:15 +00:00
Ronald G. Minnich
6084160f2d memory size in cf07 
goodrich pll code
disable havedmi


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2303 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-12 18:42:34 +00:00
Ronald G. Minnich
c01fe5d1b6 more changes; rumba enet works fine now. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2290 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-03 03:30:23 +00:00
Ronald G. Minnich
d3ba4aaa24 Fall back to pre-broken settings and setup for GX2. 
We lost a few things, but this is still worth it.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2287 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-02 03:07:11 +00:00
Li-Ta Lo
64f07fb21c remove more code 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2285 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-27 20:44:53 +00:00
Li-Ta Lo
c1a4b2b0e5 code cleanup, comments added 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2284 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-27 18:40:15 +00:00
Ronald G. Minnich
b947b14734 more code removal and removal of incorrect register settings. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2283 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-27 17:46:27 +00:00
Ronald G. Minnich
94571a4767 removing redundant and unneeded calls to functions. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2282 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-27 17:37:23 +00:00
Ronald G. Minnich
3716427e7f we don't need msr_init 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2281 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-27 15:10:55 +00:00
Li-Ta Lo
b7a09b4f19 some todo and comment for ron. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2280 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-26 22:07:16 +00:00
Li-Ta Lo
05c0869fac boot to kernel 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2264 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-20 21:26:01 +00:00
Li-Ta Lo
965b5ad85b resolve conflict 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2260 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-19 15:11:01 +00:00
Ronald G. Minnich
36c00aa39b fix adjustment for sizeram 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-18 22:40:53 +00:00
Ronald G. Minnich
170ce333ca add ram resources 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2256 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-18 20:42:58 +00:00
Li-Ta Lo
d8d8fffa0e minor modification 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2253 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-13 17:00:38 +00:00
Ronald G. Minnich
4b8cf1d30a added chipsetinit function, many defines. addec call to chipsetinit to 
northbridge.c
builds fine on lippert


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-10 23:32:23 +00:00
Ronald G. Minnich
4223188335 add support for GLIUInit() 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2245 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-07 16:55:20 +00:00
Ronald G. Minnich
40fedaf6a9 add northbridgeinit, also add new constants. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2244 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-06 23:35:52 +00:00
Li-Ta Lo
5917c62749 more fix for vsm, not working yet 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2237 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-06 20:19:04 +00:00
Li-Ta Lo
8854d30d6e did I commit the last change? 
try to fix 0x10000026


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2235 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-03 22:20:05 +00:00
Ronald G. Minnich
1a971bddcf fix bit-twiddling errors on msr 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2226 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-22 17:30:48 +00:00
Ronald G. Minnich
cd6985bce3 vsm can be called now, and then hang. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2224 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-21 23:24:33 +00:00
Ronald G. Minnich
e4ad801495 cpubug is fine. 
adding vsm support now.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2222 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-21 03:38:53 +00:00
Ronald G. Minnich
db44be9405 added definitions. added cpubug support. added object. Commented out 
msr set in northbridge that conflicted with the cpubug support. 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2218 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-20 20:49:34 +00:00
Ronald G. Minnich
34407063c2 added initial msr support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2212 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-17 23:03:04 +00:00
Li-Ta Lo
042f0430d3 resolving conflict with Ron's work 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2209 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-17 20:11:38 +00:00
Ronald G. Minnich
ec5b166f41 add in the msr configuration 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2206 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-16 22:23:03 +00:00
Ronald G. Minnich
426da0bc45 stupid svn failed. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2201 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-15 23:40:30 +00:00
Ronald G. Minnich
a83b9762fc for different pll values. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2199 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-14 20:17:35 +00:00
Ronald G. Minnich
a41ff52ba9 Make the pll stuff parameterized. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2198 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-14 20:01:51 +00:00
Ronald G. Minnich
c994c973c6 Fix for nehemiah 
other fixes for gx2 ram init. 

support for sharplfg00l04 -- not working yet.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-14 19:58:14 +00:00
Li-Ta Lo
71e3326b9c added pll_reset.c 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2195 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-13 22:20:29 +00:00
Li-Ta Lo
a413ecc6cd added early_setup.c 
removed some messages


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2194 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-13 22:18:39 +00:00
Li-Ta Lo
71eae20b30 failed attempt to do early init for cs5535. Almost there but 
still get garbage reading smbus.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2192 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-13 21:58:43 +00:00
Li-Ta Lo
ec9cdc980f I am so stupid to mix up logical and bitwise NOT. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2191 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-02 21:33:01 +00:00
Li-Ta Lo
c0fe3190c4 remove more unused code 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2188 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-02-28 23:07:27 +00:00
Li-Ta Lo
bab9446dfd semi working with random 1 bit error 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2186 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-02-28 15:39:25 +00:00
Li-Ta Lo
108dd2c01e preliminary GX DRAM initization. It is not working yet. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2181 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-02-23 21:39:19 +00:00
Ronald G. Minnich
2bb216a880 adding preliminary, and almost certainly wrong, rumba support. 
This is just a skeleton, basically, and will most likely not even 
compile yet.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2164 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-01-27 23:46:30 +00:00