Kyösti Mälkki de64078102 bootblock: Provide some common prototypes ... The split of bootblock initialisation to cpu, northbridge and southbridge is not specific to intel at all, create new header <arch/bootblock.h> as AMD will want some of these too. Change-Id: I702cc6bad4afee4f61acf58b9155608b28eb417e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37429 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>		2019-12-14 14:08:57 +00:00
..
acpi	sb/intel: Use defined CONFIG_HPET_ADDRESS	2019-11-04 13:19:42 +00:00
ac97.c	{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()	2019-03-21 16:18:05 +00:00
azalia.c	southbridge/intel: Tidy up preprocessor and headers	2019-08-21 07:00:45 +00:00
bootblock.c	bootblock: Provide some common prototypes	2019-12-14 14:08:57 +00:00
chip.h	sb/intel/i82801gx: Add common LPC decode code	2019-11-12 18:22:57 +00:00
early_cir.c	sb/intel/i82801gx: Set FERR# Mux Enable only on mobile platforms	2019-10-22 20:07:11 +00:00
early_init.c	sb/intel/i82801gx: Don't setup CIR when the northbridge is x4x	2019-11-14 11:30:43 +00:00
early_smbus.c	device/pci: Fix PCI accessor headers	2019-03-01 20:32:15 +00:00
i82801gx.c	device/pci: Fix PCI accessor headers	2019-03-01 20:32:15 +00:00
i82801gx.h	sb/intel/i82801gx: Add common early code	2019-11-14 11:30:09 +00:00
ide.c	sb/intel/i82801gx: Include chip.h directly	2019-06-05 11:39:14 +00:00
Kconfig	sb/intel/common/spi: Add Baytrail/Braswell support	2019-11-26 11:47:27 +00:00
lpc.c	sb/intel/i82801gx: Only include SPI code with SPI boot devices	2019-11-16 20:39:31 +00:00
Makefile.inc	nb/intel/i945: Move to C_ENVIRONMENT_BOOTBLOCK	2019-11-15 16:45:48 +00:00
nic.c	sb/intel/i82801gx: Remove unneeded includes	2018-06-04 02:46:46 +00:00
nvs.h	Move compiler.h to commonlib	2018-10-08 16:57:27 +00:00
pci.c	src/{device,drivers,mb,nb,soc,sb}: Remove unused 'include <console/console.h>'	2019-10-21 14:21:09 +00:00
pcie.c	intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROL	2019-10-01 01:54:08 +00:00
sata.c	sb/intel/i82801gx: Use symbolic name for register, code rework	2019-10-03 15:24:42 +00:00
sata.h	sb/intel/i82801gx: Fix sata AHCI for desktop NM10/ICH7	2016-01-15 20:46:03 +01:00
smbus.c	southbridge: Remove unused include <device/pci_ops.h>	2019-09-15 20:41:46 +00:00
smihandler.c	{i945,i82801gx}: Remove unneeded include <cpu/x86/cache.h>	2019-09-15 20:42:34 +00:00
usb.c	{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()	2019-03-21 16:18:05 +00:00
usb_ehci.c	{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()	2019-03-21 16:18:05 +00:00