Angel Pons f4779e8679 geminilake: Factor out MAX_CPUS value ... Both Gemini Lake boards in the tree use the same value. Change-Id: Ib6bd05206026736fd7e3d44b49e4d8ba217c2708 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45142 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>		2020-09-09 10:34:51 +00:00
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alderlake	vendorcode/intel/fsp/fsp2_0/adl: Add FSP header file version 1332	2020-09-09 05:16:34 +00:00
apollolake	geminilake: Factor out MAX_CPUS value	2020-09-09 10:34:51 +00:00
baytrail	soc/intel/baytrail: Add missing GSM size definitions	2020-09-08 05:34:55 +00:00
braswell	SMM: Validate more user-provided pointers	2020-08-21 07:51:07 +00:00
broadwell	soc/intel/broadwell: Drop gpu_panel_port_select	2020-09-08 05:26:25 +00:00
cannonlake	soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by default	2020-09-06 14:26:33 +00:00
common	pci_ids: Add Alder Lake DTT PCI IDs	2020-09-08 12:56:58 +00:00
denverton_ns	soc/intel/denverton_ns/Kconfig: Drop unused 'IQAT_MEMORY_REGION_SIZE'	2020-09-08 05:34:12 +00:00
elkhartlake	soc/intel/elkhartlake: Update SA & PM related definitions	2020-09-08 05:30:44 +00:00
icelake	soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by default	2020-09-06 14:26:33 +00:00
jasperlake	soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by default	2020-09-06 14:26:33 +00:00
quark	{include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent	2020-09-01 03:06:04 +00:00
skylake	soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by default	2020-09-06 14:26:33 +00:00
tigerlake	soc/intel/tigerlake: Skip GPIO configuration from FSP	2020-09-08 05:31:35 +00:00
xeon_sp	soc/intel/xeon_sp/Kconfig: Drop redundant 'select POSTCAR_CONSOLE'	2020-09-02 07:16:19 +00:00
Kconfig	fsp2_0: Gather Kconfig declarations	2020-04-05 23:26:24 +00:00