coreboot-kgpe-d16/src/soc/intel/tigerlake
Srinidhi N Kaushik dc87025ce4 soc/intel/tigerlake: Skip GPIO configuration from FSP
FSP v3333 or later, provides a new UPD to Skip configuring
GPIO settings from FSP. coreboot should provide all the
required GPIO configuration for the platform when this UPD
is set.

BUG=b:166790597, b:146390704
BRANCH=none
TEST=build and boot volteer proto2

Cq-Depend:chromium-internal:3240396,chromium-internal:2870145
Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: If32f35a188d510db8e4d8973cae78297d49a9240
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44913
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-08 05:31:35 +00:00
..
acpi src: Remove unneded whitespace before tab 2020-08-18 12:09:40 +00:00
bootblock soc/intel/tigerlake: Rename pch_init() code 2020-08-26 07:36:21 +00:00
include/soc soc/intel/tigerlake: Remove unused PID_SDX macro 2020-09-04 05:20:44 +00:00
romstage soc/intel/tigerlake: Skip GPIO configuration from FSP 2020-09-08 05:31:35 +00:00
spd soc/intel/tigerlake: add ddr4-spd-empty.hex 2020-08-28 16:13:39 +00:00
acpi.c soc/intel/tigerlake: Simplify is-device-enabled checks 2020-07-28 08:36:59 +00:00
chip.c soc/intel/tigerlake: Invoke PCIe root port swapping 2020-08-03 05:06:34 +00:00
chip.h soc/intel/tigerlake: Allow fine grained control of S0iX states 2020-08-17 07:11:19 +00:00
cpu.c soc/intel/{icl.tgl,jsl}: Remove SMRAM register programming 2020-08-09 11:03:37 +00:00
elog.c elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE 2020-08-18 15:57:40 +00:00
espi.c soc/intel: Drop unused #include <reg_script.h> 2020-07-06 19:29:07 +00:00
finalize.c soc/intel/tigerlake: Disable Thunderbolt PCIe root ports bus master 2020-07-07 17:29:56 +00:00
fsp_params.c soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by default 2020-09-06 14:26:33 +00:00
gpio.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
gspi.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
i2c.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
Kconfig soc/intel/tigerlake: Add SMRR Locking support 2020-09-08 05:25:34 +00:00
lockdown.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
Makefile.inc soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code 2020-05-27 21:35:43 +00:00
me.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
meminit.c soc/intel/tigerlake: add common routine for DDR init 2020-08-06 17:42:20 +00:00
p2sb.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
pmc.c drivers/intel/pmx_mux: Remove redundant declaration 2020-07-03 08:28:20 +00:00
pmutil.c soc/intel/tigerlake: Move pmc_soc_set_afterg3_en to pmutil 2020-05-20 09:49:26 +00:00
reset.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
smihandler.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
smmrelocate.c soc/intel/tigerlake: Add SMRR Locking support 2020-09-08 05:25:34 +00:00
soundwire.c soc/intel/tigerlake: Provide SoundWire controller properties 2020-05-22 01:48:39 +00:00
spi.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
systemagent.c soc/intel/tigerlake: Set power limits for Tiger Lake Y-SKU 2020-07-25 00:07:36 +00:00
uart.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00