2dcca0f924
Using guidance from Intel, a new set of power limits (PL1, PL2 & PL4) are available for TGL-U. They are dependent upon the SKU of the CPU that the mainboard is running on. Volteer is updated here to use these new limits. To accomplish this, the SoC chip config's power_limits_config member was expanded to an array, which can be indexed by POWER_LIMITS_*_CORE macros. Just before power limits are applied, the correct set of them is chosen from the array based on System Agent PCI ID. Therefore, a TGL board should have two sets of power limits available in the devicetree. BUG=b:152639350 TEST=On a Volteer SKU4 (4-core), verified the following console output: CPU PL1 = 15 Watts CPU PL2 = 60 Watts CPU PL4 = 105 Watts Change-Id: I18a66fc3aacbb3ab594b2e3d6e2a4ad84c10d8f0 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42436 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Caveh Jalali <caveh@chromium.org> |
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.. | ||
acpi | ||
bootblock | ||
include/soc | ||
romstage | ||
spd/lp4x | ||
acpi.c | ||
chip.c | ||
chip.h | ||
cpu.c | ||
elog.c | ||
espi.c | ||
finalize.c | ||
fsp_params.c | ||
gpio.c | ||
gspi.c | ||
i2c.c | ||
Kconfig | ||
lockdown.c | ||
Makefile.inc | ||
me.c | ||
meminit.c | ||
p2sb.c | ||
pmc.c | ||
pmutil.c | ||
reset.c | ||
smihandler.c | ||
smmrelocate.c | ||
soundwire.c | ||
spi.c | ||
systemagent.c | ||
uart.c |