2007-09-16 20:11:03 +02:00
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/*
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2007-09-28 17:45:43 +02:00
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* This file is part of the superiotool project.
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2007-09-16 20:11:03 +02:00
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*
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* Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
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2008-11-12 20:08:58 +01:00
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* Copyright (C) 2007-2008 Uwe Hermann <uwe@hermann-uwe.de>
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2014-01-25 14:19:58 +01:00
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* Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
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2014-03-12 11:19:31 +01:00
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* Copyright (C) 2014 Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com>
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2017-02-28 23:45:42 +01:00
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* Copyright (C) 2017 Nicola Corna <nicola@corna.info>
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2007-09-16 20:11:03 +02:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "superiotool.h"
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2007-09-21 00:13:48 +02:00
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#define DEVICE_ID_BYTE1_REG 0x20
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#define DEVICE_ID_BYTE2_REG 0x21
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2007-09-28 17:39:10 +02:00
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2007-09-21 00:13:48 +02:00
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#define VENDOR_ID_BYTE1_REG 0x23
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#define VENDOR_ID_BYTE2_REG 0x24
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2007-09-23 15:17:29 +02:00
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#define FINTEK_VENDOR_ID 0x3419
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2007-10-31 23:22:11 +01:00
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static const struct superio_registers reg_table[] = {
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2008-11-12 20:08:58 +01:00
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{0x0106, "F71862FG / F71863FG", { /* Same ID? Datasheet typo? */
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2009-06-26 17:16:21 +02:00
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/* We assume reserved bits are read as 0. */
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{NOLDN, NULL,
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{0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
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0x2b,0x2c,0x2d,EOT},
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{0x06,0x01,0x19,0x34,0x00,0x00,MISC,0x00,0x00,0x00,
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0x00,0x00,0x08,EOT}},
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2010-05-14 18:40:55 +02:00
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{0x0, "Floppy",
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2009-06-26 17:16:21 +02:00
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{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
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{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
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2010-05-14 18:40:55 +02:00
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{0x1, "COM1",
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2009-06-26 17:16:21 +02:00
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x01,0x03,0xf8,0x04,0x00,EOT}},
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2010-05-14 18:40:55 +02:00
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{0x2, "COM2",
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2009-06-26 17:16:21 +02:00
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{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
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{0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
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{0x3, "Parallel port",
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{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
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{0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
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{0x4, "Hardware monitor",
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{0x30,0x60,0x61,0x70,EOT},
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{0x01,0x02,0x95,0x00,EOT}},
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{0x5, "Keyboard",
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{0x30,0x60,0x61,0x70,0x72,EOT},
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{0x01,0x00,0x60,0x00,0x00,EOT}},
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{0x6, "GPIO",
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{0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,
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0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,
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EOT},
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{0x00,0x0f,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,
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NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0x3f,NANA,0x00,
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EOT}},
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{0x7, "VID",
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{0x30,0x60,0x61, 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,
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0xf7,EOT},
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{0x00,0x00,0x00, 0x00,0x00,MISC,0x00,NANA,0x00,0x00,
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0x00,EOT}},
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{0x8, "SPI",
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{0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
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0xfb,0xfc,0xfd,0xfe,0xff,EOT},
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{0x10,0x04,0x01,NANA,0x00,0x00,0x00,NANA,0x00,0x00,
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0x00,0x00,0x00,0x00,0x00,EOT}},
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{0xa, "PME, ACPI",
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{0x30,0xf0,0xf1,0xf4,0xf5,0xf7,EOT},
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{0x00,0x00,NANA,0x06,0x1c,0x01,EOT}},
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2007-09-28 17:39:10 +02:00
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{EOT}}},
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2017-02-28 23:45:42 +01:00
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{0x0110, "F71808A", {
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/* We assume reserved bits are read as 0. */
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{NOLDN, NULL,
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{0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,
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0x29,0x2a,0x2b,0x2c,0x2d,EOT},
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{0x00,0x00,0x10,0x01,0x19,0x34,0x00,0x00,MISC,0x00,
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0xc0,0x21,0x2f,0x5c,0x27,EOT}},
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{0x1, "COM1",
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x01,0x03,0xf8,0x04,0x00,EOT}},
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{0x4, "Hardware monitor",
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{0x30,0x60,0x61,0x70,EOT},
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{0x01,0x02,0x95,0x00,EOT}},
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{0x5, "Keyboard",
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{0x30,0x60,0x61,0x70,0x72,0xfe,0xff,EOT},
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{0x01,0x00,0x60,0x01,0x0c,0x01,0x29,EOT}},
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{0x6, "GPIO",
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{0x70,0xc0,0xc1,0xc2,0xc3,0xc4,0xc5,0xc6,0xcb,0xcc,
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0xcd,0xce,0xcf,0xd0,0xd1,0xd2,0xd3,0xd4,0xd5,0xd6,
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0xd7,0xd8,0xe0,0xe1,0xe2,0xe3,0xf0,0xf1,0xf2,0xf3,
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EOT},
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{0x00,0x00,0x3f,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
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0x00,0xe0,0x40,0x00,0x00,NANA,0x00,0x00,0x00,0x00,
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0x00,0x00,0x00,0x1f,NANA,0x00,0x00,0xff,NANA,0x00,
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EOT}},
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{0x7, "WDT",
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{0x30,0x60,0x61,0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,
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EOT},
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{0x00,0x00,0x00,0x03,NANA,NANA,NANA,0x00,0x0a,0x00,
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EOT}},
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{0x8, "CIR",
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{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf8,0xf9,0xfa,0xfb,
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0xfc,0xfd,0xfe,EOT},
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{0x00,0x00,0x00,0x00,NANA,NANA,0x00,0x00,0x80,0x3b,
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0x00,0x00,0x00,EOT}},
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{0xa, "PME, ACPI, and EUP Power Saving",
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{0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
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0xe9,0xec,0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,
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0xf6,0xf7,0xf8,0xf9,0xfa,0xfd,EOT},
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{0x00,0x10,0xcc,0x0c,0x13,0x09,0xc7,0x09,0x63,0x00,
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0x0f,0x00,0x00,0x00,0x00,NANA,0x00,NANA,0x06,0x3c,
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0x1f,0x00,0x00,0x00,0x00,NANA,EOT}},
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{EOT}}},
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2014-03-24 10:02:42 +01:00
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{0x0710, "F71869A/AD", {
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2014-01-25 14:19:58 +01:00
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/* We assume reserved bits are read as 0. */
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{NOLDN, NULL,
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2014-03-24 10:02:42 +01:00
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{0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,
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0x29,0x29,0x2a,0x2a,0x2b,0x2b,0x2c,0x2c,0x2d,EOT},
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{0x00,0x00,0x10,0x07,0x19,0x34,0x00,0x00,NANA,0x38,
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0x6f,0x03,0x0f,0xe7,0x0f,NANA,0x00,NANA,0x28,EOT}},
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2014-01-25 14:19:58 +01:00
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{0x0, "Floppy",
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{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
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{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
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{0x1, "COM1",
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x01,0x03,0xf8,0x04,0x00,EOT}},
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{0x2, "COM2",
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{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
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{0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
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{0x3, "Parallel port",
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{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
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{0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
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{0x4, "Hardware monitor",
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{0x30,0x60,0x61,0x70,EOT},
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{0x01,0x02,0x95,0x00,EOT}},
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{0x5, "Keyboard",
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{0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT},
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{0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT}},
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{0x6, "GPIO",
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{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,
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0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0,
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2014-03-24 10:02:42 +01:00
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0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xa0,
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0xa1,0xa2,0xa4,0xa5,0xa6,0xa9,0xab,0xac,0xad,0xae,
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0xaf,0x90,0x91,0x92,0x80,0x81,0x82,0x83,EOT},
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2014-01-25 14:19:58 +01:00
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{0x00,0x00,0x00,0x00,0x00,0x3f,NANA,0x00,0x00,0xff,
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NANA,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,0x00,
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2014-03-24 10:02:42 +01:00
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0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x00,0x00,0x00,
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0x1f,NANA,0x00,0x00,0x00,0x00,0x00,0xe0,0x00,0x00,
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0x40,0x00,0xff,NANA,0x00,0xff,NANA,0x00,EOT}},
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{0x7, "WDT",
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{0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
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{0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}},
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{0x8, "CIR",
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{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf8,0xf9,0xfa,0xfb,
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0xfc,0xfd,0xfe,EOT},
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{0x00,0x00,0x00,0x00,NANA,NANA,0x00,0x00,0x80,0x3b,
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0x00,0x00,0x00,EOT}},
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{0xa, "PME, ACPI, and ERP Power Saving",
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{0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
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0xe9,0xec,0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,
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0xf6,0xf7,0xf8,0xf9,0xfa,0xfc,0xfe,EOT},
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{0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08,
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0x0f,0x00,0x00,0x00,0x00,NANA,0x00,NANA,0x06,0x1c,
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0x1f,0x86,0x00,0x00,0x00,0x07,0x00,EOT}},
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2014-03-12 11:19:31 +01:00
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{EOT}}},
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{0x1408, "F71869E/ED", {
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/* We assume reserved bits are read as 0. */
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{NOLDN, NULL,
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{0x02,0x07,0x20,0x21,0x23,0x24,0x26,0x27,0x28,0x29,
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0x2a,0x2b,0x2d,EOT},
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{0x00,0x00,0x08,0x14,0x19,0x34,0x00,NANA,0x38,0x6f,
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0x07,0x0f,0x28,EOT}},
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{0x00, "FDC",
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{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
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{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
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{0x01, "UART1",
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x01,0x03,0xf8,0x04,0x00,EOT}},
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{0x02, "UART2",
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{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
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{0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
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{0x03, "Parallel port",
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{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
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{0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
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{0x04, "Hardware Monitor",
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{0x30,0x60,0x61,0x70,EOT},
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{0x01,0x02,0x95,0x00,EOT}},
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{0x05, "KBC",
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{0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT},
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{0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT}},
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{0x06, "GPIO",
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|
|
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,
|
|
|
|
|
0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0,
|
|
|
|
|
0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,
|
|
|
|
|
0x90,0x91,0x92,0x93,EOT},
|
|
|
|
|
{0x00,0x00,0x00,0x00,0x00,0x3f,NANA,0x00,0x00,0xff,
|
|
|
|
|
NANA,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,0x00,
|
|
|
|
|
0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x1f,NANA,0x00,
|
|
|
|
|
0x00,0x3f,NANA,0x00,EOT}},
|
|
|
|
|
{0x07, "WDT",
|
|
|
|
|
{0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
|
|
|
|
|
{0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}},
|
|
|
|
|
{0x0a, "PME, ACPI, and EUP Power Saving",
|
|
|
|
|
{0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
|
|
|
|
|
0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,
|
|
|
|
|
0xf8,0xf9,0xfe,EOT},
|
|
|
|
|
{0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08,
|
|
|
|
|
0x00,0x00,0x00,0x00,0x00,NANA,0x06,0x1c,0x1f,0x86,
|
|
|
|
|
0x00,0x00,0x00,EOT}},
|
|
|
|
|
{EOT}}},
|
2010-11-29 12:56:39 +01:00
|
|
|
{0x2307, "F71889", {
|
|
|
|
|
/* We assume reserved bits are read as 0. */
|
|
|
|
|
{NOLDN, NULL,
|
|
|
|
|
{0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x2a,0x2b,
|
|
|
|
|
0x2c,0x2d,EOT},
|
|
|
|
|
{0x07,0x23,0x19,0x34,0x00,0x00,0x00,0x00,0xf0,0x30,
|
|
|
|
|
0x00,0x08,EOT}},
|
|
|
|
|
{0x0, "Floppy",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
|
|
|
|
|
{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
|
|
|
|
|
{0x1, "COM1",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,EOT},
|
|
|
|
|
{0x01,0x03,0xf8,0x04,0x00,EOT}},
|
|
|
|
|
{0x2, "COM2",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
|
|
|
|
|
{0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
|
|
|
|
|
{0x3, "Parallel port",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
|
|
|
|
|
{0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
|
|
|
|
|
{0x4, "Hardware monitor",
|
|
|
|
|
{0x30,0x60,0x61,0x70,EOT},
|
|
|
|
|
{0x01,0x02,0x95,0x00,EOT}},
|
|
|
|
|
{0x5, "Keyboard",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0x72,0xfe,EOT},
|
|
|
|
|
{0x01,0x00,0x60,0x01,0x0c,0x81,EOT}},
|
|
|
|
|
{0x6, "GPIO",
|
|
|
|
|
{0x80,0x81,0x82,0x83,0x90,0x91,0x92,0x93,0xa0,0xa1,
|
|
|
|
|
0xa2,0xa3,0xb0,0xb1,0xb2,0xc0,0xc1,0xc2,0xc3,0xd0,
|
|
|
|
|
0xd1,0xd2,0xd3,0xe0,0xe1,0xe2,0xe3,0xf0,0xf1,0xf2,
|
|
|
|
|
0xf3,0xfe,0xff,EOT},
|
|
|
|
|
{0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0x1f,
|
|
|
|
|
NANA,0x00,0x00,0xff,NANA,0x00,0xff,NANA,0x00,0x00,
|
|
|
|
|
0xff,NANA,0x00,0x00,0x7f,NANA,0x00,0x00,0x7f,NANA,
|
|
|
|
|
0x00,0x00,0x00,EOT}},
|
|
|
|
|
{0x7, "VID",
|
|
|
|
|
{0x30,0x60,0x61,EOT},
|
|
|
|
|
{0x00,0x00,0x00,EOT}},
|
|
|
|
|
{0x8, "SPI",
|
|
|
|
|
{0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
|
|
|
|
|
0xfb,0xfc,0xfd,0xfe,0xff,EOT},
|
|
|
|
|
{0x00,RSVD,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
|
|
|
|
0x00,0x00,0x00,0x00,0x00,EOT}},
|
|
|
|
|
{0xa, "PME, ACPI",
|
|
|
|
|
{0x30,0xf0,0xf1,0xf4,0xf5,0xf6,EOT},
|
|
|
|
|
{0x00,0x00,0x00,0x26,0x1c,0x07,EOT}},
|
|
|
|
|
{0xb, "VREF",
|
|
|
|
|
{0xf0,0xf1,0xf2,0xf3,0xff,EOT},
|
|
|
|
|
{0x64,0x64,0x64,0x00,0x00,EOT}},
|
|
|
|
|
{EOT}}},
|
2007-09-28 17:39:10 +02:00
|
|
|
{0x4103, "F71872F/FG / F71806F/FG", { /* Same ID? Datasheet typo? */
|
2010-10-24 14:43:41 +02:00
|
|
|
{NOLDN, NULL,
|
|
|
|
|
{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
|
|
|
|
|
0x29,0x2a,0x2b,0x2c,0x2d,EOT},
|
|
|
|
|
{0x03,0x41,RSVD,0x19,0x34,0x00,0x00,MISC,0x66,
|
|
|
|
|
0x80,0x00,0x00,0x00,0x04,EOT}},
|
|
|
|
|
{0x0, "Floppy",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
|
|
|
|
|
{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
|
|
|
|
|
{0x1, "COM1",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,EOT},
|
|
|
|
|
{0x01,0x03,0xf8,0x04,0x00,EOT}},
|
|
|
|
|
{0x2, "COM2",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
|
|
|
|
|
{0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
|
|
|
|
|
{0x3, "Parallel port",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
|
|
|
|
|
{0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
|
|
|
|
|
{0x4, "Hardware monitor",
|
|
|
|
|
{0x30,0x60,0x61,0x70,EOT},
|
|
|
|
|
{0x00,0x02,0x95,0x00,EOT}},
|
2010-10-24 16:19:09 +02:00
|
|
|
{0x5, "Keyboard", /* Only documented on F71872F/FG. */
|
2010-10-24 14:43:41 +02:00
|
|
|
{0x30,0x60,0x61,0x70,0x72,0xf0,0xf1,EOT},
|
|
|
|
|
{0x01,0x00,0x60,0x00,0x00,0x83,0x00,EOT}},
|
|
|
|
|
{0x6, "GPIO",
|
|
|
|
|
{0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
|
|
|
|
|
0xe9,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,
|
|
|
|
|
EOT},
|
|
|
|
|
{0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
|
|
|
|
|
0x7f,0x00,0x7f,NANA,0x00,0xff,NANA,0x00,0x03,NANA,
|
|
|
|
|
EOT}},
|
|
|
|
|
{0x7, "VID",
|
|
|
|
|
{0x30,0x60,0x61,EOT},
|
|
|
|
|
{0x00,0x00,0x00,EOT}},
|
|
|
|
|
{0xa, "PME, ACPI",
|
|
|
|
|
{0x30,0xf0,0xf1,0xf4,0xf5,EOT},
|
|
|
|
|
{0x00,0x00,0x61,0x06,0x3c,EOT}},
|
2007-09-28 17:39:10 +02:00
|
|
|
{EOT}}},
|
|
|
|
|
{0x4105, "F71882FG/F71883FG", { /* Same ID? Datasheet typo? */
|
2008-10-10 01:56:11 +02:00
|
|
|
/* We assume reserved bits are read as 0. */
|
|
|
|
|
{NOLDN, NULL,
|
|
|
|
|
{0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
|
|
|
|
|
0x2b,0x2c,0x2d,EOT},
|
|
|
|
|
{0x05,0x41,0x19,0x34,0x00,0x00,0x00,0x00,0x00,0x00,
|
|
|
|
|
0x00,0x08,0x08,EOT}},
|
|
|
|
|
{0x0, "Floppy",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
|
|
|
|
|
{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
|
|
|
|
|
{0x1, "COM1",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,EOT},
|
|
|
|
|
{0x01,0x03,0xf8,0x04,0x00,EOT}},
|
|
|
|
|
{0x2, "COM2",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
|
|
|
|
|
{0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
|
|
|
|
|
{0x3, "Parallel port",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
|
|
|
|
|
{0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
|
|
|
|
|
{0x4, "Hardware monitor",
|
|
|
|
|
{0x30,0x60,0x61,0x70,EOT},
|
|
|
|
|
{0x01,0x02,0x95,0x00,EOT}},
|
|
|
|
|
{0x5, "Keyboard",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0x72,0xf0,EOT},
|
|
|
|
|
{0x01,0x00,0x60,0x00,0x00,0x83,EOT}},
|
|
|
|
|
{0x6, "GPIO",
|
|
|
|
|
{0x70,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,0xd2,0xd3,0xc0,
|
|
|
|
|
0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xf0,0xf1,0xf2,
|
|
|
|
|
0xf3,EOT},
|
|
|
|
|
{0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,
|
|
|
|
|
0x0f,NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0xff,NANA,
|
|
|
|
|
0x00,EOT}},
|
|
|
|
|
{0x7, "VID",
|
|
|
|
|
{0x30,0x60,0x61,EOT},
|
|
|
|
|
{0x00,0x00,0x00,EOT}},
|
|
|
|
|
{0x7, "SPI",
|
|
|
|
|
{0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
|
|
|
|
|
0xfb,0xfc,0xfd,0xfe,0xff,EOT},
|
|
|
|
|
{0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
|
|
|
|
0x00,0x00,0x00,0x00,0x00,EOT}},
|
|
|
|
|
{0xa, "PME, ACPI",
|
|
|
|
|
{0x30,0xf0,0xf1,0xf4,0xf5,EOT},
|
|
|
|
|
{0x00,0x00,0x01,0x06,0x1c,EOT}},
|
2007-09-28 17:39:10 +02:00
|
|
|
{EOT}}},
|
|
|
|
|
{0x0604, "F71805F/FG", {
|
2007-09-26 17:48:09 +02:00
|
|
|
/* We assume reserved bits are read as 0. */
|
|
|
|
|
{NOLDN, NULL,
|
2008-10-14 18:34:38 +02:00
|
|
|
{0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,EOT},
|
|
|
|
|
{0x04,0x06,0x19,0x34,0x00,0x00,0x3f,0x08,0x00,EOT}},
|
2007-09-26 17:48:09 +02:00
|
|
|
{0x0, "Floppy",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
|
|
|
|
|
{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
|
|
|
|
|
{0x1, "COM1",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,EOT},
|
|
|
|
|
{0x01,0x03,0xf8,0x04,0x00,EOT}},
|
|
|
|
|
{0x2, "COM2",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
|
|
|
|
|
{0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
|
|
|
|
|
{0x3, "Parallel port",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
|
|
|
|
|
{0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
|
|
|
|
|
{0x4, "Hardware monitor",
|
|
|
|
|
{0x30,0x60,0x61,0x70,EOT},
|
|
|
|
|
{0x00,0x02,0x95,0x00,EOT}},
|
|
|
|
|
{0x6, "GPIO",
|
|
|
|
|
{0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
|
|
|
|
|
0xe9,0xf0,0xf1,0xf3,0xf4,EOT},
|
|
|
|
|
{0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
|
|
|
|
|
0x00,0x00,NANA,0x00,NANA,EOT}},
|
|
|
|
|
{0xa, "PME",
|
|
|
|
|
{0x30,0xf0,0xf1,EOT},
|
|
|
|
|
{0x00,0x00,0x00,EOT}},
|
2007-09-21 00:13:48 +02:00
|
|
|
{EOT}}},
|
2008-10-01 22:16:58 +02:00
|
|
|
{0x0581, "F8000", { /* Fintek/ASUS F8000 */
|
|
|
|
|
{EOT}}},
|
2010-08-17 10:24:01 +02:00
|
|
|
{0x0802, "F81216D/DG", {
|
|
|
|
|
{NOLDN, NULL,
|
|
|
|
|
{0x25,0x2f,EOT},
|
|
|
|
|
{0x00,RSVD,EOT}},
|
|
|
|
|
{0x0, "UART1",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
|
|
|
|
|
{NANA,NANA,NANA,NANA,0x00,0x40,EOT}},
|
|
|
|
|
{0x1, "UART2",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,EOT},
|
|
|
|
|
{NANA,NANA,NANA,NANA,0x00,EOT}},
|
|
|
|
|
{0x2, "UART3",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,EOT},
|
|
|
|
|
{NANA,NANA,NANA,NANA,0x00,EOT}},
|
|
|
|
|
{0x3, "UART4",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,EOT},
|
|
|
|
|
{NANA,NANA,NANA,NANA,0x00,EOT}},
|
|
|
|
|
{0x8, "WDT",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
|
|
|
|
|
{0x00,NANA,NANA,NANA,NANA,NANA,EOT}},
|
|
|
|
|
{EOT}}},
|
|
|
|
|
{0x1602, "F81216AD", {
|
|
|
|
|
{NOLDN, NULL,
|
|
|
|
|
{0x25,0x27,EOT},
|
|
|
|
|
{0x00,NANA,EOT}},
|
|
|
|
|
{0x0, "UART1",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf4,0xf5,EOT},
|
|
|
|
|
{NANA,NANA,NANA,NANA,0x00,0x40,0x00,0x00,EOT}},
|
|
|
|
|
{0x1, "UART2",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
|
|
|
|
|
{NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
|
|
|
|
|
{0x2, "UART3",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
|
|
|
|
|
{NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
|
|
|
|
|
{0x3, "UART4",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
|
|
|
|
|
{NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
|
|
|
|
|
{0x8, "WDT",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
|
|
|
|
|
{0x00,NANA,NANA,NANA,NANA,NANA,EOT}},
|
|
|
|
|
{EOT}}},
|
2010-11-05 01:34:12 +01:00
|
|
|
{0x0407, "F81865F/F-I", {
|
2012-09-06 10:38:49 +02:00
|
|
|
{NOLDN, NULL,
|
2014-03-24 09:50:25 +01:00
|
|
|
{0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2a,0x2b,0x2c,0x2d,EOT},
|
2012-09-06 10:38:49 +02:00
|
|
|
{NANA,0x00,0x07,0x04,0x19,0x34,NANA,NANA,NANA,0x00,0x00,0x00,0x00,0x1f,0x00,0x08,EOT}},
|
|
|
|
|
{0x00, "FDC",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
|
|
|
|
|
{NANA,0x03,0xf0,NANA,NANA,NANA,NANA,NANA,EOT}},
|
|
|
|
|
{0x03, "LPT",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
|
|
|
|
|
{NANA,0x03,0x78,NANA,NANA,NANA,EOT}},
|
|
|
|
|
{0x04, "HWMON",
|
|
|
|
|
{0x30,0x60,0x61,0x70,EOT},
|
|
|
|
|
{NANA,0x02,0x95,NANA,EOT}},
|
|
|
|
|
{0x05, "KBC",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0x72,0xfe,0xf0,EOT},
|
|
|
|
|
{NANA,0x00,0x60,NANA,NANA,NANA,0x71,EOT}},
|
|
|
|
|
{0x06, "GPIO",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf1,0xf2,0xf3,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xe0,0xe1,0xe2,0xe3,0xef,0xd0,0xd1,0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,0x90,0x91,0x92,0x93,EOT},
|
|
|
|
|
{NANA,0x00,0x60,NANA,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,NANA,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,NANA,NANA,NANA,NANA,EOT}},
|
|
|
|
|
{0x07, "WDT",
|
|
|
|
|
{0x30,0x60,0x61,0xf5,0xf6,0xfa,EOT},
|
|
|
|
|
{NANA,0x00,0x00,0x00,0x00,NANA,EOT}},
|
|
|
|
|
{0x08, "SPI",
|
|
|
|
|
{0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,0xfb,0xfc,0xfd,0xfe,0xff,EOT},
|
|
|
|
|
{0x10,0x04,NANA,NANA,0x00,0x00,NANA,NANA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
|
|
|
|
|
{0x0a, "PME & ACPI",
|
|
|
|
|
{0x30,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,EOT},
|
|
|
|
|
{NANA,NANA,NANA,NANA,NANA,0x06,NANA,0x00,EOT}},
|
|
|
|
|
{0x0b, "RTC",
|
|
|
|
|
{0x30,0x60,0x61,0x70,EOT},
|
|
|
|
|
{NANA,0x00,0x00,NANA,EOT}},
|
|
|
|
|
{0x10, "UART1",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
|
|
|
|
|
{NANA,0x03,0xf8,NANA,NANA,NANA,0x00,0x00,EOT}},
|
|
|
|
|
{0x11, "UART2",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
|
|
|
|
|
{NANA,0x02,0xf8,NANA,NANA,NANA,0x00,0x00,EOT}},
|
|
|
|
|
{0x12, "UART3",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
|
|
|
|
|
{NANA,0x03,0xe8,NANA,NANA,NANA,0x00,0x00,EOT}},
|
|
|
|
|
{0x13, "UART4",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
|
|
|
|
|
{NANA,0x02,0xe8,NANA,NANA,NANA,0x00,0x00,EOT}},
|
|
|
|
|
{0x14, "UART5",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
|
|
|
|
|
{NANA,0x00,0x00,NANA,NANA,NANA,0x00,0x00,EOT}},
|
|
|
|
|
{0x15, "UART6",
|
|
|
|
|
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
|
|
|
|
|
{NANA,0x00,0x00,NANA,NANA,NANA,0x00,0x00,EOT}},
|
2010-11-05 01:34:12 +01:00
|
|
|
{EOT}}},
|
2007-09-21 00:13:48 +02:00
|
|
|
{EOT}
|
|
|
|
|
};
|
|
|
|
|
|
2017-02-28 23:45:42 +01:00
|
|
|
static const struct superio_registers hwm_table[] = {
|
|
|
|
|
{0x0110, "F71808A", {
|
|
|
|
|
{NOLDN, NULL,
|
|
|
|
|
{0x01, 0x02, 0x03, 0x08, 0x0a, 0x0b, 0x0c, 0x0d,
|
|
|
|
|
0x0f,
|
|
|
|
|
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
|
|
|
|
|
0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
|
|
|
|
|
/* 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
|
|
|
|
|
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, */
|
|
|
|
|
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
|
|
|
|
|
0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
|
|
|
|
|
0x60, 0x61, 0x62, 0x63, 0x64, 0x66, 0x6b, 0x6c,
|
|
|
|
|
0x6d, 0x6f, 0x7f,
|
|
|
|
|
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
|
|
|
|
|
0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e,
|
|
|
|
|
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
|
|
|
|
|
0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d,
|
|
|
|
|
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x98,
|
|
|
|
|
0x9b, 0x9c, 0x9e, 0x9f,
|
|
|
|
|
0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
|
|
|
|
|
0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
|
|
|
|
|
0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
|
|
|
|
|
0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
|
|
|
|
|
0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
|
|
|
|
|
0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
|
|
|
|
|
0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xec, 0xed, 0xee,
|
|
|
|
|
0xef, EOT},
|
|
|
|
|
{0x03, 0x00, 0x01, 0x4c, 0x00, 0x00, 0x55, 0x00,
|
|
|
|
|
0x20,
|
|
|
|
|
NANA, NANA, NANA, NANA, RSVD, RSVD, RSVD, NANA,
|
|
|
|
|
NANA, RSVD, RSVD, RSVD, RSVD, NANA, NANA, NANA,
|
|
|
|
|
/* RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD,
|
|
|
|
|
RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, */
|
|
|
|
|
0x44, 0x00, NANA, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
|
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
|
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x06, 0x40,
|
|
|
|
|
0x04, 0x00, 0x00,
|
|
|
|
|
RSVD, RSVD, NANA, RSVD, NANA, RSVD, RSVD, RSVD,
|
|
|
|
|
NANA, NANA, NANA, NANA, NANA, RSVD, RSVD,
|
|
|
|
|
RSVD, RSVD, NANA, NANA, NANA, NANA, RSVD, RSVD,
|
|
|
|
|
RSVD, RSVD, RSVD, RSVD, RSVD, RSVD,
|
|
|
|
|
0x00, NANA, NANA, 0x00, 0x2e, 0xff, 0x05, 0x44,
|
|
|
|
|
0x05, 0x55, 0x66, 0x00,
|
|
|
|
|
0x03, 0xff, 0x00, 0x83, 0x03, 0xff, 0x3c, 0x32,
|
|
|
|
|
0x28, 0x1e, 0xff, 0xd9, 0xb2, 0x99, 0x80, 0x1d,
|
|
|
|
|
0x0c, 0x25, 0x00, 0x80, 0x03, 0xff, 0x3c, 0x32,
|
|
|
|
|
0x28, 0x1e, 0xff, 0xd9, 0xb2, 0x99, 0x80, 0x1e,
|
|
|
|
|
0x0f, 0xff, RSVD, 0x7f, RSVD, RSVD, RSVD, RSVD,
|
|
|
|
|
RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, 0x00,
|
|
|
|
|
NANA, NANA, NANA, NANA, NANA, 0x00, 0x01, 0x01,
|
|
|
|
|
0x00, EOT}},
|
|
|
|
|
{EOT}}},
|
|
|
|
|
{EOT}
|
|
|
|
|
};
|
|
|
|
|
|
2007-09-19 02:48:42 +02:00
|
|
|
void probe_idregs_fintek(uint16_t port)
|
|
|
|
|
{
|
2017-02-28 23:45:42 +01:00
|
|
|
uint16_t vid, did, hwmport;
|
2007-09-19 02:48:42 +02:00
|
|
|
|
2007-10-04 17:23:38 +02:00
|
|
|
probing_for("Fintek", "", port);
|
|
|
|
|
|
2007-09-21 01:37:56 +02:00
|
|
|
enter_conf_mode_winbond_fintek_ite_8787(port);
|
2007-09-16 20:11:03 +02:00
|
|
|
|
2007-09-21 00:13:48 +02:00
|
|
|
did = regval(port, DEVICE_ID_BYTE1_REG);
|
|
|
|
|
did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
|
|
|
|
|
|
|
|
|
|
vid = regval(port, VENDOR_ID_BYTE1_REG);
|
|
|
|
|
vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
|
|
|
|
|
|
2007-09-23 15:17:29 +02:00
|
|
|
if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
|
2007-10-04 17:23:38 +02:00
|
|
|
if (verbose)
|
|
|
|
|
printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
|
2007-09-21 01:37:56 +02:00
|
|
|
exit_conf_mode_winbond_fintek_ite_8787(port);
|
2007-09-21 00:13:48 +02:00
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2007-10-04 17:23:38 +02:00
|
|
|
printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
|
2014-03-12 11:19:31 +01:00
|
|
|
get_superio_name(reg_table, did), vid, did, port);
|
2007-10-07 22:01:23 +02:00
|
|
|
chip_found = 1;
|
2007-09-16 20:11:03 +02:00
|
|
|
|
2008-12-01 15:18:57 +01:00
|
|
|
dump_superio("Fintek", reg_table, port, did, LDN_SEL);
|
2007-09-16 20:11:03 +02:00
|
|
|
|
2017-02-28 23:45:42 +01:00
|
|
|
if (extra_dump) {
|
|
|
|
|
regwrite(port, LDN_SEL, 0x04); /* Select LDN 4 (HWM). */
|
|
|
|
|
|
|
|
|
|
/* Get HWM base address (stored in LDN 4, index 0x60/0x61). */
|
|
|
|
|
hwmport = regval(port, 0x60) << 8;
|
|
|
|
|
hwmport |= regval(port, 0x61);
|
|
|
|
|
|
|
|
|
|
printf("Hardware monitor (0x%04x)\n", hwmport);
|
|
|
|
|
dump_superio("Fintek-HWM", hwm_table, hwmport, did, LDN_SEL);
|
|
|
|
|
}
|
|
|
|
|
|
2007-09-21 01:37:56 +02:00
|
|
|
exit_conf_mode_winbond_fintek_ite_8787(port);
|
2007-09-16 20:11:03 +02:00
|
|
|
}
|
2008-01-15 23:30:55 +01:00
|
|
|
|
2010-08-17 10:24:01 +02:00
|
|
|
|
|
|
|
|
void probe_idregs_fintek_alternative(uint16_t port)
|
|
|
|
|
{
|
|
|
|
|
uint16_t vid, did;
|
|
|
|
|
|
|
|
|
|
probing_for("Fintek", "", port);
|
|
|
|
|
|
|
|
|
|
enter_conf_mode_fintek_7777(port);
|
|
|
|
|
|
|
|
|
|
did = regval(port, DEVICE_ID_BYTE1_REG);
|
|
|
|
|
did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
|
|
|
|
|
|
|
|
|
|
vid = regval(port, VENDOR_ID_BYTE1_REG);
|
|
|
|
|
vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
|
|
|
|
|
|
|
|
|
|
if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
|
|
|
|
|
if (verbose)
|
|
|
|
|
printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
|
|
|
|
|
exit_conf_mode_fintek_7777(port);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
|
2014-03-12 11:19:31 +01:00
|
|
|
get_superio_name(reg_table, did), vid, did, port);
|
2010-08-17 10:24:01 +02:00
|
|
|
chip_found = 1;
|
|
|
|
|
|
|
|
|
|
dump_superio("Fintek", reg_table, port, did, LDN_SEL);
|
|
|
|
|
|
|
|
|
|
exit_conf_mode_fintek_7777(port);
|
|
|
|
|
}
|
|
|
|
|
|
2008-01-15 23:30:55 +01:00
|
|
|
void print_fintek_chips(void)
|
|
|
|
|
{
|
|
|
|
|
print_vendor_chips("Fintek", reg_table);
|
|
|
|
|
}
|
