For some reason the rm -f didn't quite work on my system,
but sending gcc output to /dev/null does.
Change-Id: I7ece9aa9abe564bbc646ae53df1d3cd0c5aa84a2
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1543
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
libpayload already contained a number of functions for convenient
access to CMOS configuration. Add functions to support iteration
over available enum fields.
Change-Id: If95f45d7223d2e19c42f1d8680c12d23f6890a01
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1538
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
We used sizeof(listp*) at a place where sizeof(listp) is more appropriate:
While these are pointers, they're part of the UHCI design, and don't depend
on ISA details.
Change-Id: I4d3cb571c9a407103bc81fc171a8e73b68f7c7a1
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1530
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Add controller type (UHCI, OHCI, EHCI or XHCI)
into usbdev_hc (hci_t) struct, so now we know
which type selected controller have. It needed
to access controller specific data, if access
usb tree outside of libpayload (e.g. in payload
intself)
Change-Id: I7df947bbb56a50d0d792ccd4d3a6b021ee95e2ea
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1145
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Implemented OHCI reset function ohci_reset() in ohci.c
for libpayload's USB driver.
Change-Id: Id6518cbe00a21202757b34926bad171909740e97
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1177
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Correct registers base (PCI BAR) reading to be
more specification friendly. Registers base
only in [31-12] bits, all other proposed to be 0
but that not true for some motherboards. So
adding mask to use only valid bits.
Change-Id: I2e9a4997e016dab812ccfe654e966bc91d42a625
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1143
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
As we using 16-bit reading and writing in UHCI drive,
so all variables related to that must be 16-bit too.
Change-Id: Ib1abb03d054c167512e21f24f3c3da688c7fd01f
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1144
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This sets the timeout for control and bulk transfers to 2s per
transfer descriptor (like we set it in the EHCI driver). It also adds
delays around the disabling of control and bulk list access to
overcome some race conditions.
Change-Id: Ia2d1db890fca51c7d9477de163d55030e0c5a04a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1127
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This adds a simple check if a device is really configured before
returning it's address to the usb hub driver who wants to attach it.
Change-Id: I6fea140217c3e7468cc48ef7c3cbf2be8d11f47a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1131
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This lets the init of usb mass storage return if the device
configuration is unusable. Also add some checks for proper shutdown so
we don't free/remove an uninitialized device.
Change-Id: I6daf9b38e632b6e381bcd5a7717f0f1a3150b64a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1130
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This adds support for usb interrupt transfers to the OHCI driver.
Basically this enables support for HID keyboard devices.
For each interrupt transfer endpoint, two queues of transfer
descriptors (TDs) are maintained: the first with initialized TDs
is linked to the periodic schedule of the host controller (HC), the
second holds processed TDs which will be polled by the usb class
driver. The HC moves processed TDs from its schedule to a done queue.
We periodically fetch all TDs from the done queue, to put them on the
queue associated with the endpoint, where they can be polled from.
Fully processed TDs (i.e. which have gone throuch all of this) will be
reinitialized and put on the first queue again.
Change-Id: Iaab72c04087b36c9f0f6e539e31b47060c190015
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1128
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
This fixes some memory corruption, leaking and padding issues within
the initialization of the OHCI driver.
Change-Id: If6891f2a53e339d32c4324f4c9e0b1ed07596a60
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1126
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
This adds correct processing of the done queue of the OHCI host
controller (HC). We will always process the done queue after a control
or bulk transfer. Unfortunately, it's hard to tell when the HC will
write out the done queue, so we have do free the transfer descriptors
later and have to allocate them one by one.
To distinguish different types of TDs (e.g. async vs. interrupt
transfers) on the done queue, they are flagged in the lsb of there
.config field. We can utilize this bit for our own purpose, as it's
reserved and the host controller won't interpret it and preserves its
state.
Change-Id: I3b2271ae6221cdd50fc0f94582afdfe52bf7e797
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1125
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
In ohci_private.h some invocations of a MASK macro were called with
its parameters interchanged. This fixes it with the hope not to break
anything nasty.
Change-Id: I56cb483b208442b497dbd32ce993cc53d1fba1e5
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1122
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This enables logical detachment of unresponsive usb devices (i.e.
devices not responding to control transfers) in the usb mass storage
driver. Without the detection of unresponsive devices we wait way too
long for the device to become ready.
Change-Id: I8b8cf327f49dde25afaca4d3066f16ea86b99d3d
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1121
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This introduces a dummy queue head in the interrupt frame list of the
EHCI host controller. It's a workaround for broken controllers which
follow pointers from this list even if the terminate bit is set.
Fortunately, they do honor the bit in queue heads and having an empty
QH in the list doesn't violate the standard.
The linux kernel has a similar workaround for AMD SB700, SB800, and
Hudson-2/3 platforms. We observed this bug with an AMD SB600.
Change-Id: Ibbb66dea5fddc89c7995a24d746bedf6bfa887be
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1124
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
If the queue of an interrupt transfer runs out, we have to reset
the queue head. This also introduces the use of a spare transfer
descriptor (TD) in interrupt queues, which assures, that a processed
TD won't be reused until the host controller has written it back
from his overlay.
Change-Id: Id0eeb2808b77f1c187f164eb34bd66f8f399938b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1123
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Tested with a bunch of usb flash sticks. The slowest non-TUR (test
unit ready) turn around took about 1.3s, so this commit increases the
timeout to 2s.
Change-Id: Iec64b5cc48d51912b2bdeeebb5885399a71311b2
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1120
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Added reading registers base address for USB EHCI driver
in ehci_init() function.
Change-Id: I59443ca9823588d70822b4f14486caf217a5ac26
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1106
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This implements status transport (CSW) more closely to the standard
(usbmassbulk_10).
Change-Id: Ife516316e054d4e87ebe698dc487eeb9ebcfd38d
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1072
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: build bot (Jenkins)
Fixed usb controllers linked list walking in
detach_controller() function
Change-Id: Ia97c7ec814f75d2b1bfe185f160fb4cd32aa6fdb
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1105
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.huber@secunet.com>
We should always have some timeout when we wait for the hardware. This adds
missing timeouts to the UHCI driver.
Change-Id: Ic37b95ce12ff3ff5efe3e7ca346090946f6ee7de
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1073
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
We should always have some timeout when we wait for the hardware. This adds
missing timeouts to the EHCI driver.
Change-Id: I13ba532a6daf47510b16b8fdbe572a21f1d8b09c
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1077
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
We should always have some timeout when we wait for the hardware. This adds
missing timeouts and a more standard compliant port reset to the OHCI driver.
Change-Id: I2cfcb1039fd12f291e88dcb8b74d41cb5bb2315e
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1076
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This removes a synthetic delay of 5ms from every OHCI USB command. A delay
here seems to be of no use and first tests have shown no glitches.
Change-Id: Ie72b2d49e6734345708f04f3f7b86bacc7926108
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1075
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This adds support for usb interrupt transfers in the EHCI driver. Split
transactions are supported, so this enables support for HID keyboards
devices over hubs in high-speed mode.
Change-Id: I9eb08f12b12c67ece10814952cb8651278b02f9d
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1083
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
The call to destroy_intr_queue was missing in usb_hid_destroy.
Change-Id: I51ccc6a79bc005819317263be24a56c51acd5f55
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1082
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
With split transactions, the EHCI host controller can handle full- and
low-speed devices on hubs in high-speed mode. This adds support for split
transactions for control and bulk transfers.
Change-Id: I30fa1ce25757f33b1e6ed34207949c9255f05d49
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1081
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This adds proper device attachment and detachment detection and port enable-
ment to the USB hub driver. Support for split transactions is still missing,
so this works only with USB2.0 devices on hubs in USB2.0 mode and USB1.1
devices on hubs in USB1.1 mode.
Change-Id: I80bf03f3117116a60382b87a4f84366370649915
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1080
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This removes a synthetic delay of 10ms from every mass storage command.
A delay here seems to be of no use and first tests have only shown a
huge speed increase.
Change-Id: Ida7423229373ec521d4326c5467a3f518b76149c
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1071
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This disables some debugging code in the OHCI USB driver which causes
reboots under rare circumstances.
Change-Id: Ic274c162846137ee00638ffbc59ccf1d8130586f
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1074
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Due to operator precedence incomming USB commands were missing some
flags.
Change-Id: I87ef51590c9db7a6cbc7304e1ccac29895f8a51e
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Reviewed-on: http://review.coreboot.org/1084
Reviewed-by: Mathias Krause <minipli@googlemail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
UHCI commands should have a timeout of 30ms, not 30s!
Change-Id: Iebcf338317164eb1e683e1de850ffab5022ca3a1
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Reviewed-on: http://review.coreboot.org/1085
Reviewed-by: Mathias Krause <minipli@googlemail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Enable power on EHCI root hub ports only if the controller supports it.
Wait 20ms for the power to become stable.
Change-Id: I8897756ed2bfcb88408fe5e9f9e3f8af5dd900ac
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1078
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This function will be used by the USB hub driver.
Change-Id: I4d1d2e94f4442cbb636ae989e8ffd543181c4357
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1079
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
The removal of bitfields came with some glitches in the UHCI driver. This
fixes it.
Change-Id: Iba8ea3b56b03c526eca7b6388c019568e00be6f5
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1069
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
struct printf_spec is a purely internal structure. Avoid excessive casts
when using the write function pointer just to make the compiler happy by
using the right types in the first place.
Change-Id: Ia4f3c79a5283cb76c8aa5f9d1eee758676303382
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: http://review.coreboot.org/850
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Apply some const correctness to const/non-const strings in libc and
libpci (what an ugly cast that was).
Remove duplicated NULL test in printf_putstr(), already done in
print_string() - reduces size of libpayload by a few bytes.
Change-Id: I13f479df13e39d79cab291e9d99d153e1ef43eae
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: http://review.coreboot.org/849
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
At least one of the console drivers, coreboot fb, uses information in the
sysinfo structure to set itself up. If that structure hasn't been populated,
the driver decides that there is no framebuffer and disables itself. Reversing
the order these are set up fixes that problem.
Change-Id: Idd8b5518980dfdd82fd4359dd0133ab7736fc428
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/816
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
The previous commit was incomplete and missed setting the entire
alloc area.
There are also additional problems with gcc optimizations of the
pointer math. The "auto" casting by gcc wouldn't return warnings,
but it was causing the optimization to be incorrect. We are now
very explicit in the casting in the pointer math.
Change-Id: I020808c8d1dda544fe862b9efb0e5345eeab5aab
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/804
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
gcc4.6.2 was optimizing the libpayload alloc() function and failing to
reload a pointer after the memory had been manipulated by a pointer in
the inlined function setup(). Change the pointer type to volatile
and now pass it to the setup() function. Also clean up the
declaration so that it isn't cast a bunch times in the function.
Change-Id: I1637bd7bd5d9cf82ac88925cbfe76d319aa3cd82
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/705
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
tint was failing with the message "initscr(): Unable to create curscr."
tint uses the initscr() to enable vga windows, which allocates more
heap space with PDCurses than with tinycurses. Expanding the heap from
16KB to 64KB resolves the issue.
Change-Id: I1d38651e2b77f55613969c29614fb3b2be38a00c
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/687
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-by: Marc Jones <marcj303@gmail.com>
Commit c4348d0 ("libpayload: Remove bitfield use from OHCI data
structures") missed to adapt a debug message. This patch fixes this.
Change-Id: I5f6a4be9c7f6f99cb103926772717e15a3cbca70
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Reviewed-on: http://review.coreboot.org/653
Tested-by: build bot (Jenkins)
Reviewed-by: Bernhard Urban <lewurm@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
Input only arguments to {get,set}_option*() should be const to catch
programming errors early.
Change-Id: I560001a8e9226dfd156a4e529fcad20549236ebd
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Reviewed-on: http://review.coreboot.org/652
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
The 'name' argument to lookup_cmos_entry() is declared to be 'char *'
but we pass an empty string ("") which is 'const char[]' so the compiler
legitimatly warns about discarded qualifiers here. Fix this by passing
NULL as 'name'.
Minor nitpick: The NULL test in lookup_cmos_entry() is superfluous as our
implementation of strnlen() can handle NULL pointers gracefully. But for
an average C hacker it just doesn't feel right not to do so.
Change-Id: I592917d12d8fa840804c0d19e38b844427064fef
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Reviewed-on: http://review.coreboot.org/651
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Be consistend with coding style at least within a function -- don't mix
sizeof with plain values.
Change-Id: Iefb5b7fe4f54977f5505fc9cea65c9c4af3e7f3a
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Reviewed-on: http://review.coreboot.org/617
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
We don't use bitfields anymore.
Change-Id: I25ceec2024f659612871bcfe5f98df3a10789055
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/595
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
EHCI port status reporting isn't very consistent on power-on,
so just looking for devices on all ports is the safest way to
find everything.
Change-Id: I26b4305016f0bed1d2c1b5cffc59d5813fa1cbbb
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/594
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
When converting EHCI to not use bitfields, two offsets were converted
incorrectly.
Change-Id: I0bb4bad0eee42e54ad4fd53d6c35b107e227c41a
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/593
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Provide functions that pick the first CMOS variable defined
in the cmos layout, and from there, the next one.
Change-Id: Ie98146de7f6273089fc6fc0b232a4b94337cf8a3
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/587
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
options_checksum_valid can be used as a fast test to
identify invalid CMOS data by checking the checksum.
Change-Id: I44635d4c5d389579ad82435907ba8658e1bd44bb
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/586
Reviewed-by: Bernhard Urban <lewurm@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Add new functions that allow using string based key/value access to
CMOS, including support for enums.
Change-Id: Ibe238eff4c5230e5f61004c88221cd34393873aa
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/585
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Provide access to CMOS images in RAM or CBFS, such as cmos.defaults
Change-Id: Ifa70dea6206d94c0c271caf9ae1152fc76b5d51a
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/584
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This will allow using libpayload functions to access CMOS data in
template files in RAM or CBFS.
Change-Id: I323ed625e657cbdc1fae8c279a82ee578e83ad00
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/583
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Two new functions allow switching the CBFS functions from using RAM
or ROM, with ROM as default.
Change-Id: I04d67ad622d25c5728ae9a63f5b8a3dc9bbacce6
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/550
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
We agreed that bitfields are a Bad Idea[tm].
Change-Id: If4c4cb748af340e2721b89fea8e035da0632971f
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/480
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Peter Stuge <peter@stuge.se>
We agreed that bitfields are a Bad Idea[tm].
Change-Id: I1b2bcda28c52ad10bbe9429e04d126b555f7828a
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/478
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Peter Stuge <peter@stuge.se>
We agreed that bitfields are a Bad Idea[tm].
Change-Id: Ic04f151091c359912835b8b3db488d2d41bd4bbb
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/479
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Peter Stuge <peter@stuge.se>
Instead of macros to access MAINBOARD record, use convenience functions.
Store pointers to MAINBOARD and HEADER for use outside of CB code.
Change-Id: I074e3a0df7d25726cbd942538bfdc5a63dd17e12
Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
Reviewed-on: http://review.coreboot.org/502
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
The return status of get_coreboot_info() might be handy to a platform
driver calling lib_get_sysinfo() to test for the presence of coreboot.
Change-Id: I0176c93ee92c9dff733112026ee50f2ca797bdff
Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
Reviewed-on: http://review.coreboot.org/503
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
MEM_RANGE_PTR() also needs to return a pointer to untyped memory.
Change-Id: I0ec64ad7bdb136d5e1a999bff3df6fa66eb29bf1
Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
Reviewed-on: http://review.coreboot.org/500
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
When processing FORWARD records, we weren't accounting for the pointer
being in the physical address space and not the virtual space instead.
Change-Id: I35ef637fbec7886d4cfeac5fd650a17eae8d555a
Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
Reviewed-on: http://review.coreboot.org/499
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
To avoid unnecessary casts, we can use untyped pointers when accessing
individual records.
Change-Id: I1d628d6e25f1e53b4fee34e7c2c4688a789c45a3
Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
Reviewed-on: http://review.coreboot.org/498
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
That coreboot uses the IP checksum is an artifact, not a deliberate
requirement to be compatible with the Internet Protocole suite. Use
a wrapper to abstract the computation of coreboot's checksum.
Change-Id: I6491b9ba5efb9ffe5cb12a6172653a6ac80a1370
Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
Reviewed-on: http://review.coreboot.org/497
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Having submitted a module based on coreboot to LKML for acceptance,
it was requested that fewer macros and more inlines be used (because
of their superior type-checking when performing pointer casts, etc).
This is the first of several changes to make the relevant parts of
coreboot comply to linux code standards.
Change-Id: Iffe7061fa62fa639e0cb6ccb9125eb3403d06b1a
Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
Reviewed-on: http://review.coreboot.org/495
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Linking fails when using -Wl,--as-needed and/or esp. when forcing --as-needed
through a compiler specs file.
A proper compile/link command would look like: $(CC) $(CFLAGS) $(LDFLAGS) -o foo
$(OBJS) $(LIBS). So the *FLAGS must be passed *before* the objects while the
libraries/dependencies must be passed *after* the objects.
For more details see: http://www.gentoo.org/proj/en/qa/asneeded.xml
Change-Id: I5a5b05e1cab8a2d88ce56c92d9b2f991ca1ee6c0
Signed-off-by: Christian Ruppert <idl0r@qasl.de>
Reviewed-on: http://review.coreboot.org/494
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
It allows to change CMOS values from payloads
Change-Id: I4872fc27476923adafe13504126235b92b30de85
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/445
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
PDcurses wants set_blink to determine color count. Not exactly
obvious.
Change-Id: I8b2a32f0095d5900fa7e01f04f3f1d565dc2bedf
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/432
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
The PS/2 keyboard driver set and reset the caps LED to show the
keyboard status. Unfortunately, that configuration happens over
the same path used to transmit keypresses.
In face of certain error conditions, the keyboard stopped working.
This change makes keyboard handling more robust.
Change-Id: I0489a9983ea7dab00357220e09398dd1a8538839
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/430
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
So far it was empty and never published. It now exists and shuts down
all controllers (esp. EHCI which resets the port routers).
Change-Id: I81e355e8a05778d6397675417b085a094a6f48ee
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/397
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
EHCI can take over all ports (and then reroute devices to
companion controllers if needs be). We do that, and then never
reset it.
Consequence:
Systems with only USB1 HC drivers (OHCI/UHCI) never see any devices.
Change-Id: If1d91e9142a6618289b0b3f6b56587ec857158e3
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/396
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
We have fatal(), which is just as good.
Coccinelle script:
@@
expression E;
@@
-usb_fatal(E)
+fatal(E)
Change-Id: Iabecbcc7d068cc0f82687bf51d89c2626642cd86
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/395
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
The USB stack is pretty noisy. Reduce the output to a sane level.
Change-Id: I250949e5cf74a8c6d43822b2e7487143b2ae1c65
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Reviewed-on: http://review.coreboot.org/393
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
OHCI works when USB_DEBUG is disabled, but not, when disabled.
This is because the controller requires some more time after a
schedule has finished.
Also improve compliance with the OHCI spec.
Change-Id: I4685cc485ff9c52b489fbaa352ab889671cff876
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/365
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
The frequency for the PC speaker has to be specified as
1193180 / frequency according to http://wiki.osdev.org/PC_Speaker
Change-Id: Iaca9d45807e080efe834611e719b350680b5fb90
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/337
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Add information about memory mapped/io mapped base addresses.
and fix up libpayload to use the same structures
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Change-Id: I5f7b5eda6063261b9acb7a46310172d4a5471dfb
Reviewed-on: http://review.coreboot.org/261
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Time for the brown paper bag: OHCI controllers are not happy when
told to send data, but with obviously wrong addresses. It helps
to write the addresses into the data structures.
Change-Id: Ic0967dc8939e64af119cfb89400a045a2c077171
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/306
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Doing a call before the payload has set up its stack is risky. The stack may
not be in a favorable location. Normally this is not an issue with coreboot
or other well behaved callers.
Change-Id: Ie6f6748a471324b29ebad045c807dfc9f4b92034
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: http://review.coreboot.org/240
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This function allows reading the nvram configuration table from
locations other than the cbtable.
Change-Id: I56c9973a9ea45ad7bf0185b70d11c9ce5d0e0e1b
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/213
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Keep in sync with coreboot's version.
Change-Id: I8a253446bd3b2ce9d05c6076a3f49f0260ecd5f9
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/158
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
libpci defines an arbitrary set of PCI vendor IDs, flashrom uses the
Intel definition. Add it.
flashrom also requires inttypes.h, so add the OpenBSD version
Change-Id: I9bffd8193f635c375ac4d6b6eae8d3d876b95f5f
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/154
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Some gcc versions seem to honor volatile at different places in a
struct declaration.
Change-Id: I0df2a3fb2eff4cee8cc1b8ac15d9cd9b86178752
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/155
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Add cbfs core from coreboot into libpayload, and to support lzma decode,
add coreboot's lzma code, too. Carl-Daniel agreed to relicense the
lzmadecode wrapper as BSD-l, solving licensing problems.
Change-Id: Id28990fe7e951d99447e265a4880d70a8f208dd2
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/115
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Marc Jones <marcj303@gmail.com>
PDCurses provides an alternative implementation of the curses library
standard in addition to tinycurses.
Where tinycurses is really tiny, PDCurses is more complete and provides
virtually unlimited windows and the full API.
The PDCurses code is brought in "vanilla", with all local changes
residing in curses/pdcurses-backend/
In addition to a curses library, this change also provides libpanel (as
part of the PDCurses code), and libform and libmenu which were derived
from ncurses-5.9.
As they rely on ncurses internals (and PDCurses is not ncurses), more
changes were required for these libraries to work.
The build system is extended to install the right set of header files
depending on the selected curses implementation.
Change-Id: I9e5b920f94b6510da01da2f656196a993170d1c5
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/106
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
If you would try download FILO via svn, then you probably
get error message about libpayload install. This enables
manually installing libpayload in legacy style :)
Change-Id: I9f52be939303c5913611f21477d681e11d286382
Signed-off-by: Tadas Slotkus <devtadas@gmail.com>
Reviewed-on: http://review.coreboot.org/102
Tested-by: build bot (Jenkins)
Reviewed-by: Frank Vibrans III <frank.vibrans@amd.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Change-Id: I419fcb16e0b10dee9195072e0e6befa6c9e61a69
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/105
Tested-by: build bot (Jenkins)
Reviewed-by: Frank Vibrans III <frank.vibrans@amd.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
I have observed two separate EHCI host bridges that do not tolerate
using C bit-fields to directly manipulate the portsc_t register. The
reason for this is that the EHCI spec says that port_enable must go
to 0 at the time that port_reset goes to 1. Naturally this cannot be
done using direct bit-field manipulation. Instead, we use a temporary
variable, change the bit-fields there, then atomically write the new
value back to the hardware.
Signed-off-by: Steven A. Falco <sfalco@coincident.com>
Change-Id: If138faee43e0293efa203b86f7893fdf1e811269
Reviewed-on: http://review.coreboot.org/101
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Define INT_MAX, EOF and make sure size_t is available.
Change-Id: I1b4b717d2545ea8312ec52339300307a5bd68f8a
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/104
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
The Intel E6XX Atom processor reports an unknown USB controller type (in
addition to the standard EHCI and OHCI ones). Add a default case to
print a warning when an unknown controller type is detected.
Change-Id: I885d0ccec4c46fd212cceac599290e9bf85edbbb
Signed-off-by: Steven A. Falco <sfalco@coincident.com>
Reviewed-on: http://review.coreboot.org/100
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Other USB drivers set the bus_address field. EHCI should do this too.
Signed-off-by: Steven A. Falco <sfalco@coincident.com>
Change-Id: Ic4274c6744951ef7fa0cb135caf8b9f177d8bcaf
Reviewed-on: http://review.coreboot.org/99
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
Patrick Georgi