Commit Graph

2695 Commits

Author SHA1 Message Date
Patrick Georgi 68882a3322 Remove two perl calls with sed, and adds an alternative
for another two (using GNU date, and with limited impact if both
alternatives fail)

Those were the remaining perl calls in our build tree, so remove perl
from our dependency list in README.


Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-10 18:08:22 +00:00
Stefan Reinauer 531704ed71 Drop src/config alltogether
- drop two "newconfig" based files
- drop two obsolete doxygen config files and check
  in our latest Doxyfile.coreboot (that has been 
  used to build coreboot online documentation since
  2005 or so)
- move two i386 specific linker scripts to src/arch/i386

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5105 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-10 11:56:21 +00:00
Patrick Georgi f60a2567d2 Emergency fix: r5102 carried some local change that doesn't
belong in this patch, which makes tinybootblock builds fail.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5104 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-09 20:02:32 +00:00
Patrick Georgi 967952a102 Add image updating support. When selecting it, it
expects a coreboot.rom to be available, and adds the files to it.

It has no idea how to replace files, it merely adds them. It only works
with Tinybootblock and the bootblock is immutable.

The "clean" rules allow "make clean-for-update", which
removes everything but coreboot.rom

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5103 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-09 19:41:11 +00:00
Patrick Georgi 4b8a241935 Allow building images with different prefixes (ie. normal/romstage,
helloWorld/romstage, ...).
It defaults to fallback/, so there's no user visible change now.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5102 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-09 19:35:16 +00:00
Patrick Georgi 5543c66cca Actually set HAVE_OPTION_TABLES for the boards that need it.
(See last commit)

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5100 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-09 12:32:55 +00:00
Patrick Georgi 2063197a4f Move all the copies of the romstage.inc rule to
src/arch/i386/Makefile.inc

For that to work, I had to:
- Add a CONFIG_ROMCC variable
- Set that variable on all ROMCC boards
- conditionally choose romcc or gcc rule based on that variable
- remove those two rules from all the boards' Makefiles
- switch a couple of boards to HAVE_OPTION_TABLE, as they actually have.

Also remove the duplication of rules with the sole difference of if
they depend on option_table.h or not.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-09 12:21:10 +00:00
Patrick Georgi e4119ccff8 The COM2 enable code is global now. Use global API and
retire duplicate function.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5098 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-09 12:00:06 +00:00
Edwin Beasant e30db0e370 Port of CS5536 early UART setup from v3.
Permit early setup of COM2

Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-09 10:22:33 +00:00
Patrick Georgi af97d33ec4 Clean up ACPI:
- unify all iasl related rules into the toplevel Makefile
- build a filesystem standard for ACPI files and use it
- pass ACPI sources through cpp, so constants can be shared
  between C and ACPI more easily
- use cpp's #include instead of ACPI's Include() so cpp gets
  the whole picture

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5094 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-08 15:46:37 +00:00
Stefan Reinauer 0e92974904 straighten naming scheme for application processor rom stage files.
Apparently they are not used. If you have any of the boards touched in this
commit, please test and report (so we can figure out what to do with the
ap_romstage.c files in general)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-08 12:32:30 +00:00
Stefan Reinauer 38f147ed3d janitor task: unify and cleanup naming.
cache_as_ram_auto.c and auto.c are both called "romstage.c" now.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-08 12:20:50 +00:00
Stefan Reinauer d51eddbb66 fix further build.h dependencies that were undetected before we enabled it on
our parallel build server ;-)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5091 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-07 22:56:06 +00:00
Patrick Georgi bfff67db7d romcc _also_ has to wait for build.h to be generated.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-07 22:27:49 +00:00
Patrick Georgi abf2ad716d newconfig is no more.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-07 21:43:48 +00:00
Stefan Reinauer 389240f288 this should get the VIA VT8454c in shape with Kconfig
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5088 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-05 16:10:01 +00:00
Stefan Reinauer b6b192af9f Add -pipe .. notably speeds up windows builds.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5087 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-05 14:32:00 +00:00
Harald Gutmann 2598214f57 This patch fixes the build for the dsdt.asl/dsdt.c.
Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5086 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-04 11:08:59 +00:00
Stefan Reinauer f14e69bc62 typo
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5085 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-04 11:05:59 +00:00
Ward Vandewege de7c6fa5fc Revision 5051 broke Kconfig booting for the Tyan s2881 board. Up to 5050, there
were two SB_HT_CHAIN_ON_BUS0 sections in the mainboard Kconfig file - one
setting the parameter to 0, the other setting it to 2.

Revision 5051 removed one of the two SB_HT_CHAIN_ON_BUS0 sections - the wrong
one. This patch fixes that.

Revision 5051 removed the wrong setting because newconfig for this board was
*also* wrong. This patch fixes that too.

Tested on real hardware, both with Kconfig and newconfig.

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5083 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-04 03:03:39 +00:00
Stefan Reinauer 04d74b1fdd Move CAR settings for all GX1, GX2, LX and Intel Slot2 boards to the CPU.
This automatically adds the settings for those boards that didn't have settings
at all yet. Also, small fixup to compareboard.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

--> Please help porting all boards from newconfig to Kconfig <--

This is a lot of janitor work and we can use your helping hands.
The sooner we can get rid of Kbuild, the better. The KBuild report
on the mailing list shows the config differences between newconfig
and Kconfig. In theory, all Kconfig configs should be equal to their
newconfig pendant. In practice it's better to come close but stay 
clean.

--> Please help porting all boards from newconfig to Kconfig <--



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5082 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-04 01:32:43 +00:00
Uwe Hermann d0d7c0158d Supermicro H8QME-2+ (Fam10) whitespace fixes (trivial).
This makes the code more similar to the h8dmr_fam10 target in order to make
the diff between both smaller and more readable.

Build-tested with newconfig and kconfig.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5080 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-03 22:07:57 +00:00
Patrick Georgi a6c337dec0 Guards against errors that are hard to track down:
- if crt0s is empty (eg. because crt0-y is still used),
  break the build, and say where that behaviour changed
- if a stage is unusable for cbfstool because it's placed
  outside the ROM space (linked to 0 is somewhat notorious),
  warn about it, give some hints and exit instead of crashing.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stefan.reinauer@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5077 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-03 17:56:37 +00:00
Uwe Hermann f1b6f1f2bb Fix incorrect board names in Kconfig strings (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5076 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-03 17:25:34 +00:00
Knut Kujat 081c8978ac This patch adds the Supermicro H8QME-2+ (fam10) Motherboard with the
following remaining issues:
- ACPI not working
- SMBus gets irq 0 instead of 5
- Loading VGA rom fails (using seabios to do it)

(copied a newer Makefile.inc from h8dmr_fam10 vs. the patch on the list)

Signed-off-by: Knut Kujat <knuku@gap.upv.es>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5075 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-03 16:04:40 +00:00
Stefan Reinauer 5a559d4386 The UART2 on the AMD cs5536 is incorrectly configured in two places.
GPIO lines 4 and 3 are swapped and also incorrectly put in IR mode receive (compound fault).

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Edwin Beasant <edwin_beasant@virtensys.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5074 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-03 13:49:24 +00:00
Joseph Smith fa742da56b Alot of it is trivial clean ups and 830 is now able to initialize one row/side of memory at a time.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-01 22:51:18 +00:00
Stefan Reinauer 14be4d0d52 - Improve help texts for option ROM initialization methods
- disallow REAL_MODE method if ARCH_X86 is not set.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5072 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-31 21:46:12 +00:00
Joseph Smith 6f0074e6b6 Trivial fixup on IP1000 and RM4100 copyright entries.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Joseph Smith <joe@settoplinux.org>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5069 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-30 14:56:15 +00:00
Stefan Reinauer b8a89da213 These lines slipped in. Sorry for the inconvenience.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5068 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-30 10:58:30 +00:00
Stefan Reinauer c2ef1463b6 ifeq wants a space before the (
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-30 10:50:57 +00:00
Stefan Reinauer e37785791a * fix crt0s/ldscripts paths to fix out of tree build.
* fix iasl output directory for i945 boards (patch
  for moving it to the mainboard directory will follow)
* coreboot_table.c: lb_mainboard can be static
* coreboot_table.c: dump memory table in debug and spew mode
* fix a warning in bootblock.c
* don't include arch/i386/init in arch/i386/Makefile.inc
* announce generation of crt0_includes.h
* allow overriding $(obj)
* drop unused src_types from Makefile
* correctly use hostname -s instead of hostname for COMPILE_HOST

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5065 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-30 09:47:18 +00:00
Joseph Smith 89e45773a9 RCA RM4100 and Thomson IP1000 auto.c rework.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5064 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-29 19:15:10 +00:00
Patrick Georgi d9d5e345c0 reformat Kconfig file, too.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5060 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-27 19:55:01 +00:00
Edwin Beasant 4355beb893 Add the MSR writes that are needed to provide VGA legacy routing for the Geode LX
Add appropriate Kconfig defines to provide 8mb of VGA ram allocation
Add the Kconfig defines to cover TSC calibration from TIMER2 and UDELAY setup
Two small warning removals about excessive prototyping.

Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5059 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-27 19:20:29 +00:00
Edwin Beasant 87d0c542b6 Change memory map of geode lx: 768kb-systop is a
single range.
This change allows both seabios and filo to boot
linux successfully (which was confused before)

Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5058 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-27 18:19:33 +00:00
Edwin Beasant 47afa44a9f Mark c0000-fffff as usable on geode-lx. SeaBIOS needs it.
a0000-bffff might be usable as well, but it won't hurt to
keep that range excluded.

Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5057 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-26 15:34:15 +00:00
Edwin Beasant a9796ed362 - Clean up and comment writing of MSRs for cache control (Backport from v3)
- Invalidate Cache Tags (by means of in-place rewrite of cache data) which allows CAR data to be flushed to RAM
- Re-enable cache after flush of CAR to RAM


Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-26 11:22:43 +00:00
Patrick Georgi e8d943f266 Fix ACPI build on a couple of boards (now that it's active)
Fix timer handling on amd/sc520 systems
Match UDELAY_* configuration of newconfig in Kconfig

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25 15:17:11 +00:00
Stefan Reinauer 3e4a0b87c8 This code was copied from amdk8 and never really made usable.
It's supposed to be a userspace regression test for ram init, but
in fact, it doesn't even execute ram init. This was suggested by
Carl-Daniel on 2009-08-27
Thus, dropping it.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25 13:15:17 +00:00
Patrick Georgi 2b962a3c39 More Kconfig changes to improve match with newconfig:
DIMM_SUPPORT
APIC_ID_OFFSET
ACPI_SSDTX_NUM
IRQ_SLOT_COUNT
MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
	(except msi/ms9185)
MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
MEM_TRAIN_SEQ
HAVE_ACPI_RESUME

Also remove MMX (kconfig specific) and HAVE_MOVNTI and IOAPIC
(which we deliberately differ in kconfig) from compareboard
report.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25 10:50:21 +00:00
Patrick Georgi 29647d97c5 Align several kconfig options to match newconfig:
HT_CHAIN_UNITID_BASE
HT_CHAIN_END_UNITID_BASE
SB_HT_CHAIN_ON_BUS0
SB_HT_CHAIN_UNITID_OFFSET_ONLY
MAX_CPUS
MAX_PHYSICAL_CPUS
ROM_SIZE
TSC_X86RDTSC_CALIBRATE_WITH_TIMER2

Also hook up asus/p2b-ds

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25 07:56:01 +00:00
Stefan Reinauer 16f515adfc These two files accidently got a wrong license header.
Clarified with the authors

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Harald Gutmann <harald.gutmann@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5044 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-20 18:44:30 +00:00
Stefan Reinauer 762a230dc0 Kontron 986LCD-M MP table:
When any of the onboard network cards are disabled, the bus numbers change 
and thus PCI devices in the riser wouldn't get their interrupts right if a
kernel without ACPI support is booted. This patch dynamically creates the 
correct bus numbers for the firewire and riser card entries

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5043 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-19 21:15:37 +00:00
Stefan Reinauer c6f2bd0d69 Add Yabel support (int 15 5fXX callbacks for vga bios) on the kontron 986lcd-m
so it's possible to use the LCD panel connector. Values are hard coded instead
of read from CMOS but it's a start.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5042 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-19 21:15:01 +00:00
Stefan Reinauer 8ed1b6d2dc drop COREBOOT_V2 and COREBOOT_V4 define. We're not sharing code with v3
anymore so this ugly hack is no longer needed.
 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5040 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-19 21:13:44 +00:00
Patrick Georgi d5663bac2c Move all IOAPIC selection to southbridges, and remove them
from mainboards.
Some adaptations were necessary after the IOAPIC cleanup,
so this should fix the build.

Fix intel/d945gclf build, which was missing some ACPI component.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5039 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18 17:30:36 +00:00
Stefan Reinauer 2e97383b54 run preprocessor on DSDT of D945GCLF, otherwise
smart iasl will segfault.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5038 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18 15:08:14 +00:00
Stefan Reinauer 29c0ec10a6 get rid of Kconfig warning.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5035 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18 11:09:24 +00:00
Stefan Reinauer 838c5a5d80 Add support for the Roda RK886EX a.k.a Rocky III+ ruggedised notebook
http://www.roda-computer.com/en/products/notebooks/rocky-iii-rk886ex.html

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5031 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17 14:08:17 +00:00