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32688 Commits

Author SHA1 Message Date
Eric Lai 40d816e964 mb/google/drallion: Enable dynamic sar 
Drallion will use two sar table for tablet and clam shell mode.

BUG=b:140469407
TEST=Build and check the config has enable
BRANCH=none

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I0367741e795a3b00c490ecb1972d22b9f454134f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38386
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
 2020-01-14 18:23:09 +00:00
Keith Hui 9b4b33ac37 sb/intel/i82371eb: Add PIIX4 definitions 
These new definitions will be used by two other changes.

Change-Id: I242244c444f36af188c871dce037a7a9250206cd
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38367
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-01-14 18:19:14 +00:00
Kyösti Mälkki f555a58abc sb/intel/common: Declare common smbus_base() and enable_smbus() 
This avoids including platform-specific headers with different
filenames from common code.

Change-Id: Idf9893e55949d63f3ceca2249e618d0f81320321
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38232
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-14 18:18:26 +00:00
Kyösti Mälkki 542fa6de38 soc/intel/baytrail: Add SOUTHBRIDGE_INTEL_COMMON_SMBUS 
Change-Id: Ie026b8c57046d951752158fd28277e338ed1421c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38236
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-01-14 18:16:48 +00:00
Kyösti Mälkki 8dd2d485b8 intel/nehalem,ibexpeak: Move enable_smbus() call 
Change-Id: I6e43f7696b289ce9e0319afdcc73889ddabd4db1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38297
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
 2020-01-14 18:13:34 +00:00
Kyösti Mälkki ffa520fc13 intel/sandybridge,bd82x6x: Move enable_smbus() call 
Change-Id: Icc6b572fea0c2097a7ed19b3f76c1e658cf32a9a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38298
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
 2020-01-14 18:13:24 +00:00
Kyösti Mälkki 1cfafe25e3 intel/{gm45,x4x},i82801{ix|jx}: Move enable_smbus() call 
Change-Id: Idc7631abb550b31af722ccf3b69afdc01fdb616e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38268
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-01-14 18:13:15 +00:00
Kyösti Mälkki 7adc370dc7 intel/{i945,pineview},i82801gx: Move enable_smbus() call 
Change-Id: I7a9e613f9a142e04030672f85ea80c56151be3c5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38296
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-01-14 18:11:01 +00:00
Kyösti Mälkki a28ee1b186 drivers/pc80/rtc: Clean up some POST_CODE_EXTRA use 
Change-Id: I5ecfa0860a28547f76a72592a8d07bca67822217
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38188
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-01-14 18:09:30 +00:00
Kyösti Mälkki 10bc806ab3 console/post: Split parts to arch/ 
Both IO port and cmos are currently arch/x86 only features.

Change-Id: I010af3f645c0be38dd856657874c36103aebbdc2
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38187
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-01-14 18:08:49 +00:00
Elyes HAOUAS 40f539f8c4 crossgcc: Upgrade cmake to version 3.16.2 
Change-Id: I2012f0adcb348a3ea6c50c361a49a0a600d3db3d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38162
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
 2020-01-14 17:59:51 +00:00
Elyes HAOUAS eda12901fa util/crossgcc: Add comment on IASL version 
Change-Id: I81c6f4134610bcd35e173cdb002ef821788b0538
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38164
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
 2020-01-14 17:59:33 +00:00
Jonathan A. Kollasch a1114f608b autoport: Add Xeon E3-1200 v2 memory controller ID 
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Change-Id: Ic5f18669a04397f570d49c1ff056cd90b3eb04a1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38345
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
 2020-01-14 17:02:30 +00:00
Angel Pons 63ae8dec79 nb/intel/sandybridge: Drop 'or zero' instances 
Change-Id: Icd0dfdf311ac141992ec6a6026ca92e54e8d2094
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38339
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
 2020-01-14 12:39:37 +00:00
Subrata Banik 2883f7af94 soc/intel/cannonlake: Fix ASL compilation remarks 
This patch fixes below ASL compilation remarks

1. dsdt.asl    495:   Method (_DSM, 4)
Remark   2119 -              ^ Control Method marked Serialized (Due to use of Switch operator)
2.
dsdt.asl    721: Name(GPMB, Package(5) {0})
Remark   2063 -                    ^ Initializer list shorter than declared package length

Change-Id: Iabd6c39025713dda7aa69cb479f003fbec8855b3
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38385
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lance Zhao <lance.zhao@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-14 07:26:19 +00:00
Joe Moore 159cd3f421 vc/amd/agesa: Fix out of bounds read 
ByteLane is used unitialized from prior for statement,
creating a potential out-of-bound read of RxOrig[MaxByteLanes].
PassTestRxEnDly[MaxByteLanes] never appears as rvalue; all for
loops have ByteLane < MaxByteLanes exit condition.

Change-Id: Icd18a146aba6b6120d37518d8c40c7efbc05afa3
Signed-off-by: Joe Moore <awokd@danwin1210.me>
Found-by: Coverity CID 1241804
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36192
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
 2020-01-13 11:22:40 +00:00
Elyes HAOUAS 04e49425ec mb/packardbell/ms2290/acpi_tables: Remove unneeded includes 
Change-Id: Iba380cf96991c9e1fec96aa3d793818524388897
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38375
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-13 11:21:40 +00:00
Elyes HAOUAS db10892a17 mb/lenovo/thinkcentre_a58/acpi_tables: Remove unneeded includes 
Change-Id: I8f8e43d0f146b1050eb68da197504441b60a4120
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38374
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-13 11:21:24 +00:00
Elyes HAOUAS 9e17b749d2 mb/intel/*/acpi_tables.c: Remove unneeded includes 
Change-Id: I3b110ab749992d1c1793b1d4de43c1d2e8ca15ac
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38373
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-13 11:21:14 +00:00
Elyes HAOUAS 615ef58a29 mb/asus/*/acpi_tables.c: Remove unneeded includes 
Change-Id: Iba39673a81f235204d6ae9fe9e18239e5b81b17f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38372
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-13 11:20:51 +00:00
Elyes HAOUAS 7a4e5e3988 mb/gigabyte/ga-g41m-es2l/acpi_tables.c: Remove unneeded includes 
Change-Id: I4b3b2d801698305dc6c214c58d367772ea2096a3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/26894
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-13 11:20:24 +00:00
Elyes HAOUAS cf76076f22 mb/gigabyte/ga-b75m-d3h/acpi_tables.c: Remove unneeded includes 
Change-Id: Ic94e60188dbb9cdee959ecfa5ef14c92f125e3f2
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/26892
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-13 11:20:13 +00:00
Elyes HAOUAS 25479cd207 mb/foxconn/g41s-k/acpi_tables.c: Remove unneeded includes 
Change-Id: I41e3cbb4fbdd6680c1d9d347efc35d1618233a64
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/26901
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-13 11:19:55 +00:00
Elyes HAOUAS 3faefa2651 mb/asrock/g41c-gs/acpi_tables.c: Remove unneeded includes 
Change-Id: Icd9efdf5fb4d57756704c62b5f575a3835a8ce11
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/26900
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-13 11:19:32 +00:00
Elyes HAOUAS b7da27ccf4 mb/asus/p8z77-m_pro: Fix typos 
Change-Id: I3c63ca745bf10ec0b0c4cef898db3f7ebfee5bde
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38364
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-01-13 11:18:31 +00:00
Elyes HAOUAS 293b5b3531 mb/asrock/imb-a180: Fix typo 
Change-Id: Iff032a321301772789a42f29cfc187c446b4cfa1
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38360
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-13 11:18:19 +00:00
Elyes HAOUAS 31b2f8f1d0 arch/x86/cf9_reset: Fix typo 
Change-Id: I4a8d29ab647837965e5341d019664f0ed401639a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38311
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-13 11:16:26 +00:00
Elyes HAOUAS 6716babee5 arch/x86: Fix typos 
Change-Id: I944b9bf8f518eff9b539769825174bf1544e6b34
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38310
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-13 11:15:42 +00:00
Wim Vervoorn af995bbd75 mb/facebook/monolith: Enable SpeedStep and DPTF 
BUG=N/A
TEST=tested using fwts on facebook monolith.

Change-Id: Ia3dd195f887055448d42a7584e2c88322f0ec44b
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38131
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-13 11:01:40 +00:00
Martin Roth dfd89fc85b util/lint: Enforce SPDX licenses only in src/acpi directory 
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I9241f96eed652c8ca72d4f4a94f860a875e55680
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36177
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
 2020-01-13 10:03:07 +00:00
Maulik V Vaghela 50ee91c17c soc/intel/tigerlake: Select correct fsp_param as per SoC Kconfig 
New Kconfig for Jasperlake soc was created and fsp_param for Jasperlake
has differences compared to Tigerlake. Thus renaming fsp_params.c to
fsp_params_tgl.c to point out correct file as per soc selected.

Also adding new file for fsp_param_jsl for Jasperlake SoC and currently
its the copy of fsp_param_tgl.
TODO: update files with correct fsp_params

Change-Id: I12815ae28a1eb4c64afda0a85b5c14fc0da3e4b1
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37267
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-01-13 03:39:59 +00:00
Paul Menzel 58ecefb181 ec/lenovo/h8: Prepend EC log message with *H8* 
All other messages in `ec/lenovo/h8` are prepended with *H8*, so also prepend
the EC version log message with *H8*.

    EC Firmware ID 79HT50WW-3.4, Version 7.01A
    No CMOS option 'usb_always_on'.
    H8: BDC detection not implemented. Assuming BDC installed
    H8: WWAN detection not implemented. Assuming WWAN installed
    No CMOS option 'fn_ctrl_swap'.

Change-Id: Ib4f341946a336b57bd96c053a05364276caad1ac
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38312
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
 2020-01-13 00:35:34 +00:00
Michał Żygowski af258cc179 mb/*/*: use ACPIMMIO common block wherever possible 
TEST=boot PC Engines apu2 and launch Debian Linux

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I648167ec94367c9494c4253bec21dab20ad7b615
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37401
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
 2020-01-12 19:28:33 +00:00
Elyes HAOUAS cbbfb702f6 include/arch/romstage: Fix typo 
Change-Id: Ie0c80792210ded7f81184b60ba2b0b51c13db283
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38308
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-12 19:16:40 +00:00
Elyes HAOUAS 1862b503a4 include/arch/acpigen: Fix typo 
Change-Id: I277d4a36f3d76ff5e12f255165e2b08480c39167
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38307
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-12 18:45:23 +00:00
Karthikeyan Ramasubramanian 0e971e11a0 soc/intel: Fix ACPI device operations initialization 
Initialize ACPI device operations only when CONFIG_HAVE_ACPI_TABLES is
enabled.

BUG=None
TEST=Build Test

Change-Id: I5c5266885d8b08338d17a87bb95110765882120e
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38309
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
 2020-01-12 18:12:14 +00:00
Kyösti Mälkki b71fb5282e intel/e7505: Always enable DIMM compatibility checks 
Change-Id: I4862b4f0a029f6f4a1ff7e66cf814fa8f5686d3f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38295
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-12 16:06:52 +00:00
Kyösti Mälkki bd077cb396 intel/e7505: Remove commented out suspicious code 
Change-Id: I566f016eb4fb710a5246be8b088ab0d2ed00041c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38294
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-01-12 16:05:23 +00:00
Kyösti Mälkki d1141ab5a4 intel/e7505,i82801dx: Refactor raminit 
Avoid direct enable_smbus() call from northbridge code.

Change-Id: I077e455242db9fc0f86432bd1afab75cb6fb6f4c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38267
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-12 16:03:45 +00:00
Kyösti Mälkki 61af679838 aopen/dxplplusu,intel/e7505: Move mainboard_romstage_entry() 
Change-Id: I15aaefdf0c81f58adfeb6f4dde2f05b3c06fd145
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38266
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-12 16:02:55 +00:00
Kyösti Mälkki 9e581ec226 intel/e7505,i82801dx: Remove wrapper spd_read_byte() 
Change-Id: I4a2d3043f77c9aa9c93b4718c5742fbd8d69b79f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38235
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-01-12 16:02:33 +00:00
Kyösti Mälkki 7a95575b85 asus/{p2b-x,p3b-f},intel/i440bx: Move mainboard_romstage_entry() 
Change-Id: I3598f548c2d122906fda09c85b5a1c82b0da993b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38255
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-01-12 16:02:00 +00:00
Kyösti Mälkki 3f882fafa0 intel/i440bx,i82371: Remove wrapper spd_read_byte() 
Change-Id: Ib94ce73eb22c5b4b489dbd871279e8cd9a7010a7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38234
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-12 16:01:21 +00:00
Kyösti Mälkki 93e08c75d3 asus/p3b-f,intel/i440bx: Move enable/disable_spd() call 
Change-Id: I4a324dcebcd53439206205e64c5bbb7c6eac4fb2
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38254
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-12 16:01:05 +00:00
Kyösti Mälkki 7f40bd667c sb/intel/common: Move SMBus register layout outside header 
Change-Id: I841cc3bd636414c59af15d64d3f96b9be158af98
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38231
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-01-12 16:00:35 +00:00
Elyes HAOUAS e7840af3b7 mb/lenovo/g505s: Fix typos 
Change-Id: I38fdc8ff92cffe467b2ca176e841bf601be9d24b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38369
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
 2020-01-12 06:07:31 +00:00
Angel Pons 891f2bc6c8 nb/intel/sandybridge: Tidy up raminit code 
Some things fit in a single line now that we have a 96-char limit.

Tested, does not change the binary of Gigabyte GA-H61MA-D3V.

Change-Id: I3bef75291d1ecb2c9c3c74d9e78caf84a1f726aa
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38317
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
 2020-01-11 19:11:18 +00:00
Jonas Moehle bece6e86dd src/mainboard/*.asl: Remove _HID / _ADR objects overlapping 
ACPI spec:
 "A device object must contain either an _HID object or an _ADR
object, but should not contain both."

Signed-off-by: Jonas Moehle <ad-min@mailbox.org>
Change-Id: I949393558f5af66689c167b2e593a1461f641962
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37935
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-01-11 11:12:32 +00:00
Angel Pons 11c5b3b180 HP sandy/ivy laptops: Sort Kconfig `select` lines 
Sort them alphabetically.

Change-Id: Ica7462d28d2aad184b6545db46547a01bc2a8ccb
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38089
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
 2020-01-10 21:51:08 +00:00
Angel Pons b877013fbd mb/hp/revolve_810_g1: Drop default DRAM_RESET_GATE_GPIO 
When this board was added, S3 resume was tested and working, so it must
be good enough.

Change-Id: Ie095868ea2de7846b995271baf8155e57b495e40
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38088
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
 2020-01-10 17:27:44 +00:00