55a6d461a6
new mobo
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1630 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-23 20:25:17 +00:00
03935036ab
adding 855pm
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1629 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-23 16:43:25 +00:00
198409afe0
create some technologic systems ts530 infrastructure
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1628 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-07 19:58:46 +00:00
40ab2d1213
add Config file for ts5300
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1627 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-07 19:34:46 +00:00
7bc2830668
initial version of TS5300 target
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-07 19:20:44 +00:00
f030bab1a8
get AMD Solo building again..
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1625 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-07 19:13:27 +00:00
8152126529
added testbios for V2
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1624 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-08 17:18:27 +00:00
4c5060dc2b
move default_resource_map to its own file
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1623 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-08 16:59:06 +00:00
f76a613a9a
code reformat, removed unused code
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1622 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-08 16:57:43 +00:00
9ab91f5acb
code reformat
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1621 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-08 16:54:20 +00:00
badf114438
fixed again.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1619 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-06 16:57:44 +00:00
737de849d5
fix for simple error
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1618 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-06 16:35:50 +00:00
e89137b2ad
remove_logical_cpus need call get_option
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1617 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-01 04:21:49 +00:00
70093f7875
Intel E7501 P64H2 ICH5R support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-01 03:55:03 +00:00
7dea9552d5
- Small bug fixes to romcc. The deep problems with not inlining functions remain
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1615 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-29 05:38:37 +00:00
596a6674fd
add target for qemu-i386
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1614 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-28 12:20:42 +00:00
7fb8916011
make cpuid and mtrr check conditional. They are not there on cpus older than
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i586/i686.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1613 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-28 12:06:20 +00:00
f2065a4cf9
add qemu graphics card initialization driver
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1612 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-28 12:04:06 +00:00
e2b53e1432
add northbridge code for qemu-i386
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1611 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-28 11:59:45 +00:00
4a3bb76aa8
commit initial qemu support (see http://fabrice.bellard.free.fr/qemu/ )
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1610 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-28 11:57:31 +00:00
bbf16821c0
add target for amd serenade board
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1609 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-16 19:06:33 +00:00
c7d4db7ff1
Now it should build on the first try :)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1608 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-16 15:32:43 +00:00
99efe80122
add support for AMD Serenade mainboard, why we have phantom devices here?
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1607 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-15 23:55:55 +00:00
6ae2ac3739
add support for AMD Serenade mainboard, why we have phantom devices here?
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1606 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-15 23:37:34 +00:00
9b1a2ff96f
code reformat, is the pirq table correct?
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1605 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-15 03:00:35 +00:00
0b607b39ba
simplify pirq handling. Only apply consistency fixes on the copied version
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of the pirq table.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1604 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-07 10:25:42 +00:00
ab8ff84402
Add extra phase before memory init.
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Rename sdram_init to memory_init
NOTE: need to test sandpoint and ep boards!
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1603 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-05 14:54:46 +00:00
8ce104f487
memory and pci up!
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1602 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-05 14:36:23 +00:00
2f2e63bc7d
BDI2000 config file
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1601 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-04 22:46:30 +00:00
c72e27616d
enable early uart
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1600 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-04 22:28:23 +00:00
cb5f0ce6a7
fix addressing
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1599 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-04 22:27:33 +00:00
91d60a8fca
first cut
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1598 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 16:57:09 +00:00
2906362ea7
nothing yet
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1597 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 16:56:01 +00:00
5b2565a6df
fixup
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1596 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 16:55:24 +00:00
f78ba9dfa6
prelim sdram
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1595 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 16:53:41 +00:00
0ba0ce6b79
briQ timer support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1594 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 16:51:18 +00:00
66c07cdc94
Make names more sensible.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1593 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 16:30:02 +00:00
ca68a91eff
Clock (not timer) routines are board specific. Moved to appropriate
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mainboard dir.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1592 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 14:39:16 +00:00
0dcb172904
Clock (not timer) routines are board specific. Moved from mpc74xx dir.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1591 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 14:38:12 +00:00
65046b16f9
remove brain-dead verify code
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1590 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 14:34:31 +00:00
515f6b68a0
disable noop usb drivers. remove warnings
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1589 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 07:57:12 +00:00
2c83b27c91
brush up language, unify terms, correct some urls.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1588 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-02 11:25:31 +00:00
5a78bd03a6
- Don't confuse return statements with conditional branches
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1587 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-29 21:26:03 +00:00
bb20a72163
This will never happen unless the code is buggy (in which case it's easy to
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reenable debugging output).
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1586 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-28 15:10:04 +00:00
34e3a146a9
console code cleanup.
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- drop srm console code (not supported anyways)
- make internal uart8250 console functions static
- split vsprintf.c into vsprintf.c and vtxprintf.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1585 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-28 15:07:03 +00:00
319d6730e9
add some debugging
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1584 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-28 14:55:28 +00:00
d67e76568a
- Added volatile to asm statements in auto.c and failover.c
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- Updated the romcc version in Config.lb
- Fixed type sizes in romcc_io.h and io.h inl() returning a byte was nasty
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1583 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-28 14:18:45 +00:00
9008960339
- Upgrade to romcc version 0.63
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This includes more test cases
Lots of small bug fixes
A built in C preprocessor
Initial support for not inlining everything
__attribute__((noinline)) works
Better command line options and help
Constants arrays can be read at compile time
Asm statements that are not volatile will now be removed when their outputs go unused
Loads and stores that are not volatile will be removed when their values go unused
The number of FIXMES in the code is finally starting to go down.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1582 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-28 14:11:54 +00:00
7664d1cb87
Default and maximum loglevels were too high, fixed.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1581 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-27 21:17:13 +00:00
6f52a90ad3
Fixed a silly typo :)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1580 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-27 21:10:47 +00:00
Ronald G. Minnich