613cb6171f
- fix irq routing for epia-mii cardbus slot. (signed off by Nick Barker)
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- some minor cleanups
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2407 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 07:52:41 +00:00
9cf0050d68
Slow down the clock, per Tom Sylla
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Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2406 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 04:33:07 +00:00
9cf642bad3
fix for qemu northbridge, from Ed Swierk
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Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2405 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 04:12:35 +00:00
aefa3d74f9
warm boot patch from richard smith.
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signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2404 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 01:57:47 +00:00
5ef4c598fb
Fix the irq_tables
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signed-off-by: ronald g. minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2403 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 01:14:45 +00:00
cdb89be9e8
mods for qemu, these build
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signed-off-by: ronald g. minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2402 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 01:10:08 +00:00
94b17c6a3c
add romcc manpage from Uwe Hermann
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2401 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-08 17:44:42 +00:00
3e03d03a17
hurry hurry before we might start 3.0 ;-)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2400 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-08 16:34:51 +00:00
b59906c1e9
remove dangerous call to normal image; no backup on OLPC
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2399 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-07 15:31:27 +00:00
42fb3164ed
Uwe Hermann:
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Here's a patch which makes all "option ROM_SIZE" lines use x*y format
which is a lot easier to read and modify, without having to use your
brain or a calculator ;-)
Tested with abuild, no errors.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-06 16:42:51 +00:00
ca98f32dd5
Add support for ITE it8705f from Uwe Hermann
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2397 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-06 16:15:02 +00:00
2073ce2675
Patch from Uwe Hermann:
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* support for it8716f.
* minor fixes for it8712f, it8671f, it8673f
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2396 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-06 16:12:39 +00:00
e918a3ab00
Add patch from Uwe Hermann to support more ICH southbridges
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2395 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-06 15:48:48 +00:00
61be08bd3e
merge latest code from Uwe Hermann
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2394 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-29 17:41:14 +00:00
abaf71a2d5
it8661f support from Uwe Hermann
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2393 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-29 00:45:42 +00:00
bcd1f2310d
- Much better USB P4 fix.
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This one actualy works. You cannot just go mucking about with stuff that the VSA
has under its thumb. Bad Things happen. This does it the VSA way.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2392 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-28 16:18:32 +00:00
6af77aeb40
Support for two new ITE superio parts: it8712f
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and it8673f from Uwe Hermann.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2391 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-25 19:29:57 +00:00
051427c40a
Print a warning if southbridge is not known to flashrom.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-25 19:21:42 +00:00
fa60e7f9d0
- USB P4 as host fix
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This should make the USB P4 work as a USB host
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2389 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-25 16:14:31 +00:00
64443b8c49
- fix a silly pointer dereference thinko in my previous commit
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2388 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-25 14:06:48 +00:00
59ba228f92
- Added suport for enabling USB P4 on the olpc
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USB P4 is disabled by default and we need to setup the mux bits proper
to make it work. This is the frame work for that. All thats needed
is the right address values
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2387 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-25 05:01:30 +00:00
689c144839
Removing $Id$ tags as they have no meaning in SVN
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2386 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-23 14:33:54 +00:00
eca92fb371
Uwe Hermann:
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here's a patch which replaces all DOS newlines with Unix newlines, and
removes some useless $Rev$, $Id$, and $Header$ tags.
(part 1)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2385 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-23 14:28:37 +00:00
6a1540b606
enable graphs created by dot.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2384 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-23 11:47:58 +00:00
e4ff2a51df
fix special chars in document.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2383 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-23 10:52:12 +00:00
60902ed3a1
drop extensions directory. it has never been used.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2382 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-22 13:21:39 +00:00
1ac1cf527d
delete unused device.
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set rom to 512k
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-18 19:25:25 +00:00
8a02b7d54e
add smsc part. Mod sun board to use smsc part for now
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2380 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-17 20:31:09 +00:00
bff323b93b
updates to make gx1 IRQ map work. not tested;
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signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2379 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-16 14:38:00 +00:00
157e1ab47c
share decompression code.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2378 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-16 14:22:10 +00:00
60146861aa
this file is already included by auto.c on all targets.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2377 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-15 13:52:51 +00:00
df6fb720b9
update license template.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2376 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-12 22:03:36 +00:00
9d65e6ec02
cleanup patch from Uwe Hermann.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2375 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-11 23:48:14 +00:00
e5522c39c0
- revert Config.1M.lb back to PLCC size and add new SPI config file
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SPI config file is 1M-128k to allow for EC code
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2374 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-11 08:15:19 +00:00
273595c6f7
- fix dependency rule for Makefile and Makefile.settings
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The make dependency rule for Makefile and Makefile.settings was completely broken. No way it ever worked.
OLPC buildrom flushed out this issue.
If you updated the Config.lb file in your target/<mfg>/<mainboard> directory and then switched to
target/<mfg>/<mainboard>/<target> and ran 'make' you would get a permission denied error due to the
make file trying to run 'config.py' directly rather than 'python config.py'
We never saw this because we always run target/buildtarget <target> and that sets up everything
correctly.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2373 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-11 06:49:39 +00:00
f8519dc8dc
build 1024-128k binary as per requests.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2372 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-11 00:08:37 +00:00
4c556c5ccb
fix serial initialization (from Uwe Hermann)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2371 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-10 09:38:39 +00:00
af9cd4d0cf
change from AMD for the IRQ10 problem.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2370 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-10 03:23:48 +00:00
08af3f535d
mods for the ultra40 bringup. This now builds.
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amd gx2 north -- don't set anything in the north, it conflicts with vsa
settings. So we have our own pci_set_resources that is essentially a
no-op -- just calls the kids.
olpc rev_a config -- DISABLE the compressed rom stream. This SHOULD NOT
have been set -- it is untested and caused real trouble.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2369 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-09 02:21:49 +00:00
e53d03c211
fix up the links for the ultra 40 -- i/o on ht 1 on each cpu
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2368 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-08 21:42:18 +00:00
a758acab7f
fix up config space.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2367 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-08 18:02:12 +00:00
90e68aef68
initial work on sunw ultra40. It's wrong :-)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2366 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-07 20:02:02 +00:00
4253844428
add support for ite/it8671f superio from Uwe Hermann.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2365 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-07 16:48:11 +00:00
ac4ca2b17e
p2b uses i82371eb as well.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2364 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-04 08:58:17 +00:00
a14b46895c
final rename orgy. sorry for the inconvenience. This should fix it again
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2363 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-04 07:50:59 +00:00
c76b85d6a7
ouch. it's 8_2_371. I'll fix it. This commit breaks compilation
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2362 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-04 07:47:28 +00:00
d34758f05a
rename southbridge i440bx to its actual name i8371eb
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2361 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-04 07:45:45 +00:00
8e3464109e
Changelog:
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* src/cpu/amd/model_lx/model_lx_init.c
L2 cache initialization removed (moved to northbridge.c)
* src/include/cpu/amd/lxdef.h
more checked values
* src/northbridge/amd/lx/northbridge.c
L2 cache initialization added
cpubug() commented out
* src/northbridge/amd/lx/raminit.c
empty function sdram_set_registers() is in use, don't remove
* src/mainboard/artecgroup/dbe61/Config.lb
irqmap changes
* src/mainboard/artecgroup/dbe61/irq_tables.c
tentative changes to irq table (currently not in use)
* src/mainboard/artecgroup/dbe61/mainboard.c
irq assigned manually to NIC
* src/mainboard/artecgroup/dbe61/Options.lb
gcc 4.0 is OK
* targets/artecgroup/dbe61/Config.lb
64K for VSA is OK at moment
Signed-off-by: Indrek Kruusa <indrek.kruusa@artecdesign.ee>
Signed-off-by: Andrei Birjukov <andrei.birjukov@artecdesign.ee>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2360 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-03 16:48:18 +00:00
8ad7c06535
slightly changed C.D. Hailfinger's precompressed rom stream patch
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2359 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-03 16:19:27 +00:00
9327d22641
some documentation updates by Uwe and some smaller ones by me.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2358 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-03 10:49:09 +00:00
Stefan Reinauer