Commit Graph

2350 Commits

Author SHA1 Message Date
Myles Watson ed03556fbf src/Kconfig: Remove HT-specific options.
src/cpu/amd/socket_F/Kconfig: Remove second occurrence of CPU_SOCKET_TYPE.
src/mainboard/amd/serengeti_cheetah/Kconfig: Add HT_CHAIN_UNITID_BASE here, since it is board specific.
src/mainboard/tyan/s289X/Kconfig: Fix typo and change APIC_ID_OFFSET to match old config.
src/devices/Kconfig: Change default value of *_PLUGIN_SUPPORT to match old config.
src/southbridge/amd/amd8131/Makefile.inc: Remove check since it was a typo, and the correct variable is checked in the parent directory.
src/Makefile:Use devicetree.cb instead of Config.lb to generate static.c.


Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4657 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22 21:29:32 +00:00
Myles Watson a74ae635ca failoverR.diff: Revert my failover change since Kconfig only supports fallback.
kconfig_s2892.dif: Add support for Tyan s2891, s2892, and s2895 to Kconfig.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4656 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22 18:53:50 +00:00
Myles Watson 45bb25f36f tables.diff: Add Kconfig dialogues for ACPI, MP_TABLE, ...
Kconfig_bools.diff: Change some more ints to bools, change some default values.
xip_size.diff: Make XIP_SIZE + XIP_BASE add up to 4GB.
smp.diff: set CONFIG_SMP based on MAX_CPUS.


Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4655 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22 18:49:08 +00:00
Carl-Daniel Hailfinger 7cf8c58618 Kill dead comment.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4650 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22 12:31:57 +00:00
Carl-Daniel Hailfinger 93c027279f Help text for maximum and default console loglevel in Kconfig.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4649 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22 12:22:35 +00:00
Carl-Daniel Hailfinger a4d4770a3e r4534 introduced devicetree.cb in every mainboard directory, but didn't
copy any comment lines before the start of the device tree.
Fix up amd/pistachio and technexion/tim8960.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4648 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22 10:03:15 +00:00
Carl-Daniel Hailfinger 513e03bd96 r4646 enabled early usage of pci_{read,write}_config{8,16,32}
This allows us to change
dword = pci_cf8_conf1.read32(&pbus, sm_dev->bus->secondary,
        sm_dev->path.pci.devfn, 0x64);

to the much more readable
dword = pci_read_config32(sm_dev, 0x64);

Clean up all PCI operations in mainboards based on AMD 690:
amd/pistachio
amd/dbm690t
technexion/tim8690

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4647 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22 09:43:25 +00:00
Carl-Daniel Hailfinger 00003ae712 If no pci access method has been set for the device tree so far (e.g.
during early coreboot_ram), pci_{read,write}_config{8,16,32} will die().
This patch changes pci_{read,write}_config{8,16,32} to use the existing
PCI access method autodetection infrastructure instead of die()ing.

Until r4340, any usage of pci_{read,write}_config{8,16,32} in
coreboot_ram before the device tree was set up resulted in either a
silent hang or a NULL pointer dereference. I changed the code in r4340
to die() properly with a loud error message. That still was not perfect,
but at least it allowed people to see why their new ports died.
Still, die() is not something developers like to see, and thus a patch
to automatically pick a sensible default instead of dying was created.
Of course, handling PCI access method selection automatically for
fallback purposes has certain limitations before the device tree is set
up. We only check if conf1 works and use conf2 as fallback. No further
tests are done.

This patch enables cleanups and readability improvements in early
coreboot_ram code:
Without this patch:
dword = pci_cf8_conf1.read32(&pbus, sm_dev->bus->secondary,
        sm_dev->path.pci.devfn, 0x64);
With this patch:
dword = pci_read_config32(sm_dev, 0x64);

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4646 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22 00:09:41 +00:00
Myles Watson 6afb698433 I forgot to add CONFIG_VGA_BRIDGE_SETUP to the old build system.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4645 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-17 18:30:23 +00:00
Myles Watson 079300b987 Remove warnings from Kconfig. Trivial.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4644 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-17 16:59:07 +00:00
Myles Watson 28412f58b6 Separate CONFIG_VGA_CONSOLE from CONFIG_VGA_BRIDGE_SETUP.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4643 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-17 16:54:46 +00:00
Peter Stuge a758ca2ba9 Move VGA BIOS settings from the payload menu into it's own menu
Remove dependency on PAYLOAD_ELF so that config items are shown.
Build tested. With this, coreboot.rom has a VGA BIOS optionrom added.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4642 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-17 16:21:31 +00:00
Ronald G. Minnich b796a06cc6 This is a patch for killing IPMI on the s1850 -- or at least geting the BMC
out of the way of the serial port. Tested extensively in user mode.
Works and gets the BMC out of my way, which is good, because there
are few more useless things than IPMI and the BMC.
The BMC, all by itself, is the cause of most of our problems in booting
and talking to these nodes. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4640 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-17 00:28:29 +00:00
Ronald G. Minnich 3f76a56795 copyright name error.
I don't know what else to do for files generated by programs ...
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4639 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-17 00:24:52 +00:00
Ronald G. Minnich 057712a3b7 This is an otherwise dead platform. I'm just committing the basics that
let it build. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4636 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-15 23:38:27 +00:00
Patrick Georgi b261205f5e Don't mix int and boolean for kconfig variables. It might work, it might not.
trivial change.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4635 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-15 20:40:31 +00:00
Marc Jones fd9c9b8ff8 Use the coreboot pci config read/write functions instead of direct cf8/cfc
access. The fam10 pci functions will use mmio and do not have SMP pci access
issues.

Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4633 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-14 17:00:04 +00:00
Uwe Hermann 6dd5223b07 Use driver-y instead of obj-y for model_6xx_init.o.
Otherwise booting (but not building) fails:

  Initializing CPU #0
  CPU: vendor Intel device 665
  CPU: family 06, model 06, stepping 05
  Unknown cpu

This patch was tested to fix the issue on MSI MS-6178.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-04 16:30:31 +00:00
Rudolf Marek eed10364ce As more users of Asus M2V-MX SE emerged. Here is long pending patch I wanted to
write. It boots the SB/NB V-link performance to full duplex 533MB/s. (in fact x2
for FDX)

The default was 266MB/s but half duplex only. If you encourage any stability
issues we need to look into fine tuning the bus. The values are VIA recommended.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4625 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-01 15:29:12 +00:00
Ronald G. Minnich 669c4a954e File I missed committing.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4619 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-29 03:00:51 +00:00
Ronald G. Minnich 6ed39d9786 This is the final set of changes to allow rumba to build. Rumba is not
tested. I also addressed questions raised by Uwe: 
TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
UDELAY_TSC

Are now defined as booleans in src/cpu/x86/Kconfig and can be selected in 
the mainboard Kconfig. The remaining question of Uwe's is a deeper 
problem:

---
We'll have to check if this works. From a quick glance
the Rumba does not have the mmx related lines (which _are_ in
Makefile.romccboard.inc, though):

crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc
crt0-y += ../../../../src/cpu/x86/mmx/enable_mmx.inc
crt0-y += auto.inc
crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc
---

We're going to need a whole variant of this standard mainboard OR
we're going to have to make (some) of the unconditional includes above 
conditional. 


Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4618 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-29 02:59:35 +00:00
Ronald G. Minnich e7f5709e14 Set the mainboard/amd directory up to support more than one.
remove Config variables now defined elsewhere.
add rumba Kconfig and Makefile.inc

rumba won't build until my earlier patches are acked.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4617 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-29 02:47:57 +00:00
Ronald G. Minnich ea47143f15 Fixes per Uwe's comments.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-29 02:44:08 +00:00
Arnaud Maye 5b1d51ba2e This patch adds VGA and PS/2 Keyboard/mouse support to the already existing intel truxton (ep80579) dev board.
This patch tries to improve the pcie portA configuration.
The Matrox G550e PCIe gfx card shipped along with the dev board is supported.

Signed-off-by: Arnaud Maye <arnaud.maye@4dsp.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4615 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28 20:42:21 +00:00
Carl-Daniel Hailfinger 8b1c382cc0 r4534 introduced devicetree.cb in every mainboard directory, but didn't
copy any comment lines before the start of the device tree.
Copy over the comments for amd/dbm690t.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4614 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28 19:00:59 +00:00
Uwe Hermann 84a0f54b3b Add kconfig support for all Intel 82810 (i810) boards.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4613 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28 16:38:42 +00:00
Uwe Hermann 177aa3ad79 kconfig: Board name variable fixes and updates (trivial).
- Use alphabetical order.
 - Drop non-exisiting vendors.
 - Add missing vendors (Mitac, Soyo, Technologic, TeleVideo).
 
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4612 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28 15:22:31 +00:00
Ronald G. Minnich 07b8c2d26b This is the beginning of support for Geode and Kconfig in v2.
It also brings in the vsm from v3, which was a much cleaner cut. 

Over time, I hope to bring all the code back from v3. I have 
some rumbas at home and want to use them.

I have a patch which comes in next that makes the rumba build. 

Note that I am holding the src/*/amd/Kconfig patch until these get merged.
These have no impact on the current system. 

Note that this is not complete but I want to fill in the blanks bit 
by bit. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4611 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28 14:46:59 +00:00
Myles Watson 0d5ced0e23 Move DCACHE support into the cpu family for AMD model_fxx.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4610 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28 14:40:04 +00:00
Myles Watson e6804955c4 Add Kconfig support for PCI option ROMS.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4609 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28 14:36:12 +00:00
Ronald G. Minnich 876d7e9658 Move some config variables that are in one or two mainboards to
more rational places. The goal is to reduce the number of Config 
variables defined in mainboard Kconfig files to the absolute minimum. 

This has the side effect of making SERIAL_POST a menu item, which is nice. 
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4608 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28 14:23:38 +00:00
Uwe Hermann 05c1e9c81c Silence unneeded #warnings, change to code comments (trіvial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4607 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28 13:42:24 +00:00
Patrick Georgi 18c585b78a The resource allocator complained about 0-sized fixed
resources before actually validating if the resource is
a fixed one.

No harm done, except some confusion of the user (in this case: me).

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4606 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28 12:48:02 +00:00
Myles Watson fa1eddac43 Correct typos /SMCSC/SMSC/ in Kconfig.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4604 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-27 22:41:56 +00:00
Cristi Magherusan 7ec3f67294 Added support for the AMD S1G1 socket in kconfig
Signed-off-by: Cristi Magherusan <cristi.magherusan@net.utcluj.ro>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4602 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-27 22:19:23 +00:00
Cristi Măgherușan ea906b0e4e Added support for the AMD RS690 and SB600 southbridges in Kconfig
Signed-off-by: Cristi Măgherușan <cristi.magherusan@net.utcluj.ro>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4601 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-27 21:39:20 +00:00
Patrick Georgi 39ec29c47e Clean up some DCACHE related options.
In amd/serengeti_cheetah there were duplicates, and USE_DCACHE_RAM is a
boolean value, so make it so.


Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4596 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-27 12:10:50 +00:00
Patrick Georgi 20c03fb923 Clean up the kontron Kconfig
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4595 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-27 12:10:05 +00:00
Stefan Reinauer 6c36305cdf coreboot was still using an old set (obsolete since yabel) of x86emu includes
instead of the versions in util/x86emu. Clean up this mess.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4594 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-27 11:34:09 +00:00
Stefan Reinauer b883d4c433 Make all those locally used functions static instead of exporting them. (triv)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4593 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-27 11:23:06 +00:00
Carl-Daniel Hailfinger 5a5b8f5ba9 The new resource allocator helped me find a bug in SB600 diagnostics.
The SB600 SATA code printed that two BARs had the same address because
it didn't mask the correct number of bits in the BAR.
Functionality was not affected, but the debug output was incorrect.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Zheng Bao <zheng.bao@amd.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4591 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-27 04:30:47 +00:00
Patrick Georgi 62b3513d63 Remove a couple of CONFIG_ prefixes that shouldn't have happened.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4588 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-26 18:14:30 +00:00
Uwe Hermann bca3b92df2 Add kconfig support for all missing Intel 440BX based boards.
This includes:

soyo/sy-6ba-plus-iii
a-trend/atc-6240
a-trend/atc-6220
gigabyte/ga-6bxc
biostar/m6tba
azza/pt-6ibd
tyan/s1846
abit/be6-ii_v2_0
compaq/deskpro_en_sff_p600msi/ms6119
msi/ms6147
asus/p2b
asus/p2b-d
asus/p2b-ds
asus/p3b-f

The Makefile.inc for all of them are _exactly_ the same, so I made a common
src/mainboard/Makefile.romccboard.inc (maybe needs a nicer name). I also suspect
that many other romcc-based boards will be able to re-use this Makefile.inc.

Apart from the board name, most boards only differ in the Super I/O that's
being used and the IRQ_SLOT_COUNT value. The Tyan S1846 is a bit different
as it doesn't have an irq_tables.c.

I also dropped the broken MS-6178 kconfig stuff for now, I'll submit a
proper config in another patch.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4587 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-26 17:10:00 +00:00
Cristi Magherusan d7e49b40b1 Asus M2V-MX-SE support in Kbuild
Signed-off-by: Cristi Magherusan <cristi.magherusan@net.utcluj.ro>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4586 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-26 16:55:06 +00:00
Libra Li f608205c35 Enable Direct TMDS for the RS690, which allows to display on HDMI and DVI
monitors.

Signed-off-by: Libra Li <libra.li@technexion.com>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4585 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-26 16:04:47 +00:00
Uwe Hermann 602d2b8dc2 Fix vendor name config variables to match company name (trivial).
Any whitespace or dashes are replaced with underscores.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4583 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-26 14:11:48 +00:00
Patrick Georgi 2b7418ecc6 Use the gnu make .SILENT: mechanism instead of requiring
$(Q) in front of every silent line.

make V=1 or make Q="" still make make noisy again.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4581 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-25 19:38:46 +00:00
Patrick Georgi 698c0e0e5a Make PCI_ROM_RUN a boolean (like it is elsewhere) which
is the correct choice. Avoids type problems in kconfig

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4580 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-25 17:38:24 +00:00
Myles Watson 2389cfe8a7 Add microcode to socket_940 and socket_F. Part of the last reverting commit.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4579 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-25 16:18:11 +00:00
Myles Watson 5cc74faeab Revert socket abstraction.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4578 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-25 16:04:45 +00:00