Commit Graph

4702 Commits

Author SHA1 Message Date
Corey Osgood f366ce05ef Add support for the Intel NM10 (a variant of ICH7) and ICH8 southbridges.
Both are tested and appear to be working, however I'm not 100% clear
on if the NM10 has any other PCI IDs.

Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5709 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-17 08:33:44 +00:00
Stefan Reinauer e7b7ae23e6 Add support for Fintek F81216D/DG/AD
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-17 08:24:01 +00:00
Patrick Georgi 0e480ca677 Clarify comment a bit
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5707 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-17 07:46:50 +00:00
Corey Osgood a6f000cbb8 Add support for the Nuvoton NCT5571D. This chip acts nothing like the other
supported Nuvoton chip, but identical to a Winbond, and Nuvoton is a subsidary
of Winbond, so for simplicity's sake I've added it to the Winbond file.

Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5706 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-17 07:14:44 +00:00
Rudolf Marek ae7a4258c1 Look for actual framebuffer size instead of hardcoding UMA
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-17 06:18:47 +00:00
Xavi Drudis Ferran e660f04161 Fix warnings (that become errors) in AMDHT for certain configurations (unused functions)
Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5704 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-17 06:12:59 +00:00
Zheng Bao 52a3c3b7f7 Feature of lane reversal of AMD RS780 is tested.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5703 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-17 02:14:53 +00:00
Myles Watson e39251973b White space changes for s2881 device tree.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5702 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-16 20:00:49 +00:00
Stefan Reinauer 7c1f6b8489 sconfig parser:
- print erroneous string in error message
 - print line numbers starting from 1 instead of 0
 - exit with return code 1 on errors
 - check return values of fopen operations
 - only create output file if input file was parsed without errors

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-16 18:21:56 +00:00
Patrick Georgi 154931c66f Fix strcmp and strncmp. They failed in several important scenarios
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5700 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-16 18:04:13 +00:00
Patrick Georgi 1457aad00b Add #define that states the libpci interface version we implement
(flashrom needs it)

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5699 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-16 17:51:47 +00:00
Myles Watson 1bd3fb750d Call mainboard init functions.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-16 16:25:23 +00:00
Wang Qing Pei 6d7c1fc3a4 Gigabyte dual bios mainboard will always reboot, caused by the superio.
After lots of testing, the SuperIO LDN 7, register 0xEF is the key to the
problem. This patch adds a function which stops dual bios mainboards from
rebooting, when called.

Signed-off-by: Wang Qing Pei <wangqingpei@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5697 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-15 11:37:41 +00:00
Stefan Reinauer 3058491257 My forgotten CAR cleanup patch...
- Drop lots of dead code from the various cache_as_ram.inc files.
- Use some descriptive macros instead of magic numbers for MTRR MSRs
- drop unused duplicate descriptors from romstage GDT
- slightly reformatting code and comments

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5696 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-14 20:38:17 +00:00
Stefan Reinauer b24d07c360 My old mcp55 azalia fix from May 2010. Was never checked in.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5695 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-14 17:45:54 +00:00
Stefan Reinauer 8ccbe05091 bootblock_prologue.c (not a .c file!) and i386/init/crt0_prologue.inc were
pretty much 1:1 the same file (despite an include and a typo) so drop one
instance of it. We only have one prologue.inc for the romstage code now.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5694 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-14 17:31:49 +00:00
Stefan Reinauer a6f0e1291c clean up comment in entry32.inc
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-14 17:27:27 +00:00
Myles Watson 18719f0b07 Build 8151 for s2885. Trivial.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5692 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-13 15:42:09 +00:00
Patrick Georgi 6615ef3bfc Add support for OHCI controllers and prelimiary support for xHCI (USB3) controllers.
Improve scanning for USB controllers.

Limitations:
- OHCI doesn't support interrupt transfers yet (ie. no keyboards)
- xHCI just does initialization and device attach/detach so far

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5691 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-13 09:18:58 +00:00
Donald Huang 03e54de648 Superiotool support for the IT8500 embedded controller.
Signed-off-by: Donald Huang <donald.huang@ite.com.tw>
Signed-off-by: Yung-chieh Lo <yjlou@google.com>
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5690 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-10 23:34:51 +00:00
David Hendricks 2ad6d55e38 Some chips do not require enter/exit sequences. This causes them to be
detected and printed multiple times in probe_idregs_* functions where a
simple series of enter --> probe/print --> exit calls are made.

This patch adds a simple check after each set of those calls to make the
functions quit after a chip is found.

Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5689 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-09 23:13:13 +00:00
Stefan Reinauer 9bf7810dac make sconfig parser regeneration menu selectable
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5688 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-09 13:28:18 +00:00
Patrick Georgi 35d346fe2d Fix build error introduced in r5868.
aliased_name was a compatibility hack to match the output of the C rewrite
with the python version's results. It seems that we carried these
useless symbols with us for years, just without any impact good or bad.

By declaring devices static and tightening the screws (-Werror), the
compiler now knows that these declarations are useless - and stops.


Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stefan.reinauer@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5687 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-09 12:58:16 +00:00
Stefan Reinauer df61dd28f6 non-root devices are not supposed to be accessed outside of static.c except by
walking the tree.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5686 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-09 12:02:00 +00:00
Myles Watson 29ee87338c Change default path and configuration for Coreinfo.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Cai Bai Yin <caibaiyin.pku@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5685 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-05 14:41:29 +00:00
Zheng Bao 23ffe8b690 The number of cores is got by reading the bit 15,13,12 of [0,24,3,e8].
The bit 15 seems to be a new feature when CPU started to have more than 4
cores.

Zheng

Yes, this was add for revD.

Marc Jones

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5684 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-05 06:12:16 +00:00
Myles Watson 127e976ec2 Remove warnings from USB debug console code.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5683 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-04 19:29:11 +00:00
Stefan Reinauer 8c4f31b3b5 Drop the USE_PRINTK_IN_CAR option. It's a bogus decision to make for any user /
board porter: printk should always be available in CAR mode.

Also drop CONFIG_USE_INIT, it's only been selected on one ASROCK board
but it's not been used there. Very odd.

There is one usage of CONFIG_USE_INIT which was always off in 
src/cpu/intel/car/cache_as_ram.inc and we have to figure out what to do with
those few lines.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5682 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-03 15:42:29 +00:00
Myles Watson 0362c6d6a7 VGA code needs to be refactored before it can be compiled conditionally.
Revert until someone with the boards refactors it.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5681 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-03 15:01:39 +00:00
Myles Watson 2d7ff69a03 Build VGA code conditionally to avoid errors when using SeaBIOS.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Kevin O'Connor <kevin@koconnor.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5680 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-02 15:14:13 +00:00
Mattias Mattsson 25bf69a6c9 Adds id for ITE IT8707F to superiotool.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5679 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-02 02:34:20 +00:00
Stefan Reinauer c9ce895199 make early_mtrr_init() invisible for cache as ram targets as it breaks them.
Fix up converted mainboards that still used early_mtrr_init()

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5678 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-01 17:22:17 +00:00
Corey Osgood f97654833a Clarify a comment on an old hack, remove the call to early_mtrr_init
that causes CAR to hang, provide more debugging output wrt memory size,
and correct the numbering on the ram init sequence.

Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5677 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-01 17:20:20 +00:00
Stefan Reinauer bc0f7a68df - fix SMM code relocation race
- make SMM relocation debugging Kconfig accessible
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5676 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-01 15:41:14 +00:00
Björn Busse 2d33dc4096 add i945GSE to inteltool
Signed-off-by: Björn Busse <bj.rn@co-assembler.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Corey Osgood <corey.osgood@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5675 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-01 15:33:30 +00:00
Corey Osgood 43110f5403 Update my old, no longer active email addresses
Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Corey Osgood <corey.osgood@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5674 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-01 02:33:42 +00:00
Corey Osgood 23d98c768f Add support for the Intel Atom D400/500- and N400-series integrated
northbridge. Also add support for the very similar Q963/965 northbridge.
Tested: 
  D510: confirmed working, with MCHBAR enable code
  Q965: writes to bit 0 to enable MCHBAR access are ignored, all other functions work

Untested:
  D410/D525/N400: should be the same northbridge

Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-29 19:25:31 +00:00
Cai Bai Yin 9b3cf8ef08 Resolved the bug of filo+libpayload building. The bug is if libpayload is installed before filo load "make -C ../libpayload/Makefile DEST=**", it would not
install correctly. Also, distclean removes .xcompile now.


Signed-off-by: Cai Bai Yin <caibaiyin.pku@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5672 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-29 00:08:21 +00:00
Nils Jacobs bba0d76952 Let Geode GX2 use geode_post_code.h just like Geode LX
Also clean up gx2def.h and geode_post_code.h a little.
abuild tested and boot tested on a Wyse S50.

Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5671 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-28 00:27:09 +00:00
Nils Jacobs 7a4952a54f Add src/cpu/amd/model_gx2/cache_as_ram.inc missing from r5669
Part of converting GX2 to use CAR.

Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5670 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-27 00:30:42 +00:00
Nils Jacobs e474070bdd This patch converts the Geode GX2 boards to CAR.
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Joseph Smith <joe@settoplinux.org>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5669 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-26 23:46:25 +00:00
Myles Watson e3fb1c2531 Make include paths more consistent. Fixes compilation errors for me.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Nils Jacobs <njacobs8@hetnet.nl>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5668 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-26 21:45:11 +00:00
David Hendricks e1822d9f24 Superiotool support for Nuvoton WPCE775x/NPCE781x.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5667 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-22 22:56:44 +00:00
Rudolf Marek 4aa93ccd33 Add support for the console over Ethernet (through PCI NE2000).
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Cristian Magherusan-Stanciu <cristi.magherusan@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5666 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-16 20:02:09 +00:00
Patrick Georgi 7fc9e291d7 Trivial: Improve error reporting of sconfig slightly by reporting the line number.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5665 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-15 15:59:07 +00:00
Stefan Reinauer 857a778449 become more standard with libpayload headers. PATH_MAX belongs in limits.h,
tiny curses can use standard includes now.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5664 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-09 18:52:17 +00:00
Cristi M 2f969a6ab0 Trivial -Werror fix.
Signed-off-by: Cristi M <cristi.magherusan@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5663 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-09 18:06:23 +00:00
Myles Watson 187e9d0620 Trivial fix to make CONFIG_BOOTBLOCK_NORMAL switch compile again.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5662 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-09 14:24:23 +00:00
Myles Watson c358b65065 Ugly temporary fix until we figure out how to deal with the race condition.
Justification:
- dbm690t isn't actively developed (no new warnings will be introduced)
- having this board fail clutters the mailing list

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5661 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-08 17:20:07 +00:00
Stefan Reinauer 6f57b514cb Fix all warnings in the tree
(does not fix the cmos.layout race yet)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5660 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-08 16:41:05 +00:00