Commit Graph

844 Commits

Author SHA1 Message Date
Paul Menzel 18600aa1ef payloads/external/SeaBIOS: Upgrade stable from 1.7.2.1 to 1.7.4
SeaBIOS 1.7.4 was released in December 2013 [1] and, besides other
things, supports writing debug messages to CBMEM console.

The new SeaBIOS Kconfig option `DEBUG_COREBOOT` has to be added to the
SeaBIOS configuration file `.config` as otherwise the SeaBIOS build
from within coreboot (`PAYLOAD_SEABIOS`) is interrupted as it is
detected as a new option.

This option was already added and enabled in commit 7c1a49bc [1]

	SeaBIOS: have coreboot pass the choice to run optionroms in parallel

so SeaBIOS messages are now written to the CBMEM console.

Successfully tested on the Asus M2V-MX SE.

[1] http://seabios.org/Releases
[2] http://review.coreboot.org/5443

Change-Id: I675a50532735b4921a664e4b24d98be17b9a1002
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/5093
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2014-05-28 22:41:59 +02:00
Edward O'Callaghan 26c74fbd4f payloads/coreinfo/multiboot_module.c: Trivial fix indents
Stylistic fix-up's.

Change-Id: I0cad7c860280d0d8dcb16d052846c72f690e2b65
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5731
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-05-23 09:50:21 +02:00
Kyösti Mälkki 48e9eb89fa libpayload: Fix to properly disable serial console
With coreboot builds with serial console disabled, there is no
CB_TAG_SERIAL entry in coreboot tables. We ended up with
lib_sysinfo.serial == NULL and serial_hardware_is_present == 1.

Change-Id: I9a2fc0b55bf77769f2f2bfbb2b5476bee8083f7d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5723
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-05-17 14:56:06 +02:00
Patrick Georgi 3ee43171ef payloads: make build system integration work again
Payloads using Kconfig get confused by coreboot Kconfig
configuration in environment variables. Prune them.

Change-Id: I63da2af0a15dca35d70cd65b2f74a1564aab9483
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/5710
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-05-09 22:51:17 +02:00
Paul Menzel 639f02b3ba payloads/coreinfo/README: Use `It is` instead of `Its`
Change-Id: Ic1a9f2f01c26ee97cd7183fcf1755cb916f1b02e
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/5704
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-05-09 08:24:20 +02:00
Edward O'Callaghan 6bedc27426 libpayload/endian.h: Provide alignment-agnostic enc/dec bytestreams.
Alignment-agnostic encode/decode bytestream to/from little/big endian.

The le16enc(), le16dec(), le32enc(), le32dec() functions encode and
decode integers to/from byte strings on any alignment in big/little
endian format. See BYTEORDER(9).

Change-Id: I73a174b9c02c467bc60590c5cd894dac58b8683a
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5198
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-04-26 15:03:43 +02:00
Patrick Georgi 2ac251bba9 filo payload: Fix the build
Also strip down the config that's set since these are actually
SeaBIOS options, not FILO...

Change-Id: I5dbe6255996f9e115699ff2a83fb3450533520ee
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/4647
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-04-16 13:29:28 +02:00
Idwer Vollering 7c1a49bcc0 SeaBIOS: have coreboot pass the choice to run optionroms in parallel
Introduce the tunable CONFIG_SEABIOS_THREAD_OPTIONROMS.

Change-Id: Ifd4d9fca7316eb739ff184e54bdc1cdb0262f0c6
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/5443
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-04-07 11:54:26 +02:00
Edward O'Callaghan efc5841ab4 libpayload/ahci: Fix a warning by decompartmentalise the AHCI driver.
Decompartmentalise AHCI driver into two parts, ATA and ATAPI. Add a few
superficial comments while here. This also fixes a compiler warning.

Change-Id: Ia1fd545b39868a81cbc311f6ffc786f9f1f61415
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/4783
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-02-15 14:14:36 +01:00
Duncan Laurie f517c448a5 libpayload: Parse CBMEM ACPI GNVS pointer
Pull the ACPI GNVS pointer from CBMEM and expose it in
the sysinfo structure for use by payloads.

BUG=chrome-os-partner:24380
BRANCH=none
TEST=build and boot rambi with emmc in ACPI mode

Change-Id: I47c358f33c464a4a01080268fb553705218c940c
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179900
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5016
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-30 05:49:13 +01:00
Aaron Durbin 8449b5e0a9 libpayload: adjust max number of memranges
Rambi currently has more than 16 memory ranges. Because of
this libpayload is silently dropping them and the full amount
of memory is not being properly wiped. Correct this by bumping
the number of ranges to 32.

BUG=None
BRANCH=None
TEST=Built and booted rambi. Noted that the full amount of memory
     was being properly wiped.

Change-Id: Ida456decf2498cb1547c0ceef23df446a975606b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175792
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/4942
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
2014-01-28 23:13:12 +01:00
Alexandru Gagniuc f927df68e4 Revert "Makefile: Check $CC variable returned from xcompile is not empty."
This reverts commit 1287d1cc80.
This commit has the side-effect of making abuild fail, and as such is
reverted until a safe solution can be found.

Change-Id: Ib8cb78468c2922322b490e0b52c0bd24f3de7ef9
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/3269
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-01-26 15:46:44 +01:00
Andrew Wu 1287d1cc80 Makefile: Check $CC variable returned from xcompile is not empty.
If xcompile can't find out suitable GCC compiler for i386/armv7, it
will not set $CC_i386/$CC_armv7 variable. Makefile sets $CC variable
from xcompile, and will print strange error messages when executing
$CC program if $CC is empty.

Add checking to avoid this problem. If $CC is empty, also delete
invalid .xcompile file, so Make can recreate this file next time.

Change-Id: Ia8d481d76ca52f3351cb99f05779d06947161c5d
Signed-off-by: Andrew Wu <arw@dmp.com.tw>
Reviewed-on: http://review.coreboot.org/3905
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23 20:43:28 +01:00
Vladimir Serbinenko c9babb278f nvramcui: Trim values when setting.
Values get space-padded by curses and then enum search fails to match them.
Rtrim to compensate for curses.

Change-Id: Iecf095f21cfade9425eaa039b67625615eb80481
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4692
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins)
2014-01-19 15:09:29 +01:00
Vladimir Serbinenko 571bec726c libpayload/lpgcc: Add curses include path.
Without it payloads that need curses fail to build.

Change-Id: I4533238b547e4c2d9e0778fb7d314db35a9559df
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4689
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2014-01-19 15:05:20 +01:00
Vladimir Serbinenko 7ea00155b2 libpayload/options: Fix out of array read.
It resulted in garbage in upper bytes of numeric options.

Change-Id: I5e5d8b770ed93c7e8a1756a5ce32444b6a045bac
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4691
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2014-01-19 11:51:23 +01:00
Patrick Georgi fd5b370437 libpayload: Bring keyboard_wait_write() back
Code is using it...

Change-Id: I6894b45cbbf70c8e7ce37ce18d93cadf0ea9fbfc
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/4649
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2014-01-19 11:37:39 +01:00
Vladimir Serbinenko 0af61b6c82 lib/cbfs_core.c: Supply size of file as well in cbfs_get_file_content
Change-Id: I5b93e5321e470f19ad22ca2cfdb1ebf3b340b252
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4659
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2014-01-12 17:41:02 +01:00
Patrick Georgi 34286b861a libpayload: add junit.xml build target
It builds all defconfigs/* and logs the results
in junit.xml, suitable for consumption by jenkins

Change-Id: I86c4022851b47820c95359b2ea9b735a77b1bc2c
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/4551
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-01-08 13:24:45 +01:00
Patrick Georgi 25cd678d22 libpayload: update defconfig
Just clean out stuff we don't even have anymore

Change-Id: I2b4128c6496b4400d52d87680bedc3cece3d444c
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/4550
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-01-08 13:24:43 +01:00
Patrick Georgi fdb348a1d1 libpayload: reintroduce optional PCI in XHCI driver
being a good citizen on the box, libpayload tries to return to EHCI
mode on shutdown, so a non-XHCI capable USB driver after it (eg. in
the OS) finds something to work with.

Change-Id: Id227d646e08a258b841c644263112f0815dd486c
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/4547
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-01-08 13:24:39 +01:00
David Hendricks 36e62c2516 armv7: add wrappers to read/write L2ACTLR
This adds inline wrappers to read the L2 cache auxiliary control
register (L2ACTLR).

Signed-off-by: David Hendricks <dhendrix@chromium.org>

Change-Id: Iec603d7c738426232f7ce3a4a474d01c85fa3f2f
Reviewed-on: https://gerrit.chromium.org/gerrit/64861
Commit-Queue: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/4437
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-12-21 22:45:28 +01:00
Gabe Black c0f82d2222 arm: libpayload: Include stdint.h in cache.h
The cache.h header uses standard int types but doesn't include stdint.h itself.

Change-Id: If470978164b0cd1f05c27c2c8eda365133cc47ff
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/63190
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/4387
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-12-21 10:21:32 +01:00
Martin Roth 3ee59f7b31 Libpayload: Add keyboard-disable function.
Add a function to disable and clear the keyboard controller.

Verified Code flow in normal boot/S3 resume with print statements.
Verified Keyboard was correctly disabled and flushed by booting
to recovery mode screen while pressing keys on the integrated
keyboard.

Change-Id: I3e1f011c3436fee5ce10993c6c26a3c8597c6fca
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/63627
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/4395
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-12-21 08:29:58 +01:00
Gabe Black dcac1628bc libpayload: Include hexdump.c in the Makefile so it gets built
The hexdump function was added to libpayload recently, but its source file was
never added to the Makefile so it wasn't compiled or linked in.

Change-Id: Ic3c12a5b8a6ea631b83c10a6e4210544ff00b5bf
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/64878
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/4439
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-12-21 08:18:43 +01:00
Julius Werner 52e3f449ac libpayload: Increase USB EHCI transfer timeout
The EHCI driver defines a maximum transfer timeout of two seconds. The
comments state that during tests the maximum amount of required transfer
time was for the SCSI TEST_UNIT_READY command on certain devices. We
have now observed a USB device (Patriot Memory 13fe:3100) that can NAK
this command for slightly more than two seconds. It will also completely
fail if the timeout hits, since it gets confused by the subsequent CSW
retry/recovery mechanism and starts producing babble errors. This patch
increases the timeout to three seconds to circumvent this problem.

To test, boot a Falco from a red-black RageXT USB stick.

Change-Id: I3c4fef468fb16eacc5a487d76d025a78fb450e27
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63095
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Sameer Nanda <snanda@chromium.org>
Reviewed-on: http://review.coreboot.org/4379
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-12-21 07:39:19 +01:00
Ronald G. Minnich 86545f7978 libpayload: Add simple hexdump function
- prints hex and ascii
 - detects duplicate all zero lines

Change-Id: I084b3072bc05725b23c5c3ca0dbf1533f164a08c
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/63660
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Author:  Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/4393
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
2013-12-16 17:53:58 +01:00
Aaron Durbin 580d11f1f1 libpayload: expose cbfs ram functions
The ram_media.c file is being compiled, however the
global functions were not exposed through a header.

Change-Id: I4588fbe320c29051566cef277bf4d20a83abf853
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56642
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/4194
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-12-12 22:22:12 +01:00
Gabe Black c083d2e347 libpayload: Get rid of a compiler warning
Change-Id: I7252925ef5c4efb69cad6b6fa179031162cf8e74
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/61058
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/4346
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-12-12 22:03:22 +01:00
Hung-Te Lin cb0aeef0a9 libpayload: armv7: Add cache control function to invalidate range.
When dealing with DMA, we need a function to invalidate cache without corrupting
contents on main memory (clean).

Change-Id: I28e632ae57a7b7ed1accee74e76045b92f92a699
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/61078
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/4345
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-12-12 22:03:15 +01:00
Hung-Te Lin d0fa1d1a61 payload: armv7: Fix dcache_clean_by_mva.
The OP assigned by dcache_clean_by_mva must be handled in
dcache_op_mva.

Change-Id: Ib32262f0419453b2690d7c1a1c6602380b46a37f
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/61077
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/4344
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-12-12 22:03:09 +01:00
Vladimir Serbinenko e4c657c4af Do not export variables to GRUB build
Variables in coreboot and not in line with GRUB ones. E.g. HOSTCC is both
HOST_CC and BUILD_CC for GRUB (consult INSTALL for more details) and
what coreboot calls CC is TARGET_CC for GRUB.

Current code plugs this by defining variables explicitly but it has a nasty
effect that make stops caring about flags added in makefile itself. Undef
as many variables as possible but still pass them to configure for them to
have correct effect and keep CC assignment as my make version doesn't undefine
it even when instructed to do so.

Tested with qemu.

Change-Id: I9d18f557138a20ae3918d698dee8f5b5c5738f75
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4310
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-12-06 16:38:51 +01:00
Stefan Reinauer b86062959b libpayload: Have similar cache api on ARM and x86
So far this is used by the USB driver, and instead of
having ifdefs all throughout that code, implement the same
API on x86 and ARM.

Change-Id: I8093ad818ad2e38a0901787aa8674faf591d580c
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/56105
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/4320
Tested-by: build bot (Jenkins)
2013-12-05 20:11:39 +01:00
Stefan Reinauer 08c4150ec4 libpayload: Clean up CFLAGS
- Add -ffreestanding and -fomit-frame-pointer for all
  platforms.
- Add ARMv7 specific flags to the armv7 Makefile

Change-Id: I71ab1b096e505940cc20c266bccd43917bcfad3a
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/56104
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/4317
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-12-05 15:44:31 +01:00
Stefan Reinauer 6a7dd08b16 libpayload: sync ARMv7 arch/io.h with coreboot
On ARMv7 we need to carefully add memory barriers to
all memory read and write operations. This change
brings libpayload in sync with what coreboot is doing.

Signed-off-by: Stefan Reinauer <reinauer@google.com>

Change-Id: Ie9c30b0f0d30531c5f9d99c2729246a86b8cec26
Reviewed-on: https://gerrit.chromium.org/gerrit/59294
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/4316
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-12-05 00:38:37 +01:00
Stefan Reinauer 5ae3175218 Drop obsolete CONSOLE_LOGBUF
This was used by Ron 13ys ago and was never used again
ever since.

Change-Id: I8ae8a570d67fa0b34b17c9e3709845687f73c724
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/59320
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/4256
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2013-12-03 02:36:02 +01:00
Gabe Black 6149776e73 libpayload: ARM: Don't leave alignment checking on after the exception test
Currently, the exception handling code on ARM in libpayload turns on alignment
checks as an easy way to generate an exception for testing purposes. It was
leaving it on which disabled unaligned accesses for other, unlreated code
running later. This change adjusts the code so the original value of the
alignment bit is restored after the test exception.

Built and booted into depthcharge on pit with an unaligned accesses added
after the call to exception_init in the depthcharge's main. Before this
change, the access caused an exception. After this change, the access
completed successfully.

Change-Id: If92cab3cc8eabca7c5b0560ce88a8796a27fe3b2
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/59372
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/4255
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2013-12-03 02:35:56 +01:00
Gabe Black cfe77beea4 libpayload: Make the region to scan for the cb tables configurable.
The address range to scan for the coreboot tables varies from machine to
machine based on the range memory occupies on the SOC being booted and on the
amount of memory installed on the machine. To make libpayload work on
different ARM systems with different needs, this change makes the region to
scan configurable. In the future, we might want to come up with a more
automatic mechanism like on x86, although there's less consistency on ARM as
far as what ranges are even memory in the first place.

Change-Id: Ib50efe25a6152171b0fbd0e324dbc5e89c527d6e
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/59242
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/4254
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2013-12-03 02:35:44 +01:00
Stefan Reinauer a392d477c1 libpayload: Add missing break statement in coreboot table parsing
Otherwise the code would try to parse GPIOs when encountering
a mainboard entry in the coreboot table. This never caused any
problems because the mainboard entry is parsed before the GPIO
entry.

Signed-off-by: Stefan Reinauer <reinauer@google.com>

Change-Id: I1443bda8585a990a39115743d48304ec4b54bccb
Reviewed-on: https://gerrit.chromium.org/gerrit/59292
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@google.com>
Tested-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/4252
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2013-12-03 01:26:10 +01:00
Stefan Reinauer b82a74c7ff libpayload: Drop PowerPC architecture
This was never completed / working and we have the working
ARMv7 port for an architecture template, so get rid of this
dead code.

Change-Id: Ic2c1267ee5546dd6e1b63220c263b2fa86c8ae33
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/56065
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/4235
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-26 00:08:39 +01:00
Aaron Durbin 1c20e385a0 libpayload: usb mass storage card hot plug
Mass storage devices such as card readers show up as
as USB devices. However the media not be inserted. In those
situations the previous code would just fake a disk and
call usbcreate_disk. This is inappropriate because it forms
a 1:1 mapping of USB device to disk leading to the inability
to remove the disk and/or handle "hot plug" card insertion
and removals.

To alleviate this issue introduce the notion of ready to the
usbmsc structure. It tracks detached, not ready, and ready
states. The polling routine is then used to track not ready
to ready transitions thereby creating and removing disks
appropriately. This handles the case of inserting and removing
a card that shows up as a new disk.

Booted recovery mode. Able to observe inerstion and removal
of sdcard. Also able to insert valid USB flash drive to boot
as well.

Change-Id: I3eefbe537ec1b9c975744b8984b06c17ae236f40
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/57948
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/4226
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-25 23:56:22 +01:00
Aaron Durbin a967f414df libpayload: usb mass storage detect empty media
There is currently a hard-coded 30 sec delay in the mass storage
driver while waiting for each device to become ready. However, mass
storage card readers that are empty return an error code on the
TEST UNIT READY command. A REQUEST SENSE command then needs to be
issued and interrogate the data to determine if no media is present.
If no media determination is found to be true the USB device is no
longer considered a candidate to be a disk.

This code does lead to the fact that the media card reader needs to be
populated at enumeration time. I suspect this is not an issue as it
appears the storage stack in libpayload can't handle removable media
coming online later.

Booted recovery and dev modes. Noted that removable mass storage
devices with no media were ignored without any boot delay.

Change-Id: Ida7a45614d97c6e6fbfc9bb099765aad4df550fd
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/57828
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/4225
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-25 23:56:13 +01:00
Stefan Reinauer 8d1b132733 libpayload: Fix xcompile
The architecture name for our ARM port is armv7, not arm.
Hence, none of those flags were ever actually used.

Fix the architecture name and remove the flags, they should
not be set in xcompile, but in the Makefile, like in coreboot.

Change-Id: Id9c5db7ebceafddb58a1ce1988417f09c074ba6c
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/56084
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4179
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-25 23:36:27 +01:00
Stefan Reinauer 8992e53c23 libpayload: Add USB support for non-PCI controllers
Restructure USB stack to not depend on PCI, and
make PCI stub available on x86, but provide fixed
BARs for ARM (Exynos 5)

Change-Id: Iee7c8b134c22b661a9a515e24943470c9dbadd1f
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/49970
Reviewed-on: http://review.coreboot.org/4175
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-25 23:31:52 +01:00
Stefan Reinauer 441a4baf87 libpayload (EHCI): correctly align PORTSC
Two structures in the USB EHCI stack were pointing
to hardware but not marked attribute((packed)) hence
leaving it to GCC to correctly align the data structures.

Next, the number of reserved bytes in hc_op_t was wrong
(but implicitly aligned to the correct values on x86)

It seems this worked fine on x86, but on ARM it was doing
the wrong thing.

Signed-off-by: Stefan Reinauer <reinauer@google.com>

Change-Id: I94bed4850ded7d3f7bbc7ff3079c103c6054c22d
Reviewed-on: https://gerrit.chromium.org/gerrit/55555
Commit-Queue: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Tested-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/4174
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-25 23:31:34 +01:00
Stefan Reinauer f8b36501fd Make ssize_t an actual ssize_t
In the process of getting rid of compiler includes during in coreboot
and libpayload, we defined size_t and ssize_t ourselves, using a GCC
macro for size_t: __SIZE_TYPE__. Unfortunately, there is no
__SSIZE_TYPE__, so we temporarily redefine unsigned to signed to make
__SIZE_TYPE__ __SSIZE_TYPE__.

Signed-off-by: Stefan Reinauer <reinauer@google.com>

Change-Id: I4cf4eb0fdaa4db64277c2585fe2c1bdc0acdf02b
Reviewed-on: https://gerrit.chromium.org/gerrit/49947
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@google.com>
Tested-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/4156
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-25 23:13:50 +01:00
Gabe Black 98e4d8aabb ARM: Update the size/location of the coreboot tables so we can boot again
Change-Id: I3235f42c7faaf28a63455162ea55dc1a6bebd1f5
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Hung-Te Lin <hungte@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/48290
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/4128
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-25 23:03:14 +01:00
David Hendricks 6119bea233 armv7: import updated cache/MMU stuff from coreboot
This imports the cache/MMU code from coreboot as of 1877cee.

Change-Id: I97ec8b9640921a94a4b27d89e4ae6185e9f96f18
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/48288
Commit-Queue: Stefan Reinauer <reinauer@google.com>
Tested-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/4134
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-25 23:01:03 +01:00
Stefan Reinauer 047c98a2c1 libpayload: fix wrong endian assumption in sha1.c
Not all platforms !x86 are big endian, hence actually look
at the CONFIG_LITTLE_ENDIAN flag instead of CONFIG_ARCH_X86.

Change-Id: Ibbd8f48b377a1121dd1e045834a94a2d67eda2ab
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/56066
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/4236
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-24 05:40:19 +01:00
Paul Menzel f3c1c9b6ac payloads/external/SeaBIOS/Makefile.inc: Remove empty lines at file beginning
Change-Id: I3e6eba62b6790836edf9813c2a45c77390d8c078
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/4094
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-24 05:34:47 +01:00
Vladimir Serbinenko 113a366848 Add GRUB2 payload to build system
Since a long time GRUB 2 is a viable payload alternative to SeaBIOS and
FILO. So make it easy for coreboot users to use GRUB 2 as a payload by
integrating it into coreboot’s build system, so it can be selected in
Kconfig.

As the last GRUB 2 release 2.00 is too old and has several bugs when
used as a coreboot payload only allow to build GRUB 2 master until a new
GRUB release is done. The downside is, that accidental breakage in
GRUB’s upstream does not affect coreboot users.

Currently the GRUB 2 payload is built with the default modules which
results in an uncompressed size of around 730 kB. Compressed it has a
size of 340 kB, so it should be useable with 512 kB flash ROMs.

Tested with QEMU.

Change-Id: Ie75d5a2cb230390cd5a063d5f6a5d5e3fab6b354
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4058
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-11-19 01:07:25 +01:00
Gerd Hoffmann e1539ba931 libpayload: add memory clobber to ins{b,w,l}
Change-Id: I3c4b8a9eeb6c4b2bcc58ccff091b4c997b2da923
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-on: http://review.coreboot.org/4034
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-11-10 20:41:05 +01:00
Andrew Wu c2a8031a5e libpayload/sample: Use settings from .xcompile file to build.
It is for crossgcc.

Change-Id: Ia1d676adfea340b6b80858215459491c9338d614
Signed-off-by: Andrew Wu <arw@dmp.com.tw>
Reviewed-on: http://review.coreboot.org/3955
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
2013-10-17 01:54:43 +02:00
Nico Huber c371442a29 libpayload: Switch xHCI shared ports back to EHCI on shutdown
On Intel's Panther Point the xHCI ports are shared with an EHCI
controller. Our xHCI driver switches them to xHCI, naturally. But
we forgot to switch them back on shutdown, which left them
unusable by a non-xHCI aware operating system.

Change-Id: I70ef08655a603b42ee939935d50cf77ea97878a3
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3791
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-09-30 10:42:53 +02:00
Shawn Nematbakhsh dd6c4ec1ed libpayload: Remove unnecessary keyboard mode setting code
keyboard_init attempts to read the existing mode register, set the
'XLATE' bit, and write it back. The implementation is buggy because the
keyboard may be active at the time we read the mode, and we can
misinterpret scancode data as the reply to our command. It leads to
problems where the KB gets disabled in firmware.

In fact, setting the 'XLATE' bit is completely unnecessary, even if we
desire QEMU keyboard support. We already set this bit when we initialize
the keyboard in pc_keyboard_init. Basically, this code does nothing
(or worse), so just remove it.

Change-Id: Iab23f03fa8bced74842c33a7d263de5f449bb983
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/3883
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-09-24 01:23:17 +02:00
Nico Huber 25dd2479c1 libpayload: Set heap's header size to 64-bit
For libpayload clients with larger memory needs (eg. FILO with integrated
flashrom) the current configuration isn't enough.

Change-Id: Ic82d6477c53da62a1325400f2e596d7d557d5d1e
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3889
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2013-09-06 11:51:26 +02:00
Nico Huber 2d4b4cafe6 libpayload: Make heap code independent of its header size
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Change-Id: Ie69ceb343494b7dd309847b7d606cb47925f68b6
Reviewed-on: http://review.coreboot.org/3888
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-09-06 11:28:47 +02:00
Patrick Georgi 9a91ba1994 libpayload: reduce libcbfs verbosity
Prettier in real-world payloads (ie. FILO)

Change-Id: I9ed968fe527c5d46090e707e2d89b7406a43662e
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/3887
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-09-03 18:11:52 +02:00
Stefan Tauner 9090ff91e1 libpayload: Add a few more PCI constants
flashrom has started to use revision IDs to distinguish AMD chipsets
and fails (even more) to build with libpayload since then because
PCI_REVISION_ID is undefined in libpayload's pci header.

Change-Id: If7440a48c1005a4ba4fc09303f47cdfa9f408ad1
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: http://review.coreboot.org/3884
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2013-08-26 00:24:53 +02:00
Gabe Black ec3a462d03 CBFS: Change how the bss is zeroed when loading a stage.
For reasons explained in a previous CL, it might be necessary to "load" a file
from CBFS in place. The loading code in CBFS was, however, zeroing the area of
memory the stage was about to be loaded into. When the CBFS data is located
elsewhere this works fine, but when it isn't you end up clobbering the data
you're trying to load. Also, there's no reason to zero memory we're about to
load something into or have just loaded something into. This change makes it
so that we only zero out the portion of the memory between what was
loaded/decompressed and the final size of the stage in memory.

Change-Id: If34df16bd74b2969583e11ef6a26eb4065842f57
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3579
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-08-15 20:13:39 +02:00
Gabe Black 0c605a5a6c CBFS: Change the signature of cbfs_decompress.
Instead of returning 0 on success and -1 on error, return the decompressed
size of the data on success and 0 on error. The decompressed size is useful
information to have that was being thrown away in that function.

Change-Id: If787201aa61456b1e47feaf3a0071c753fa299a3
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3578
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-08-15 20:10:39 +02:00
Gabe Black 001056f560 ARM: Tell the linker memset and memcpy are functions.
The memset and memcpy functions are assembled as ARM code, likely because
that's the default of the assembler. Without special annotation, the assembler
and linker don't know that those symbols are functions which need special
handling so that ARM/thumb issues are handled properly. This change adds that
annotation which gets those functions working in Coreboot which is compiled as
thumb. Libpayload and depthcharge are compiled as ARM so they don't *need* the
annotation since it just works out in ARM mode, but it's the safe thing to do
in case we change that in the future.

We should explicitly select ARM vs. thumb when assembling assembly files to be
consistent across builds and toolchains.

Change-Id: I814b137064cf46ae9e2744ff6c223b695dc1ef01
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3672
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-10 21:49:45 +02:00
Stefan Tauner c9246da4dd libpayload: Add strerror
Change-Id: I33d45ad7d09473b8c6f5b7ee5fbadc0d184f9dcd
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: http://review.coreboot.org/3537
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.huber@secunet.com>
2013-06-28 10:39:57 +02:00
Stefan Tauner cb47d89bbb libpayload: Add more integer limits
Change-Id: If0963237806804a2a9d7f622c33013321379a04d
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: http://review.coreboot.org/3536
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.huber@secunet.com>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-06-27 14:48:08 +02:00
Stefan Tauner 3509ad366d libpayload: Fix whitespace errors
Change-Id: Ibc36988745cbc7ede2a00da376b5dd295014ffb1
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: http://review.coreboot.org/3535
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.huber@secunet.com>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-06-27 14:46:43 +02:00
Nico Huber 6a008363be libpayload: Use longer delay in tinycurses' wgetch()
The counted delay of 1ms was shorter than the time usb_poll() took
(~30ms observed). So with a given timeout of 100ms it actually took 3s.
We can lower the problem if we delay 10ms per loop iteration.

Change-Id: I6e084bdd05332111cc8adcd13493a5dfb4bc8b28
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3533
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-06-26 20:51:07 +02:00
Patrick Georgi cb76136420 libpayload: Make lpgcc wrapper usable for in-tree builds
Teach lpgcc to look in the in-coreboot tree directory structure, too.

Change-Id: I3809456d072ce2f91542b0edb3fd39f536298cc2
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/3530
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-06-25 16:17:41 +02:00
Nico Huber 354066e117 libpayload: ahci: Increase timeout for signature reading
We can't read the drives signature before it's ready, i.e. spun up.
So set the timeout to the standard 30s. Also put a notice on the
console, so the user knows why the signature reading failed.

Change-Id: I2148258f9b0eb950b71544dafd95776ae70afac8
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3493
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-06-18 19:29:36 +02:00
Nico Huber a00f9830fb libpayload: ahci: Fix command engine shutdown
A timeout while waiting for a device' signature has shown that our
error path wasn't correct. The shutdown of the ports command engine
always timed out. Fix that by waiting for FR (FIS Receive Running)
to be cleared independently from CR (Command List Running) and after
clearing FRE (FIS Receive Enable).

Change-Id: I50edf426ef0241424456f1489a7fc86a2cfc5753
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3494
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-17 21:32:42 +02:00
Nico Huber 9029265cf5 libpayload: Fill gaps in the xHCI driver
Well, it turned out to be more as some gaps ;)
but we finally have xHCI running. It's well tested against a QM77 Ivy
Bridge board.

We have no SuperSpeed support (yet). On Ivy Bridge, SuperSpeed is not
advertised and USB 3 devices will just work at HighSpeed.

There are still some bit fields in xhci_private.h, so this might need
little more work to run on ARM.

Change-Id: I7a2cb3f226d24573659142565db38b13acdc218c
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/3452
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-13 22:21:20 +02:00
Nico Huber 5736fab4be libpayload: Port usb hub driver to use the generic code
This is mostly a rewrite, don't even try to read a diff.

Tested with an internal rate matching hub on a QM77 board and three hubs
integrated into DELL monitors.

Change-Id: Ib12fa2aa90af4e0f37143d2ed92c4a1705b6d774
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3451
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-13 22:18:49 +02:00
Nico Huber 0b78de2ee9 libpayload: Add a generic driver for usb hubs
The current drivers for external usb hubs and root hubs all follow
the same pattern. Before adding another one with 90% of the same code,
extract the common parts and rewrite them with a simple interface.

This also adds debouncing of new attachments. Current drivers just
waited 100ms before they reset the device. However, we should check
if the device becomes disconnected and reconnected during this period.

Porting of the current hub drivers will take place in separate
commits (when I have time to test the older HCIs).

Change-Id: I0c0ce0ac1b1cc51fb4cd009b3f9fcd1b9d2ba8fe
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3450
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-13 22:17:42 +02:00
Nico Huber aee44fa37d libpayload: usb: Add interval attribute to endpoints
Read bInterval from endpoint descriptors and store it in our endpoint_t
struct. The interval is encoded dependently on the device' speed and the
endpoint's type. Therefore, it will be normalized to the binary logarithm
of the number of microframes, i.e.
  t = 125us * 2^interval

The interval attribute will be used in the xHCI driver.

Change-Id: I65a8eda6145faf34666800789f0292e640a8141b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3449
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-13 22:16:39 +02:00
Patrick Georgi 482af6d15c libpayload: Redirect USB slave init through controller driver
xHCI requires special treatment of set_address since it determines
the device number itself (instead of the driver, as with the other
controllers). The controller also wants to validate a chosen device
configuration and we need to setup additional structures for the
device and the endpoints.

Therefore, we add three functions to the hci_t structure, namely:
  set_address()
  finish_device_config()
  destroy_device()
Current implementation for the Set Address request moved into
generic_set_address() which is set_address() for the UHCI, OCHI and
EHCI drivers. The latter two are only provided as hooks for the xHCI
driver.

The Set Configuration request is moved after endpoint enumeration.
For all other controller drivers nothing changes, as there is no other
device communication between the lines where the set_configuration()
call moved.

Change-Id: I6127627b9367ef573aa1a1525782bc1304ea350d
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/3447
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-13 22:16:27 +02:00
Nico Huber 4fc7b6c994 libpayload: Add enum for USB speeds
These values are already used in this usb stack.

Change-Id: If96f1dc2b67fbc13dfc4ae2d84e8f9945aa03163
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3448
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-13 22:13:16 +02:00
Nico Huber 735f55c29c libpayload: usb: Skip non-endpoint descriptors during init
During device initialization, skip any non-endpoint descriptor before
reading the endpoint descriptors. By now, only HID descriptors were
skipped.

Change-Id: I190f3ae44b864aa71d5f32c3738097cf8f33a61b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3446
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-06-13 22:02:18 +02:00
Nico Huber 5d1edf6276 libpayload: Whitelist Mobile Panther Point AHCI controller
Add the Mobile Panther Point (PPT) AHCI controller (DEVID 0x1e03) to
the list of tested controllers. Also comment the only other listed
controller (Mobile ICH9).

The PPT AHCI controller was tested with a QM77 chipset on a Kontron
KTQM77 board.

Change-Id: Ia396761411f4f9289af11ec8e1b144512b2fc126
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3361
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-04 21:14:32 +02:00
Patrick Georgi ce809b9c3a fix tinycurses
Change-Id: I9e7bde7b2c90b8b34c6aa8e90a16cd29dc108fe9
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/3360
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-04 21:13:08 +02:00
Dave Frodin adc300d88b libpayload: Fix the logic for hardware-less serial consoles
This fixes the configuration where serial console output is
being sent to non-existant hardware to be captured with I/O
trapping. In this configuration where there isn't serial
hardware present we still want to init the consoles. We just
never want to read non-existant hardware.

Change-Id: Ic51dc574b9c0df3f6ed071086b0fb2119afedc44
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/3249
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-05-15 16:56:33 +02:00
Dave Frodin 37f8c3af0e cbfs_core.c: make cfbs searches even less verbose
The cbfs core code would print out the name of the file it is
searching for and when it is found would print out the name
again. This contributes to a lot of unnecessary messages in a
functioning payload’s output. Change this message to a DEBUG one
so that it will only be printed when CONFIG_DEBUG_CBFS is enabled.

Change-Id: Ib238ff174bedba8eaaad8d1d452721fcac339b1a
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/3208
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-05-08 05:02:13 +02:00
Aaron Durbin 3eddcffe2d libpayload: make searching for a file less verbose
The cbfs core code would print out all unmatched file
names when searching for a file. This contributes to a lot
of unnecessary messages in the boot log. Change this
message to a DEBUG one so that it will only be printed when
CONFIG_DEBUG_CBFS is enabled.

Change-Id: I34c747e0d3406351318abf70994dbc0bb3fa6c01
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/3164
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Tested-by: build bot (Jenkins)
2013-05-06 23:08:16 +02:00
Stefan Reinauer 642b1db733 Eliminate use of pointers in coreboot table
Because pointers can be 32bit or 64bit big,
using them in the coreboot table requires the
OS and the firmware to operate in the same mode
which is not always the case. Hence, use 64bit
for all pointers stored in the coreboot table.
Guess we'll have to fix this up once we port to
the first 128bit machines.

Change-Id: I46fc1dad530e5230986f7aa5740595428ede4f93
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/3115
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-04-20 05:18:15 +02:00
Stefan Reinauer 6ceed0929d libpayload: Don't sneak in compiler includes
The way we got to include the compiler includes was kind of whacky.
Instead of mixing in potentially problematic headers, make libpayload
self-contained by adding some missing header files. Also clean up
conflicting definitions of size_t throughout the tree.

Signed-off-by: Stefan Reinauer <reinauer@google.com>

Change-Id: I0ad1194de1a00b7133c5477c00eb167d63a2ee85
Reviewed-on: https://gerrit.chromium.org/gerrit/47608
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@google.com>
Tested-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/3058
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-04-18 02:50:28 +02:00
Paul Menzel 109a710743 libpayload: storage.c: Fix typo in st*orage in comment
Reading commit »libpayload: New AHCI, ATA and ATAPI drivers«
(1f6bd94f) [1], the spelling error was found and is now fixed.

[1] http://review.coreboot.org/1622

Change-Id: Id418bcb99c1a9a400a49fc04078e465bd0908074
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3071
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-04-11 18:09:20 +02:00
Gabe Black 9e8af58263 libpayload: Handle multifunction bridge devices better.
This change modifies the code in libpayload that scans the PCI hierarchy for
USB controllers. Previously, if a devices primary function (function 0) was a
bridge, then none of the other functions, if any, would be looked at. If one
of the other functions was a bridge, that wouldn't be handled either. The new
version looks at each function that's present no matter what, and if it
discovers that it's a bridge it scans the other side.

Change-Id: I37f269a4fe505fd32d9594e2daf17ddd78609c15
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2517
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-04-08 20:27:46 +02:00
Paul Menzel 72ef8881a3 libpayload, superiotool: README: Prepend `coreboot/` to path of change directory line
Nico Huber spotted [1], that commit (4d6ab4e2) [1] updating
superiotools’s `README` with the Git command line

    superiotool: Update README with Git repository URL and directory location

missed, that after `git clone` one sitll has to change into
the cloned directory.

So prepend the path with `coreboot/` to fix that. The same error
happened in the commit (e1ea5151) for libpayload [2]

    libpayload: Update README with Git repository URL and directory location

and is fixed in this patch too.

[1] http://review.coreboot.org/#/c/3019/
[2] http://review.coreboot.org/2228

Change-Id: Ib6e8b678af6276556a40ccfd52ae35ca7e674455
Reported-by: Nico Huber <nico.h@gmx.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3021
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.huber@secunet.com>
2013-04-04 17:22:15 +02:00
Paul Menzel 032daad697 libpayload: cbfs_core.h: Add missing third person s in »it need*s*«
Introduced in »libpayload: New CBFS to support multiple firmware
media sources.« (d01d0368) [1].

[1] http://review.coreboot.org/2191

Change-Id: I9feb9ab49825744cd00d6392a526f7af0ed053d1
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/2997
Reviewed-by: Nico Huber <nico.huber@secunet.com>
Tested-by: build bot (Jenkins)
2013-04-02 09:58:55 +02:00
Paul Menzel bab0a0b577 PDCurses: pdcscrn.c: Use `#ifdef` instead of `#if CONFIG_SPEAKER`
Building libpayload with the PDCurses backend the following warning
is shown.

    /src/coreboot/payloads/libpayload(master) $ make clean
    /src/coreboot/payloads/libpayload(master) $ make
    […]
        CC         curses/pdcurses-backend/pdcscrn.libcurses.o
    curses/pdcurses-backend/pdcscrn.c: In function 'PDC_scr_open':
    curses/pdcurses-backend/pdcscrn.c:75:5: warning: "CONFIG_SPEAKER" is not defined [-Wundef]
    […]

The GCC documentation states [1]

    In some contexts this shortcut is undesirable. The -Wundef option
    causes GCC to warn whenever it encounters an identifier which is
    not a macro in an ‘#if’.

and therefore use `#ifdef` [2] to silence this warning. No functional
change is done, as `CONFIG_SPEAKER` is assigned the value `Y` when
defined.

There was some discussion going on the list [3], but my points in there
turned out to be incorrect.

[1] http://gcc.gnu.org/onlinedocs/cpp/If.html
[2] http://gcc.gnu.org/onlinedocs/cpp/Ifdef.html
[3] http://www.coreboot.org/pipermail/coreboot/2013-March/075561.html

Change-Id: I8e9c9b5d01985b21ad05018986d614cf9bf2b439
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/2934
Reviewed-by: Nico Huber <nico.huber@secunet.com>
Tested-by: build bot (Jenkins)
2013-04-01 23:24:38 +02:00
David Hendricks 08e3656b51 armv7: import updated cache/MMU stuff from coreboot
This imports the newest cache and MMU code from coreboot. This
time it's so new that it hasn't even been checked in to coreboot.

However, this version at least allows DMA to work properly for the
MSHC driver. So even if we rebase a few more times, this version is
at least a step in the right direction.

Note: This omits the stuff that sets up dcache policy since
libpayload should not need to worry about that and it depends
on cbmem stuff.

Change-Id: Idd42b083e8019634aaaa44d5bf5b51db6c3912f5
Signed-off-by: David Hendricks <dhendrix@google.com>
Reviewed-on: http://review.coreboot.org/2975
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: build bot (Jenkins)
2013-03-30 19:48:52 +01:00
David Hendricks 2fba5e27d4 armv7: import new cache maintenance API from coreboot
This imports the new cache maintenance API from coreboot at
commit bba8090. This is a BSD-licensed implementation which
exposes cache maintenance opertaions necessary for payloads
for things such as DMA transfers.

Change-Id: I554676db89517bebc6edae4f7ab7e5882e6f986d
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2974
Tested-by: build bot (Jenkins)
2013-03-30 19:48:42 +01:00
Aaron Durbin a09760eb45 libpayload: add x86 ROM variable MTRR support
On x86, coreboot may allocate a variable range MTRR for enabling caching
of the system ROM. Add the ability to parse this structure and add the
result to the sysinfo structure.

An example usage implementation would be to obtain the variable MTRR
index that covers the ROM from the sysinfo structure. Then one would
disable caching and change the MTRR type from uncacheable to
write-protect and enable caching. The opposite sequence is required
to tearn down the caching.

Change-Id: I3bfe2028d8574d3adb1d85292abf8f1372cf97fa
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2920
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-03-29 20:10:14 +01:00
Stefan Reinauer 0a527e7e5d libpayload: Fix prototype warnings in PDCurses
This fixes the following PDCurses warnings:

    CC         curses/pdcurses-backend/pdcsetsc.libcurses.o
curses/pdcurses-backend/pdcsetsc.c: In function 'PDC_curs_set':
curses/pdcurses-backend/pdcsetsc.c:17:9: warning: implicit declaration of function 'serial_cursor_enable' [-Wimplicit-function-declaration]
curses/pdcurses-backend/pdcsetsc.c:22:9: warning: implicit declaration of function 'video_console_cursor_enable' [-Wimplicit-function-declaration]
    CC         curses/pdcurses-backend/pdcutil.libcurses.o
curses/pdcurses-backend/pdcutil.c:30:6: warning: no previous prototype for 'curses_enable_serial' [-Wmissing-prototypes]
curses/pdcurses-backend/pdcutil.c:35:6: warning: no previous prototype for 'curses_enable_vga' [-Wmissing-prototypes]
curses/pdcurses-backend/pdcutil.c:40:5: warning: function declaration isn't a prototype [-Wstrict-prototypes]
curses/pdcurses-backend/pdcutil.c:45:5: warning: function declaration isn't a prototype [-Wstrict-prototypes]

Change-Id: If0d4d475d3006f1a77f67ec46c6bdf4ee2906981
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2908
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-26 19:37:33 +01:00
Stefan Reinauer c7b6d7db09 libpayload: Fix type issues
There were a number of type issues in libpayload that sneaked in
with 903f8e0.

- size_t and ssize_t were conflicting with gcc builtins
- some stdint types were used in libpayload but not defined
  in our stdint.h

With this patch it's possible to compile libpayload with the
reference toolchain again.

Change-Id: Idd5ccfdd9f3536b36bceca2d101e7405883b10bc
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2903
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-26 19:36:39 +01:00
Stefan Reinauer e21f5e1483 libpayload: fix size_t handling
libcbfs was using printf for size_t typed variables. However, printf
did not support printing those. This patch fixes the issue, removing
the warning when compiling ram_media.c

libcbfs/ram_media.c:52:10: warning: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'long unsigned int' [-Wformat]
libcbfs/ram_media.c:52:10: warning: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'long unsigned int' [-Wformat]

Change-Id: Iaf6e723f9a5b0a61a39d3125036fee9853e37ba8
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2904
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-26 19:35:28 +01:00
Stefan Reinauer a6c495edca libpayload: Fix const warnings in keyname() and termname()
The keyname() and termname() functions were creating a whole lot of warnings of
the style

curses/PDCurses-3.4/pdcurses/keyname.c:41:9: warning: initialization discards 'const' qualifier from pointer target type [enabled by default]

This patch fixes them.

Change-Id: Iae3c4e5201b48c2d2033cac48577e0462a34f309
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2905
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-03-26 19:13:46 +01:00
Stefan Reinauer 8d225f141d libpayload: Fix variable shadowing in PDCurses
PDCurses has a function called overlay() and also uses
overlay as a variable name in some functions.

This patch fixes the ambiguity that caused warnings like
curses/PDCurses-3.4/pdcurses/overlay.c: In function '_copy_win':
curses/PDCurses-3.4/pdcurses/overlay.c:51:39: warning: declaration of 'overlay' shadows a global declaration [-Wshadow]
In file included from curses/PDCurses-3.4/curspriv.h:16:0,
                 from curses/PDCurses-3.4/pdcurses/overlay.c:3:
curses/PDCurses-3.4/curses.h:1014:9: warning: shadowed declaration is here [-Wshadow]

Change-Id: I907653df0c8bb32c98bdcbc6476e94d2da6e0e90
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2906
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-03-26 19:13:29 +01:00
Stefan Reinauer 0fef4fe61b libpayload: Fix missing prototype warning for Xinitscr()
Xinitscr is only used internally in PDCurses, unless XCURSES
is defined. This patch fixes a warning that is produced because
of that.

Change-Id: I211f75717276cf028e0b435f328d1687d3536eb7
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2907
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-03-26 19:08:30 +01:00
Stefan Reinauer d5c79f9cc8 libpayload: Fix unused function warning in EHCI stack
The function dump_qh() was added a while back but never used.
Hide it behind USB_DEBUG so it doesn't cause warnings when not
debugging the USB stack.

Change-Id: Idb3c7bb214895ef82676d181836a578bf161e8e0
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2909
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martin.roth@se-eng.com>
2013-03-26 19:07:53 +01:00
Stefan Reinauer 04d352db41 libpayload: Fix Config.in warning
PDcurses is already default. Hence drop the additional attempt
that is not supported by Kconfig.

Config.in:123:warning: defaults for choice values not supported

Change-Id: I12cb5ea0bef2f146cf237c7a3cc9293a600d736b
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2902
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-03-25 23:06:34 +01:00
Mathias Krause 59c020ab15 libpayload: fix use-after-free in usb_exit()
The controller's shutdown function free()s the controller structure so
we shouldn't access it any more after calling shutdown.

As all controllers detach themself, i.e. unchain themself from usb_hcs,
just keep iterating over usb_hcs until it's NULL.

Change-Id: Ie85caba0f685494c3fe04c550a5a14bc4158a94e
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: http://review.coreboot.org/2900
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-03-25 15:34:53 +01:00
Mathias Krause 7a9da71c5f libpayload: EHCI - detach controller in ehci_shutdown()
It shouldn't be used any more as we're about to free() the memory behind
the controller -- therefore detach it.

Change-Id: I875322a9940570c51d412a7f3bfb6af4ea3b3764
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: http://review.coreboot.org/2899
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.huber@secunet.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-03-25 13:18:41 +01:00
Nico Huber d1cc812799 libpayload: Add comments on virtual pointers in lib_sysinfo
After another incident related to virtual pointers in lib_sysinfo (and
resulting confusion), I decided to put some comments on the matter into
the code.

Remember, we decided to always use virtual pointers in lib_sysinfo, but
it's not always obvious from the code, that they are.

See also:
425973c libpayload: Always use virtual pointers in struct sysinfo_t
593f577 libpayload: Fix use of virtual pointers in sysinfo

Change-Id: I886c3b1d182cba07f1aab1667e702e2868ad4b68
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/2878
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-03-22 16:20:08 +01:00
Patrick Georgi 36b6f367c0 libpayload: initial test case + tiny "framework"
This adds a test case for using CBFS images that reside in RAM
and a Makefile to run it (and maybe other tests in the future).

The test concerns an issue in libcbfs when using x86 style CBFS
images in non-canonical locations (eg. when loading CBFS images
for processing).

Use with "make run" inside the tests directory.

Change-Id: I1af3792a1451728ff9594ba7f0410027cdecb59d
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/2623
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-03-22 00:35:32 +01:00
Shawn Nematbakhsh c3221183ee cbfs: Change false ERROR print to a WARNING.
Change "ERROR" to "WARNING" -- not finding the indicated file is usually
not a fatal error.

Change-Id: I0600964360ee27484c393125823e833f29aaa7e7
Signed-off-by: Shawn Nematbakhsh <shawnn@google.com>
Reviewed-on: http://review.coreboot.org/2833
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-21 23:23:31 +01:00
Gabe Black f06111aaf4 libpayload: Fix the config file dependency in the Makefile template
The template had a dependency on config.h which was correct for coreboot,
where this build system originally came from, but not for libpayload which
uses the differently named libpayload-config.h, presumably to avoid colliding
with a config.h used by the actual payload. Because libpayload-config.h is now
effectively a dependency of everything, it doesn't have to be added piecemeal
in Makefile.inc.

Change-Id: I01f20d363cb1393fa1cdcf0dc916670db90294e9
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2763
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-18 20:46:09 +01:00
Gabe Black a2d786f0e6 libpayload: Make keycode constants available outside of curses.h.
And include the new, split out version in drivers/keyboard.c and
drivers/usb/usbhid.c. Those files were including curses.h just for those
definitions, but the include path was only fixed up to to point to the
libpayload versions of those files if one of the variants of curses was
compiled in. If neither was, gcc would fall back to the system version of that
header which is wrong.

Change-Id: I8c2ee0baf5f0702bd8c713c8dd4613a4bb269ce5
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2762
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-18 20:45:48 +01:00
Aaron Durbin 5ca4f4119b libpayload: add support for vboot_handoff
The vboot_handoff structure needs to be parsed from the coreboot tables.
Add a placeholder in sysinfo as well as the ability to parse the
coreboot table entry concering the vboot_handoff structure.

Built with unified boot loader and ebuild changes. Can find and use
the VbInitParams for doing kernel selection.

Change-Id: If40a863b4a445fa5f7814325add03355fd0ac647
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2720
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-14 04:57:03 +01:00
Gabe Black 1cb414de63 libpayload: Turn the endian conversion macros into functions.
In their current macro form, any arguments that are expressions will be
evaluated multiple times. That can cause problems if they have side effects,
and might not even compile if the overall expression is ambiguous, for
instance if you pass in foo++.

Built with code that previously wouldn't compile because the macros
expanded to ambiguous expressions.

Change-Id: I378c04d7aff5b4ad40581930ce90e49ba7df1d3e
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2719
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-14 04:56:05 +01:00
Gabe Black 5c0b7abe78 libpayload: Generalize and redistribute timekeeping code
The timekeeping code in libpayload was dependent on rdtsc, and when it was
split up by arch, that code was duplicated even though it was mostly the same.
This change factors out actually reading the count from the timer and the
speed of the timer and puts the definitions of ndelay, udelay, mdelay and
delay into generic code. Then, in x86, the timer_hz and timer_get_raw_value
functions which used to be in depthcharge were moved over to libpayload's
arch/x86/timer.c. In ARM where there isn't a single, canonical timer, those
functions are omitted with the intention that they'll be implemented by a
specific timer driver chosen elsewhere.

Change-Id: I9c919bed712ace941f417c1d58679d667b2d8269
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2717
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-14 04:53:33 +01:00
Gabe Black 6a0b3611c5 libpayload: Put dump_td/dump_ed in ohci.c behind #ifdef USB_DEBUG
This function is static and not used in that file. To avoid the compiler
complaining about that fact, put the two functions and the call to dump_ed
(currently #if 0) behind #ifdef USB_DEBUG

Change-Id: Ic373313b5fff81f09800f286b32238350ab699c6
Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2716
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-14 04:52:38 +01:00
Gabe Black cc86e63e83 libpayload: Don't declare the loop counter within the for loop
'for' loop initial declarations are only allowed in C99 mode

I didn't realize we don't enable 14 year old features when building
libpayload, and I must have accidentally not rebuilt everything when making my
final tweaks to my earlier change.

Change-Id: I6caeeffad177b6d61fa30175f767e85084c061f4
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2718
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
2013-03-14 01:42:52 +01:00
Gabe Black 00e5da6f25 libpayload: Don't do unaligned accesses during LZMA decompression
Use memcpy to access a uint32_t that's inherently unaligned due to the layout
of the LZMA header format.

Built and booted on Daisy and saw a data abort go away. Built and booted
into developer mode on Link and verified that bitmaps were
decompressed/displayed correctly.

Change-Id: Id3ae746c04d23bcb0345cb71797bfa219479cc8f
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2670
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-13 23:42:09 +01:00
Gabe Black 903f8e0330 libpayload: Add size_t and ssize_t types for ARM and x86
Some new TPM drivers in depthcharge require that type. I added it to
arch/types.h which seemed appropriate, but I'm not sure that's exactly the
right header to use, or in other words if you'd get that type from libpayload
the same way you'd get it if you were building a standard Linux program.

Also, I attempted to determine what underlying types gcc would use, and while
I think I picked the right ones I'm not 100% certain of that either.

Change-Id: Ic5c0b4173c8565ede3bfce8870976d596d69e51d
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2669
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-13 23:41:40 +01:00
Gabe Black a0e27979c0 libpayload: Move over to the payload's stack during startup
Don't keep using the coreboot stack on ARMv7.

Change-Id: I734c5d77f8584e30ee0c720d41e21e3040f56db4
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2668
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-13 23:41:23 +01:00
Gabe Black 49ff3c50dd libpayload: ARCH-$(CONFIG_ARCH_ARMV7) was defined twice, make one POWERPC
Change-Id: Ia85a7cd6a0b85119cce6b2f9c42a7fc31ffd9f97
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2654
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-13 23:09:31 +01:00
Gabe Black dc9e77f451 libpayload: Add usb_generic_(create|remove) functions for unrecognized devices
It might be useful to provide a USB driver in the payload itself instead of in
libpayload. For example there are multiple payloads being built and linked
against the same libpayload, and they might not need or even want to have the
same set of drivers installed.

This change adds two new functions, usb_generic_create and usb_generic_remove,
which behave like the usbdisk_create and usbdisk_remove functions which are
defined for USB mass storage devices. If a USB device isn't recognized and
claimed by one of the built in USB class drivers (currently hub, hid, and msc)
and the create function is defined, then it will be called to give the payload
a chance to use the device. Once it's removed, if usb_generic_remove is
defined it will be called, effectively giving the payload notice.

Built and booted depthcharge on Link. Built depthcharge for Daisy. Built
a netbooting payload, called usb_poll() with those functions implemented, and
verified that they were called and that the devices they were told about were
reasonable and the same as what was reported by lsusb in the booted system.

Change-Id: Ief7c0a513b60849fbf2986ef4ae5c9e7825fef16
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2666
Tested-by: build bot (Jenkins)
Reviewed-by: Kimarie Hoot <kimarie.hoot@se-eng.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-13 23:08:58 +01:00
Julius Werner 69eea7c01a libpayload: Split EHCI bulk transfers on packet boundaries over qTDs
EHCI controllers see transfers as a queue of transfer descriptors
(qTDs), each of which can represent an aligned area of up to 20KB. Each
qTD is processed separately, which means that a single USB packet cannot
span multiple qTDs.

While this should not be a problem according to the specification, some
USB storage devices seem to get confused when a packet in the middle of
a transfer is smaller than the maximum packet size (512 bytes) due to
falling on a qTD boundary. This patch aligns the total transfer length
per qTD to 512 bytes to avoid that problem (any excess bytes will simply
roll over to the next qTD).

Change-Id: I0b5db07507699a3861b30c1a5ee774c45dda7fdd
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/2651
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-13 23:08:11 +01:00
Vincent Palatin 716375dd3e libpayload: add support for 64-bit EHCI controllers
Initialize the high part of the address
and use 64-bit compatible descriptors.
(waste a few bytes on 32-bit but should be harmless)

Read USB stick on a SandyBridge system which has 64-bit EHCI.

Change-Id: I59cc842459acecdde8f8bdd4795ebfeccb842c8f
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2650
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kimarie Hoot <kimarie.hoot@se-eng.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-13 23:07:49 +01:00
Gabe Black 613c0f630a libpayload: Stub out time keeping functions for ARM as well
These were currently stubbed out for PowerPC but not for ARM.

Change-Id: I08f45174877bf5751d972078b8c53d82898b7f2b
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2655
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-13 23:06:27 +01:00
Gabe Black 1617e1f0ab libpayload: If no video drivers initialize in video_init, return 1.
Change-Id: I56f810dfa6654ac1e9d1696ad15e7f1b8bfe59bd
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2652
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-03-13 23:06:14 +01:00
Gabe Black b7b57d9751 libpayload: If there's no IO address space, don't try to use it for serial
Change-Id: I01b1fa42139af925716cd5d57f96dc24da6df5a7
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2660
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-13 23:05:06 +01:00
Gabe Black d8d4d113f0 libpayload: If there's no IO space, complain if the serial claims to use it
Change-Id: I36c750d520ff034c9ca9b9af46bd99bd49af7355
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2659
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-13 23:04:54 +01:00
Gabe Black 1c1171208f libpayload: Consolidate io vs. mem mapped serial into accessor functions
This way we won't have two copies of the hardware init function, and three
copies of the putchar, havechar, and getchar functions.

Change-Id: Ifda7fec5d582244b0e163ee93ffeedeb28ce48da
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2657
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-13 23:04:29 +01:00
Gabe Black d267987083 libpayload: Make whether or not there's an IO address space configurable
Default it to no to be consistent with the other architecture wide options
(endianness), and turn it on explicitly for x86 and PowerPC.

Change-Id: Idda26d580156bbbf08ea11b28abe75cfa6b594b2
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2658
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-13 23:02:05 +01:00
Ronald G. Minnich ba949d32ba libpayload: Start using only internal and compiler headers.
When building other payloads with lpgcc the -nostdinc flag was injected into
CFLAGS, but when building libpayload itself some headers were being used from
the host system. This change puts -nostdinc into the Makefile and xcompile
script, fixes up one include path in include/inttypes.h, adds the compiler
provided include directory to the include search path, and deletes the two now
redundant stdint.h files.

BUG=None
TEST=With this and other changes, built libpayload and depthcharge for Daisy,
Link, and Fox.
BRANCH=None

Change-Id: Ia7817fceab5297cd82ccc0d392330de0df61980e
Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2710
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-03-13 22:04:44 +01:00
Gabe Black 2def2625e0 libpayload: Add more parenthesis to the endian conversion macros
There weren't enough parenthesis in the macros so operations might only apply
to the last part of an expression passed in as an argument.

Change-Id: I5afb406f9409986e45bbbc598bcbd0dd8507ed35
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2665
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2013-03-13 19:12:31 +01:00
Gabe Black b53a73ef77 libpayload: Make the source for lzma decompression const
Change-Id: I9a16331dedc97f17af94bf2cf535a9c93d1729a0
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2667
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-03-13 18:16:35 +01:00
Hung-Te Lin e112b746e0 libpayloads: Provide BSD/glibc style endian functions.
The functions in endian.h (betoh{l,w,ll} and others) were named differently from
the well-known BSD/glibc style endian functions (ex, betoh{16,32,64}). We should
provide the BSD/glibc style functions to prevent confusion.

Change-Id: Ia3bee481ba7989ac25b79ddb89bc6819d52fd8c3
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: http://review.coreboot.org/2705
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-13 17:37:09 +01:00
Gabe Black e0c974185c libpayload: Remove unnecessary include of arch/msr.h
The functions defined in that header aren't used anywhere in the actual code,
and that include breaks things on ARM.

Built for ARM with COREBOOT_VIDEO_CONSOLE turned on and saw compiler
errors go away.

Change-Id: I56d6fe5e00c8fccda6e31ef8752326bd36398e74
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2656
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-03-12 23:56:43 +01:00
Gabe Black 2c2c4fae22 libpayload: In the USBMSC read_capacity function, make buf an array of u32.
That way when it's treated as a u32 when its value is extracted for numblocks
and blocksize below, it doesn't make the compiler unhappy, and it ensures that
the buffer will be properly aligned on architectures where that sort of thing
matters.

Built and saw warnings about type punning go away.

Change-Id: I254e0b5e70847112d660675b7df0ac9cb52e4051
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2653
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-03-12 23:56:16 +01:00
Patrick Georgi db2e3aa257 libpayload: Fix reading x86 CBFS images from RAM
Three issues:
 1. the hardcoded dereferenced pointer at 0xfffffffc
 2. "RAM media" has no idea about ROM relative addresses
 3. off-by-one in RAM media: it's legal to request 4 bytes from 0xfffffffc

Change-Id: I671ac12d412c71dc8e8e6114f2ea13f58dd99c1d
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/2624
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2013-03-12 10:23:12 +01:00
Gabe Black c8e4284acb libpayload: Turn on thumb interworking in libpayload.
Things work better with it turned on, and the overhead should be negligable.

Built and booted into depthcharge on Snow. Verified that calling between
various bits of thumb and ARM code worked correctly.

Change-Id: I08d1006e113d2cca08634bf19240aca138a449d9
Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2567
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-03-04 22:47:49 +01:00
Ronald G. Minnich 9907c6edeb libpayload: Catch exceptions and print out an error message.
Give some indication what happened instead of just crashing.
As part of setup, cause an exception and make sure that we get
the right one, and that we recover correctly. Hence we have
some assurance that if they really happen we can handle them.

Built and booted into test payload on Snow. Saw the built in test function
worked correctly. Artificially added code which got an exception and saw that
the error information prints correctly.

Change-Id: I2e0d022f090ee422fb988074fbb197afa2485caa
Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2569
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2013-03-04 22:39:09 +01:00
Idwer Vollering 1a43309bf7 bump SeaBIOS to 1.7.2.1
Update coreboot to use SeaBIOS' tag rel-1.7.2.1

Change-Id: I01969407964a7cf64f7c4800b59c6aed845b24f9
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/2575
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-03-04 11:00:17 +01:00
Gabe Black d895827c0f libpayload: Mark "halt" as a function.
The linker uses that info so interworking can work correctly.

Built and booted into depthcharge on Snow and saw interworking start to
work correctly.

Change-Id: I0ac54f1c424ec70f8244edf6541a10b089ce47b4
Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2568
Tested-by: build bot (Jenkins)
2013-03-01 16:49:41 +01:00
Paul Menzel a46a712610 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
In the file `COPYING` in the coreboot repository and upstream [1]
just one space is used.

The following command was used to convert all files.

    $ git grep -l 'MA  02' | xargs sed -i 's/MA  02/MA 02/'

[1] http://www.gnu.org/licenses/gpl-2.0.txt

Change-Id: Ic956dab2820a9e2ccb7841cab66966ba168f305f
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/2490
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-03-01 10:16:08 +01:00
Gabe Black ef650a5d24 libpayload: Check for completion more often in ehci_set_periodic_schedule.
This function was using mdelay in a loop to check for the completion of an USB
controller operation. Since we're busy waiting anyway, we might as well wait
only 1 us before checking again and potentially seeing the completion 999 us
earlier than we would otherwise.

Change-Id: I177b303c5503a0078c608d5f945c395691d4bd8a
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2522
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-02-28 01:25:46 +01:00
Gabe Black 89ccc9285e libpayload: Add a pointer for user data on the USB MSC data structure.
This is so the user of libpayload can attach data to the device which it can
retrieve when the device is referred to later, for instance in usbdisk_remove.
Otherwise, there's no direct connection from the usbdev_t structure to any
bookkeeping in the host firmware.

Change-Id: I36fe693b0dcd2098e359c26744e376e73bd3a723
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2513
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.huber@secunet.com>
2013-02-26 21:20:14 +01:00
Gabe Black 37ef52d44b libpayload: Correct a constant used for scanning for USB controllers.
When checking to see if a PCI device exists at a particular bus/dev/func,
libpayload was checking the vendor and device id fields together against a 16
bit 0xffff. The two fields together are 32 bits, however, so the check was
never true, and all dev/func combinations on a particular bus would be
checked. That was slightly wasteful, but had relatively small impact.

Change-Id: Iad537295c33083243940b18e7a99af92857e1ef2
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2521
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-02-26 07:39:06 +01:00
Gabe Black b4523bb691 libpayload: Change the measurement interval for get_cpu_speed to 2 ms.
The interval used to be about 55 ms which is excessively long. Coreboot only
waits for 2 ms and gets a reasonable answer. That should be good enough for us
as well.

Change-Id: I4d4e8b25b6ba540c9e9839ed0bbaa1f04f67cce1
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/2520
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-02-26 07:38:41 +01:00
Hung-Te Lin fbf078311f libpayload: cbfs: Fix CBFS max size calculation.
Cherry-picking CBFS fix from http://review.coreboot.org/#/c/2292/

For x86, the old CBFS search behavior was to bypass bootblock and we should keep
that.  This will speed up searching if a file does not exist in CBFS.
For arm, the size in header is correct now so we can remove the hack by
CONFIG_ROM_SIZE.

Change-Id: I286ecda73bd781550e03b0b817ed3fb567d6b8d7
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: http://review.coreboot.org/2458
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-02-22 09:23:43 +01:00
Stefan Reinauer c9f35f5300 libpayload: Fix license headers
Not only were these files checked in with the Chromium OS Authors
copyright, but in addition they were wrongly licensed as GPL.
Switch to 3-clause BSD (and, since we're changing it, fix copyright,
too)

Change-Id: I3656c1f4304d53e343d89bb7c909fd4b929249f4
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2456
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-02-20 02:41:24 +01:00
Patrick Georgi 46cb96bb88 libpayload: libcbfs: Fix legacy CBFS API, typos
get_cbfs_header expects CBFS_HEADER_INVALID_ADDRESS (0xffffffff)
instead of NULL when something is wrong.

Also, fix typo.

Change-Id: Ibe56c9eab3b9fdfc6d0b14bc848ca75f3a4fc2f1
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/2455
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2013-02-19 19:44:57 +01:00
Ronald G. Minnich 7b6945405a libpayload: only compile drivers/serial.c on machines that use it.
Create a new serial console variable, X86_SERIAL_CONSOLE
which is only enabled when SERIAL_CONSOLE and ARCH_X86 are defined.

Builds for x86 and ARM.

Change-Id: I607253c418de015975a839e3c33577842885ec0c
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2412
Tested-by: build bot (Jenkins)
Reviewed-by: Gabe Black <gabeblack@chromium.org>
2013-02-16 04:48:51 +01:00
Ronald G. Minnich 8deb5c6e0f libpayload: Use the same type for 32 bit data in readl as in uint32_t.
The compiler gets mad when the types are equivalent size but not necessarily
interchangeable because of strict aliasing checks. Since uint32_t is likely to
be used when trying to read 32 bit data, it makes sense for them to be the
compatible.

Signed-off-by: Gabe Black <gabeblack@google.com>

Change-Id: If73d794866055dc026fc06d6268e692adac0f835
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2411
Tested-by: build bot (Jenkins)
Reviewed-by: Gabe Black <gabeblack@chromium.org>
2013-02-15 06:52:01 +01:00
Ronald G. Minnich 1a29c1e766 libpayload: fix compiler flags
lpgcc was unconditionally setting -m32.

Most of the flags it sets in the common case are right, however: no need
to duplicate them everywhere, and we only want to change the common ones
in one place, so it would be a shame to duplicate _CFLAGS all over the place.

So add another variable, _ARCHEXTRA, which can be used to add
special flags to _CFLAGS. We onlu use it at present for the x86; this may
change.

This allows us to get through compiling on arm and x86.

Change-Id: I12f1620982c4ee10f76b3953e4225f13db31531e
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2399
Tested-by: build bot (Jenkins)
Reviewed-by: Gabe Black <gabeblack@chromium.org>
2013-02-15 06:51:52 +01:00
Ronald G. Minnich 2cc105c741 libpayload: get time to compile cross-arch
Get rid of the nest of includes, and make separate sections
for each architecture. Also gets rid of the "there's X86 and there's
everything else" structure of this file.

Change-Id: I4232f50f048fa05e911e5de3aa9ec1530931b461
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2397
Tested-by: build bot (Jenkins)
Reviewed-by: Gabe Black <gabeblack@chromium.org>
2013-02-15 06:51:38 +01:00
Ronald G. Minnich c1ee8641cb libpayload: make functions static that are unused outside memory.c
The default_ functions in memory.c are only used to initialize a weak
variable.  They should not be used outside memory.c. Make them
invisible.

Remove the declaration from libpayload.h. For real this time.

Change-Id: Id54c1fd172c78748f01a958ce4065dd0eb53bbc3
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2394
Tested-by: build bot (Jenkins)
Reviewed-by: Gabe Black <gabeblack@chromium.org>
2013-02-15 06:51:17 +01:00
Ronald G. Minnich f2e10cb544 libpayload: Use an appropriate range of memory when looking for cb tables.
These live at the bottom of memory on x86, but that's IO mapped on the exynos.
The particular range used will likely need to be configurable, but this will
make it work in one more case than it used to.

Change-Id: I4d4963b9732cf538d00f8effb4398f30cbbde6aa
Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2410
Tested-by: build bot (Jenkins)
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-02-15 03:19:06 +01:00
Ronald G. Minnich 2149ad3c9c libpayload: add a ldscript for arm
I think this needs to be its own ldscript. I'm pretty sure this one
is going to need some work however. Is libpayload PIC? That would be
best if so.

Change-Id: I44578d70dfa72de527af8901a86583c2a60130ec
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2398
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: build bot (Jenkins)
2013-02-15 01:13:11 +01:00
Ronald G. Minnich c2e8cf5675 libpayload; put the ldscript into an arch-dependent directory path
Since it's utterly architecture-dependent, put it in arch/x86.
Avoid the temptation to make yet another directory with just one
file in it. Fix the makefile to pick up the proper arch-dependent script.

Change-Id: I21ea02551a97bdcbc38419714f3b38cf8335c178
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2389
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-02-14 21:32:02 +01:00
Hung-Te Lin d01d0368f4 libpayload: New CBFS to support multiple firmware media sources.
Upgrade CBFS in libpayload to use new media-based implementation from coreboot
( http://review.coreboot.org/#/c/2182/ ).

Old CBFS functions (cbfs_find, cbfs_find_file, get_cbfs_header) are still
supported, although the recommended way is to use new CBFS API.

To migrate your existing x86 payload source:
	- Change cbfs_find to cbfs_get_file
	- Change cbfs_find_file to cbfs_get_file_content
	- Prefix every CBFS call with a CBFS_DEFAULT_MEDIA argument.

Ex, char *jpeg_data = cbfs_find_file("splash.jpg", CBFS_TYPE_BOOTSPLASH);
 => char *jpeg_data = cbfs_get_file_content(
		CBFS_DEFAULT_MEDIA, "splash.jpg", CBFS_TYPE_BOOTSPLASH);

The legacy setup_cbfs_from_{ram,flash} is also supported, although the better
equivalent is to make a new media instance:
	struct cbfs_media ram_media;
	init_cbfs_ram_media(&ram_media, start, size);
	char *data = cbfs_get_file_content(&ram_media, "myfile", my_type);

Verified by being successfully linked with filo.

Change-Id: If797bc7e3ba975d7e3be905c59424f7a93b8ce11
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: http://review.coreboot.org/2191
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-02-12 11:34:20 +01:00
Marc Jones e876819975 Fix libpayload xcompile xgcc path
The libpaylaod xcompile script path to xgcc should look
for coreboot/util, not libpayload/util.

Change-Id: I565801549cdcdfcf55ecef1b543a982f969f435b
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/2261
Tested-by: build bot (Jenkins)
Reviewed-by: Steven Sherk <steven.sherk@se-eng.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-01 20:15:47 +01:00
Anton Kochkov c07fb15f17 libpayload: add EHCI QH/qTD debugging
Improve USB debugging for EHCI by adding dump_qh
and enhacing dump_td to dump all queue chain and information.

Change-Id: Ia8ecf19c6dac085cf9558bdf659a5e74ce332714
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/2053
Tested-by: build bot (Jenkins)
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.huber@secunet.com>
2013-02-01 11:22:59 +01:00
Paul Menzel e1ea5151de libpayload: Update README with Git repository URL and directory location
Change-Id: I3e068f5e6c1eb875df0885c0ce43a03082be31a5
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/2228
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-30 17:36:22 +01:00
Stefan Reinauer cc5b344662 Project PIANO aka tianocoreboot
This is a Tiano Core loader payload based on libpayload.  It
will load a Tiano Core DXE core from an UEFI firmware volume
stored in CBFS.

Currently Tiano Core dies because it does not find all the UEFI services it needs:

coreboot-4.0-3316-gc5c9ff8-dirty Mon Jan 28 15:37:12 PST 2013 starting...
[..]
Tiano Core Loader v1.0
Copyright (C) 2013 Google Inc. All rights reserved.

Memory Map (5 entries):
  1. 0000000000000000 - 0000000000000fff [10]
  2. 0000000000001000 - 000000000009ffff [01]
  3. 00000000000c0000 - 0000000003ebffff [01]
  4. 0000000003ec0000 - 0000000003ffffff [10]
  5. 00000000ff800000 - 00000000ffffffff [02]

DXE code:  03e80000
DXE stack: 03e60000
HOB list:  03d5c000

Found UEFI firmware volume.
  GUID: 8c8ce578-8a3d-4f1c-9935-896185c32dd3
  length: 0x0000000000260000

Found DXE core at 0xffc14e0c
  Section 0: .text     size=000158a0 rva=00000240 in file=000158a0/00000240 flags=60000020
  Section 1: .data     size=00006820 rva=00015ae0 in file=00006820/00015ae0 flags=c0000040
  Section 2: .reloc    size=000010a0 rva=0001c300 in file=000010a0/0001c300 flags=42000040

Jumping to DXE core at 0x3e80000
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 3E96708
HOBLIST address in DXE = 0x3E56010
Memory Allocation 0x00000003 0x3E80000 - 0x3EBFFFF
FV Hob            0xFFC14D78 - 0xFFE74D77
InstallProtocolInterface: D8117CFE-94A6-11D4-9A3A-0090273FC14D 3E95EA0
InstallProtocolInterface: EE4E5898-3914-4259-9D6E-DC7BD79403CF 3E9630C

Security Arch Protocol not present!!

CPU Arch Protocol not present!!

Metronome Arch Protocol not present!!

Timer Arch Protocol not present!!

Bds Arch Protocol not present!!

Watchdog Timer Arch Protocol not present!!

Runtime Arch Protocol not present!!

Variable Arch Protocol not present!!

Variable Write Arch Protocol not present!!

Capsule Arch Protocol not present!!

Monotonic Counter Arch Protocol not present!!

Reset Arch Protocol not present!!

Real Time Clock Arch Protocol not present!!

ASSERT_EFI_ERROR (Status = Not Found)
ASSERT /home/reinauer/svn/Tiano/edk2/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c(461): !EFI_ERROR (Status)

Change-Id: I14068e9a28ff67ab1bf03105d56dab2e8be7b230
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2154
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-30 17:34:40 +01:00
Stefan Reinauer 658e4d3ea9 libpayload: use $(DOTCONFIG) instead of .config
When overriding the DOTCONFIG variable, make install
will fail in libpayload.

Change-Id: I332be3a4ca2620a32a6f5fbe683e6c71f0d6a9e9
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2178
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-01-25 20:06:46 +01:00
Stefan Reinauer 09e16dc215 libpayload: Style fixes
Change-Id: Ic3164fbffd8da6bd9d506d80e425ad89efc0f1af
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/2144
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-01-15 09:29:30 +01:00
Hung-Te Lin 086842a13e Change "VERSION*" to more determined name "CBFS_HEADER_VERSION*".
The 'VERSION' in CBFS header file is confusing and may conflict when being used
in libpayload.

Change-Id: I24cce0cd73540e38d96f222df0a65414b16f6260
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: http://review.coreboot.org/2098
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-01-04 06:27:33 +01:00
Stefan Reinauer 7299c139c5 PDcurses: Delete automatically created (and unused) files
Change-Id: Iefe0872d36c3a5d8ef42e62325838b7f09b389d2
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2034
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: build bot (Jenkins)
2012-12-20 14:46:29 +01:00
Patrick Georgi 69e3de3393 libpayload: Another usb fix
Change-Id: I91b18fadbf17562f8b48e233631653f2a18c037c
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/2063
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-12-20 09:31:01 +01:00
Patrick Georgi 5fa7ea419b libpayload: fix USB
A "far" modifier sneaked into the USB driver, but gcc
doesn't understand it.

Change-Id: I5c67bd55eabce467e1aa107c95c1db2518af7b0e
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/2059
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-12-19 20:53:36 +01:00
Anton Kochkov c62b69cd02 libpayload: improved UHCI TD debugging
Improved USB debugging for EHCI by enhacing dump_td
to dump all chain information

Change-Id: I8c667b43e09c39ff12aafbd779474efd652bd80f
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/2054
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.huber@secunet.com>
2012-12-19 15:19:34 +01:00
Anton Kochkov cf7b63ff65 libpayload: improving OHCI TD/ED debugging
Improving USB debugging for OHCI by enhacing dump_td
and adding dump_ed function to dump all chain information

Change-Id: Ia8b2a9b53e79b1f280fd12ea0d9233fc875e0b57
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/2056
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.huber@secunet.com>
2012-12-19 15:19:24 +01:00
Dave Frodin 5056b6e612 libpayload: Check if serial console h/w is present before using
The serial_io_havechar() and serial_io_getchar() functions will
always see keystrokes available if the serial hardware isn't
actually there. We will still output chars to non-existant
hardware to allow virtual hardware to capture them.

Change-Id: I04e85157b6b7a185448abab352b5417a798a397a
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/2040
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-12-18 19:59:59 +01:00
Dave Frodin 6bf11cf50c libpayload: Use usb_debug() to show USB messages
Previously printf()'s were used to show USB messages
which results in lots of USB information being shown
when it isn't needed. This will now use the usb_debug()
printing funtion that already exists in usb.h.

Change-Id: I2199814de3327417417eb2e26a660f4a5557cb9f
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/2044
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-12-18 19:59:22 +01:00
Dave Frodin 8024b65550 libpayload: Update configs/defconfig file
Several settings have been added to the config without any
changes to the default settings file.

Change-Id: Iaf9259d77fb3c4645fc68bc0108de79c0298f0a1
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/2039
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-12-18 15:05:36 +01:00
Stefan Reinauer 9f04317263 libpayload: add kconfig.h
This implements the linux kernel's macros to handle
boolean CONFIG_ variables more easily.

Change-Id: I595f9db652d019fe72e231111258ec609bec9d4e
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2036
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-14 23:59:05 +01:00
Stefan Reinauer 8af0d03fd4 libpayload: Initial ARMv7 port
This compiles, but it's not tested yet.

Change-Id: I2f73a814649aa36c39af3e77cefd8a968671f5c0
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2035
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-14 22:29:48 +01:00
Stefan Reinauer f6935a006a libpayload: rename i386 to x86
Change-Id: Ia9170bd3d04e76dbf9321ca7ea4be23b5e468d21
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2033
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-14 22:29:17 +01:00
Marc Jones 9915b37f10 coreinfo: Build libpayload from coreinfo makefile
Build libpayload and install it in the coreinfo directory.
Allows coreinfo to be built with a single make command.

Change-Id: I56982265555aae16e482b0a0040989c1f5317423
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/1995
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-12-13 10:37:28 +01:00
Dave Frodin 0b97f2978f libpayload: increase the default heap size
Coreinfo uses the default heap size and will blow up
if the USB keyboard is used.

Change-Id: I2ffae330ec34167b2ccfbd4c428e3e8306230f44
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/1980
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-12-13 08:26:12 +01:00
Dave Frodin 15a2c8f827 coreinfo: changes to get the USB keyboard working
A call to usb_initialize() was needed. Also needed to set several
curses flags. One to prevent keystrokes echoing to the display,
and one to allow extended keystrokes (like the KEY_F(n)) to be
seen when calling getch();

Change-Id: I495b42055a54603e4efb92b2845051434d88432d
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/1983
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-12-12 22:35:19 +01:00
Nico Huber 593f577ffa libpayload: Fix use of virtual pointers in sysinfo
In I4c456f5, I falsely identified struct cb_string.string as a pointer
which it is not. So we don't need phys_to_virt() here.

Change-Id: I3e2b6226ae2b0672dfc6e0fa4f6990e14e1b7089
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1987
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-12-10 16:45:24 +01:00
Nico Huber c95f2f5615 libpayload: Fix renaming of REG_CLASS_DEV to REG_SUBCLASS
REG_CLASS_DEV was renamed to REG_SUBCLASS.

Change-Id: I4af476b953b544f680337d815889564f016563eb
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1986
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-12-10 16:45:00 +01:00
Marc Jones 5d01b765e3 coreinfo: Make better calls to libpayload build scripts
Set LPGCC and LPAS so that CC and AS are maintained.
Clean up the makefile order to check for .config to be easier to
read.
Use objcopy instead of strip and keep the debug symbols file.

Change-Id: I95d6b7a0e3a99a142d3fd6e2ecc61de1d4412402
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/1994
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-08 06:57:31 +01:00
Marc Jones bb9490a4b0 Clean up libpayload lpgcc and lpas scripts.
lpgcc and lpas are called by payload Makefiles to properly
build and link with libpayload.

Made lpas use the proper crosscompile AS, as lpgcc does with CC.
Added V=1 support to help users debug the build.
Fix basename $CC and $AS expansion.

Change-Id: Ia4dc8ba53ba7565521a79f1520155f3307b09f85
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/1993
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-08 06:56:34 +01:00
Dave Frodin 1b0c352675 coreinfo: change the foreground/background colors
The default curses library changed from tinycurses to
PDCurses. PDCurses fails to fill the entire active screen with
the assigned background colors when it writes 'blank' chars.
This will allow the menues to look better until I resolve that.

Change-Id: I70b5331d16dd0abaa1f0b02b725571844b7ac15e
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/1984
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-12-07 20:43:13 +01:00
Dave Frodin 0a90861ff2 libpayload: Don't let USB/PC/serial keyboards overwrite each other
Change-Id: I75c0066cf737e0cecac056487215622e2b3d4467
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/1981
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-12-07 20:41:46 +01:00
David Hendricks 4b6be985aa Change TARGET_I386 to ARCH_X86
This renames TARGET_I386 to ARCH_X86 to make it more uniform with
other parts of the codebase, e.g. cbfs_core.h from cbfstool.

Change-Id: I1babcc941245ed1dde0478a21828766759373a42
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/1961
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
2012-11-30 23:20:54 +01:00
David Hendricks 0a92f89f5d fix #if for target architecture in libpayload
This bug was introduced when we copied cbfs_core.h from cbfsutil
to libpayload.

Change-Id: I9b5d00d0dbdb969644ce46ad6ac2a84b366b5cd7
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/1958
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Tested-by: build bot (Jenkins)
2012-11-30 22:50:53 +01:00
Nico Huber 3665ace13d libpayload: Remove unused FLAG_USED from memory allocator
The FLAG_USED bit in the memory allocator's header type was never
read. This removes it to save one bit for the region size so we can
have heaps of up to 32MiB.

Change-Id: Ibd78e67d79e872d6df426516667c795fd52326d5
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1942
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-30 06:05:56 +01:00
Nico Huber 0227dec291 libpayload: Fix lookup by label in CMOS layouts
The condition to compare the labels was twisted.

Change-Id: I34a665aa87e2ff0480eda0f249bbbea8a8fe68d8
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1941
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-30 06:05:50 +01:00
David Hendricks 90ca3b6bd7 Add multi-architecture support to cbfstool
This is an initial re-factoring of CBFS code to enable multiple
architectures. To achieve a clean solution, an additional field
describing the architecture has to be added to the master header.
Hence we also increase the version number in the master header.

Change-Id: Icda681673221f8c27efbc46f16c2c5682b16a265
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/1944
Tested-by: build bot (Jenkins)
2012-11-30 00:42:31 +01:00
Patrick Georgi 28b900afbd libpayload: Add _ and + to USB HID keymap
Slightly more complete keymap

Change-Id: I4fef6b8f75ab07cb20a3a8ccd7eaad81c9fe719f
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1922
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-27 18:29:31 +01:00
Nico Huber 0c2364c17c libpayload: Fix interrupt-queue cleanup for OHCI
We have to free TDs more carefully if they have been processed by the
controller yet. The current code tries to force the controller to post
them back to the done queue, but that seems wrong. We can't be sure,
when they get written back. This resulted in leaking TDs with an invalid
reference to a freed interrupt queue.

The new approach: Mark the interrupt queue to be destroyed and handle
the freeing later, when the controller posted the last TD to the done
queue.

Change-Id: I79d80a9dc89e1ca79dc125c4bbccbf23664227b3
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1905
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-24 08:54:04 +01:00
Nico Huber b9917c2068 libpayload: Rework connection state detection for OHCI
The connection state detection in the OHCI root hub driver was broken if
you used more than one device per root hub.

Change-Id: Ica5c735426beac45ef6f591ce68a72d8283a00f5
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1904
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-24 08:46:34 +01:00
Nico Huber be58fee28e libpayload: Handle errors in UHCI interrupt queues
If somethings goes wrong during an interrupt transfer, drop the
transfer.

Change-Id: I450c08a7a0bf23fbee74237e0355d4a726ace114
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1901
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-24 08:44:01 +01:00
Nico Huber 8c4d2f36a3 libpayload: Handle underruns in UHCI interrupt queues
If usb_poll() isn't called fast enough, the UHCI controller marks an
underrun interrupt queue as done (terminating the queue at the head).
We can recover from this situation, when usb_poll() gets called again,
and the queue is processed.

Change-Id: Id56c9df44d6dbd53cd30ad89dfb5bf5977799829
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1898
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-24 08:43:49 +01:00
Nico Huber ce407e470d libpayload: Implement correct interrupt-queue linking for UHCI
The linking of interrupt queues into UHCI controller's framelist (in
uhci_create_intr_queue()) was incomplete. The implementation of
uhci_destroy_intr_queue() was even worse, looking like it wanted to
clean up more than uhci_create_intr_queue() did.

This patch follows the simple approach that we used for OHCI and EHCI:
Each slot in the framelist holds only one interrupt queue. Therefore, we
have to look for free slots each time we want to link an interrupt queue
into the framelist. In return, we have a much simpler structured
framelist.

With this, USB devices using interrupt transfers (e.g. keyboards) can be
detached cleanly from UHCI controllers. Also, more than one of such
devices can be attached without further risk.

Change-Id: I07b81a3b6f2cb3ff69515c973b3ae6321ad969aa
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1897
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-24 08:43:21 +01:00
Nico Huber cd587f110b libpayload: Make USB HID support multiple keyboards
The USB HID driver had some static variables with keyboard state. This
moves them to the driver's instance, so multiple attached keyboards
don't effect each other.

Change-Id: I3f1ccfdea95062b443cebe510abf2f72fdeb1916
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1907
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-23 18:19:06 +01:00
Nico Huber af169f4dd5 libpayload: ehci: Prevent some race conditions
Prevent race conditions, when an interrupt-queue underrun occurred and
the controller is currently working on our queue head or a transfer is
still in progress.

Change-Id: Ia14f80a08071306ee5d1349780be081bfacb206a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1902
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-23 18:18:59 +01:00
Nico Huber b2db28babe libpayload: Detach devices behind removed USB hubs
When a USB hub got removed, we should also remove all devices that
were attached to it.

Change-Id: I73c0da1b7570f1af9726925ca222781b3d752557
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1903
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-23 18:18:31 +01:00
Nico Huber ef88e102bb libpayload: More compliant error recovery in USB MSC
If an endpoint gets stalled by an MSC device, after successful
transmission of a command (CBW), we should still ask for the status
(CSW). Otherwise, the driver and the device get desynchronized on the
command tags.

Change-Id: I53167f22c43b3a237cb4539b3affe37799378b93
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1900
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-23 18:18:14 +01:00
Nico Huber 86c686a76e libpayload: Reduce error output from EHCI
Stalled transfers are not fatal, so don't spew on the console on every
tiny failure.

Change-Id: I175c1e83a6af09c1abbd43d045ed6dbf0c79f871
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1899
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-23 18:18:02 +01:00
Nico Huber e8a71d34cd libpayload: Fix random warnings
dump_td() is orphaned but looks useful => commented out.

The delay identifier shadowed the global one => renamed to total_delay.

Change-Id: I4f3766a07db9194b2552ebf9302bd7ef8a66371f
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1895
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-23 18:17:37 +01:00
Nico Huber 4f83d1b0c6 libpayload: ehci: Fix warnings about discarded volatile
We can trust free() and memset() to work correctly on volatile
references, so cast volatile pointers to (void *) when calling them.

Change-Id: Ieff7f78133b72f303349cca0a0ca3bbf37ec52bb
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1896
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-23 18:17:31 +01:00
Nico Huber ba22e4c3fd libpayload: Fix some missing-prototype warnings
usb_controller_initialize() is not declared in any header file nor
called from outside of usbinit.c, so make it static.

set_configuration() looks like beeing non-static on purpose (like the
other helpers around it in usb.c), so put a prototype into usb.h.

Change-Id: I08d93b3769d8398bb43462d9afdfeec81fef93ec
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1894
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-23 18:17:24 +01:00
Nico Huber 7a32e88f12 libpayload: Fix memalign() for fragmented alignment regions
Found a bug in the memory allocator ;-)

If the total free space in an alignment region is large enough for an
allocation but fragmented, such that there is no contiguous, sufficient
large, free space in the region, memalign() was looking at the same
region again and again in an endless loop. The advancing to the next
region was just missing.

Change-Id: I3fad833804675ee495577ca2749b007f46b5ff69
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1906
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-23 18:17:08 +01:00
Patrick Georgi 4b62ebe961 Add nvramcui
nvramcui is a small libpayload based utility that provides
an interactive CMOS editor for pre-boot environments.

Change-Id: I514b8a7682f89d242d1b31b6907cc6bff34da4bf
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1871
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-19 19:10:24 +01:00
Nico Huber 425973cf42 libpayload: Always use virtual pointers in struct sysinfo_t
We had mixed virtual and physical pointers in struct sysinfo_t. Some
being virtual by accident which led to problems when we tried to
reinitialize lib_sysinfo after relocating FILO (to get intentionally
virtual pointers valid again). I guess this didn't cause much trouble
before, as lib_get_sysinfo() was always called with physical addresses
being equal to their virtual counterparts.

For FILO, two possibilities seem practical: Either, have all pointers in
struct sysinfo_t physical, so relocation doesn't hurt. Or, have all
pointers virtual and call lib_get_sysinfo() again after relocation.

This patch goes the latter way, changing the following pointers for
situations where virtual pointers differ from physical:
  .extra_version
  .build
  .compile_time
  .compile_by
  .compile_host
  .compile_domain
  .compiler
  .linker
  .assembler
  .cb_version
  .vdat_addr
  .tstamp_table
  .cbmem_cons
  .mrc_cache
We could also just correct the accidentally virtual pointers. But, IMO,
this would lower the risk of future confusion.

Note 1: Looks like .version gets never set.

Note 2: .option_table and .framebuffer were virtual pointers but treated
        like physical ones. Even in FILO, this led to no problems as
        they were set before relocation.

Change-Id: I4c456f56f049d9f8fc40e62520b1d8ec3dad48f8
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1855
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-15 18:51:37 +01:00
Nico Huber dd5979ab43 libpayload: Use #ifdef for CONFIG_* checks
Libpayload uses the linux kernel's config style, where CONFIG_* defines
don't get written for unset tristates.

Change-Id: I3f832cf86bca9a1e153d96af4bf6434a19eba2f6
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1847
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-15 18:51:17 +01:00
Nico Huber 6e711c6a97 libpayload: Add init() function to hci_t and rework uhci_reset()
uhci_reset() differs in semantics compared to the other HCI's reset()
implementations. uhci_reset() does some initialization work after a
controller reset. So move the initialization part to a new function,
uhci_reinit(), which get's exported through a new entry in hci_t:
hci_t.init().

Warning: This breaks code that relies on the current, special,
counterintuitive behaviour of uhci_reset(). If one wants a working host
controller after calling hci_t.reset(), he should call hci_t.init()
afterwards.

Change-Id: Ia7ce80865d12d11157645ce251f77f349f8e3c34
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1851
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-14 17:45:16 +01:00
Nico Huber aaa212d17d libpayload: Do not call ohci_reset() from ohci_init()
When ohci_reset() was implemented, OHCI controllers stopped working
since the stub ohci_reset() is called at the end of ohci_init().
This is fixed by removing the call. To prevent further problems the call
to the xhci_reset() stub is removed, too.

Change-Id: If89825c8e6caf40f7f4fe078e8b2e90054a54ba2
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1850
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-14 17:44:36 +01:00
Nico Huber d633dda995 libpayload: Free usb host controller instance after shutdown
All shutdown() implementations but ehci_shutdown() free the hci_t
structure. This seems correct and the reference to the hci_t shouldn't
be used after shutdown(), so do it in ehci_shutdown(), too.

Change-Id: Ie3506d769e73007735f3211710734a5f0107e43a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1849
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-14 17:44:15 +01:00
Nico Huber a482701451 libpayload: Document USB host controller setup functions
The semantics of the controller functions, start(), stop(), reset() and
shutdown(), are not self-explanatory which let to some confusion. At
least the reset() functions of the different host controller drivers
were implemented following different interpretations. Let's make the
intended behaviour of these functions clear.

The stated inconsistencies will be addressed in following commits.

Change-Id: Id2e300f65c21039218b6ba3f87c0fcd4f0dda0a8
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1848
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-14 17:43:36 +01:00
Patrick Georgi 45b94bc15f libpayload: Export device count in storage interface
FILO can use this as offset to enumerate AHCI and its own IDE
devices together.

Change-Id: I57380e7bd1df6db5c882427e9a34d068f4348fb2
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1846
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-14 17:39:03 +01:00
Gabe Black cd986c049c libpayload: Use EXTRA_CFLAGS for additional GCC options
-CFLAGS = $(INCLUDES) -O2 -pipe -g
+CFLAGS = $(EXTRA_CFLAGS) $(INCLUDES) -Os -pipe

Change-Id: Icb228d173312a974746e72b6bbae059103b837fc
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1723
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-12 19:14:58 +01:00
Gabe Black 4bb0731a7b libpayload: Add an option to skip console initialization on startup.
A payload may want to decide whether it uses certain input/output consoles,
or that it wants support for outputing to a particular device but not to use
that device as a console. This change adds a config option which skips the
call to console_init in start_main.

Change-Id: I32b224d4d0bd3a239b402ecb09ee907d53225735
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1732
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-11-09 22:55:38 +01:00
Gabe Black d94512edee libpayload: Add CB_ prefixes to some constants in coreboot_tables.h.
This makes their names more consistent with other constants in this header,
avoids name collisions, and makes it more obvious where the names came from.

Change-Id: I7b8bd4ada0fbaf049f35759a907281265f5bb2e6
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1729
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-11-09 22:54:04 +01:00
Gabe Black 025667f0ec libpayload: Change "GPIOs" into flags.
Some constants which were used to interpret the contents of the coreboot
tables were moved to the appropriate libpayload header file. The constant which
describes the maximum length of a GPIO name was renamed to have a CB_ prefix.
That makes it more obvious what sort of GPIO name it describes, and reduces the
change of a name collision. It also makes it more consistent with other names
in that header, although some other exceptions still exist.

Change-Id: I6c0082b3198d34e8a78507fbfac343ee8facf0dc
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1728
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-11-09 22:53:19 +01:00
Anton Kochkov 2fef58eaba [PATCH] libpayload: Implement EHCI reset function
Added ehci_reset() function to do a full reset of
the host controller

Change-Id: Ia48db8462ebbb8f260813eb6ba8349d002c4678b
Signed-off-by: Anton Kochkov <a.kochkov@securitycode.ru>
Reviewed-on: http://review.coreboot.org/1814
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-09 20:10:05 +01:00
Gabe Black 8e7d7fd4bf libpayload: Add a function to retrieve the rows and cols of the video console.
This is useful if you need to put some text in a particular place on the
screen, for instance in the middle.

Change-Id: I3dae6b62ca1917c5020ffa3e8115ea7e8e5c0643
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1734
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-09 19:02:26 +01:00
Gabe Black dd9e4e58cd libpayload: Separate video initialization and the video console.
It's possible to want to display text on the display without using it as a
console. This change separates the initialization of the video code from
setting up the video console by pulling out everything but installing the
console into a new function called video_init.

Change-Id: Ie07654ca13f79489c0e9b3a4998b96f598ab8513
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1733
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-09 19:02:11 +01:00
Gabe Black a54b6a6143 libpayload: Add support for the CBMEM in memory console.
Change-Id: I1489b5306ef1ca078686fed4dba2d242f70ad941
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1727
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-09 19:01:15 +01:00
Gabe Black 0af03d24f8 Refactor the endianness conversion functions and header files.
The endianness of an architecture is now set up automatically using Kconfig
and some common code. The available conversion functions were also expanded
to go to or from a particular endianness. Those use the abbreviation le or be
for little or big endian.

Built for Stumpy and saw coreinfo cbfs support work which uses network
byte order. Used the functions which convert to little endian to implement an
AHCI driver. The source arch is also little endian, so they were effectively
(and successfully) inert.

Change-Id: I3a2d2403855b3e0e93fa34f45e8e542b3e5afeac
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1719
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-08 19:49:51 +01:00
Gabe Black d3890cc16d Update libpayloads understanding of the coreboot tables.
Give it somewhere to put the new info in sysinfo, and tell it how to parse
the new tables which it doesn't yet understand.

Change-Id: I01d3318138696e6407553c27c1814f79e3fbc4f8
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1718
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-08 19:49:46 +01:00
Gabe Black 93ded5905c libpayload: Turn the "debug" #define into the usb_debug static inline function.
The "debug" macro used internally in the libpayload USB subsystem was very
generically named and would leak into consumers of the library that included
usb.h directly or indirectly. This change turns that #define from a macro into
a static inline function to move away from the preprocessor, and also renames
it to usb_debug so it's less likely to collide with something unrelated.

Change-Id: I18717df111aa9671495f8a2a5bdb2c6311fa7acf
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1738
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-07 18:38:37 +01:00
Gabe Black 8670b9b81a libpayload: Take usb_poll out of usb_initialize.
While it might be slightly more convenient to not have to call usb_poll
manually after calling usb_initialize, you'll still likely want to call it
before trying to use a USB device since one have have been hotplugged since
you last looked. By not calling usb_poll, usb_initialize completes quickly and
can be called unconditionally without a long delay. The delay can be put off
until later when we're sure it's necessary.

Change-Id: Ib8b1bdea996702c42d1b7021f492d9f8e174d304
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1737
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-07 18:38:31 +01:00
Gabe Black 1b33c31cf3 libpayload: Make usb_initialize more efficient and fix style problems.
The usb_initialize function would scan for USB host controllers by brute force
iterating over all possible busses, devices, and functions. This change makes
it recursively scan busses only if it finds them on the other side of a bridge,
and only scan for functions beyond function 0 if the device claims to be
multifunction.

This change also takes the opportunity to clean up some style problems
throughout the file.

Change-Id: I0f5e8b9a454a42a76d30bccca898c8e1af770b2b
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1736
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-07 18:38:15 +01:00
Gabe Black 78e15a31f2 libpayload: Add definitions for more config space registers.
Change-Id: I02cf353ce7c955cb11ca11c0d5b8aa630cf15fdb
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1735
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-07 18:36:27 +01:00
Gabe Black e88e1ab864 libpayload: Add the format attribute to functions in stdio.h.
gcc recognizes the format function attribute which tells the compiler to expect
the format string to look a certain way and for its arguments to be of
appropriate types. This helps to prevent errors like the one that was recently
fixed in libpayload's assert.

Change-Id: I284ae8bff32f72cfd2d1a250d126c729b38a5730
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1731
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-07 18:36:14 +01:00
Gabe Black 5c27e82073 libpayload: Fix the format string of the assert macro.
The assert macro in libpayload was using a format string which printed the
line number with %s. The line number came from the __LINE__ predefined macro
which resolves to an integer constant.

Change-Id: I0e00d42a1569802137cf440af3061d7f397fdd27
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1730
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-07 18:36:05 +01:00
Gabe Black 3b84086e3d libpayload: Add faster, architecture specific versions of memset and memcpy.
Change-Id: I0f3a82de860fd3afa10a557b37fb90fe6b06ae90
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1726
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-07 18:31:15 +01:00
Gabe Black c324794cb0 libpayload: Make the symbols in memory.c weak so they can be overridden.
The implementations for various stdlib functions in libc/memory.c are very
generic and should work under just about any circumstances. They are
unfortunately also very slow. This change makes them weak symbols so that
faster versions can be defined on a per architecture basis which will
automatically take the place of the slow versions.

Change-Id: Ia1ac90d9dcd45962b2a15f61ecc74b0a4676048d
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1725
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-07 18:30:56 +01:00
Gabe Black 5ab20054d3 Update the way serial info is read from the coreboot tables.
This information is now stored in a structure instead of in a few seperate
fields. libpayload hadn't been updated to reflect the new layout or to consume
the new information intelligently.

Change-Id: Ice3486ffcdcdbe1f16f9c84515120c591d8dc882
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1724
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-07 18:30:40 +01:00
Gabe Black 54c800a50c Move the definition of ipchksum into its own header file.
Change-Id: Ifb7c18f9ca566bd50ca138ffd8af951375089537
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1722
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-07 18:30:21 +01:00
Gabe Black b9edbbd7bf Discard .note sections when linking.
These end up being loaded at 0 otherwise and overwrite some coreboot tables.

Built and booted on Stumpy. Saw that the coreboot tables were no longer
overwritten.

Change-Id: Ia9f521d976d0ad544a8205323ae0ddfa8d253d29
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1721
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-07 18:30:11 +01:00
Gabe Black accc6a5e04 Include stdint.h in libpayload's rdtsc.h.
This file uses uint*_t types but hadn't included stdint.h itself.

Change-Id: Ib883f62951bae1ece5134c6bd0f4799a80740e8e
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1720
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-11-07 18:30:04 +01:00
Nico Huber 1f6bd94fa8 libpayload: New AHCI, ATA and ATAPI drivers
This adds a new interface for storage devices. A driver for ATA and
ATAPI drives on AHCI host controllers comes along.

The interface is very simple and was designed to match FILO's needs.
It consists of three functions:

  void storage_initialize(void);
  Initializes controllers. Should be called once at startup.

  storage_poll_t storage_probe(size_t dev_num);
     with typedef enum {
            POLL_NO_DEVICE      = -2,
            POLL_ERROR          = -1,
            POLL_NO_MEDIUM      =  0,
            POLL_MEDIUM_PRESENT =  1,
          } storage_poll_t;
  Looks for a drive with number dev_num (drives are counted from
  zero) and polls for a medium in the drive if appropriate.

  int storage_read_blocks512(size_t dev_num,
                             u64 start, size_t count,
                             unsigned char *buf);
  Reads count blocks of 512 bytes from block start of drive dev_num
  into buf.

Change-Id: I1c85796b7f8e379ff3817a61b1837636b57e182b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1622
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-27 02:52:58 +02:00
Peter Stuge 9b48ef2733 Update SeaBIOS stable to the release-1.7.1 commit
Change-Id: I0dffe89c31e45914f795d9ad8efb787b5fdbb7a8
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://review.coreboot.org/1583
Tested-by: build bot (Jenkins)
2012-10-16 03:31:05 +02:00
Patrick Georgi d357e62836 libpayload: CMOS access was implemented in a backward way
Instead of having the highlevel functions make use of the lowlevel
functions, it implemented the lowlevel stuff in terms of highlevel.

Change-Id: I530bfe3cbc6f57a6294d86fbf1739e06467a2318
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1539
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-10-14 20:12:11 +02:00
Stefan Tauner ec2c18ee60 Increment revision of SeaBIOS to remove bashism
This enables building with dash again(?) by using exactly one patch of
SeaBIOS more/newer than previously, which has also the sole purpose of
removing bashism and is a single line change. *sigh*

Change-Id: Ib036894d8b9886f74d6eb0853f1fc0ce1aa39d54
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: http://review.coreboot.org/1568
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: build bot (Jenkins)
2012-10-08 13:24:39 +02:00
Anton Kochkov 93a8b27cbe libpayload: Set 8bits per char for serial port
Previously we assume that hardware using 8 bits
per char by default, but on Asrock A53 Pro
this is not true (7 bit per char by default).
Forcing use 8n1 now.

Change-Id: Ib701725d2ec6dacd7862016b2045270956b27029
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1541
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-10-03 09:27:20 +02:00
Patrick Georgi d2cb7ea1ff libpayload: UHCI driver contained too much magic
The handling of finalize in uhci_bulk was confusing, and so its
behaviour changed.
If set, the driver is supposed to add a trailing empty packet iff
the last packet is of maximum packet size. This helps the device to
decide if the transfer is completed simply by waiting for a packet
that isn't full length.

Change-Id: I162e8c1e034924d0de6fdcb971c94cf3a5ea31eb
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1555
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-10-03 09:25:25 +02:00
Anton Kochkov efcb8de12e libpayload: fix for UHCI bulk transactions
Fixed masking to run QH shedule.
Fixed final zero filled TD generation for
UHCI bulk transaction.

Change-Id: I9c6ea34d132368922f2eeeaa7aadbbb6aac3e2b8
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1553
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-01 22:57:01 +02:00
Patrick Georgi f78c7007c2 libpayload: fix fetching integers from CMOS as string
%ull -> %llu

Change-Id: I330f681d713be7eb444870f81330cf6e9869a4fa
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1542
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-09-28 14:49:33 +02:00
Patrick Georgi 82867d3ed0 libpayload: Don't leave temporary files behind
For some reason the rm -f didn't quite work on my system,
but sending gcc output to /dev/null does.

Change-Id: I7ece9aa9abe564bbc646ae53df1d3cd0c5aa84a2
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1543
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-09-28 13:43:31 +02:00
Patrick Georgi 08ed5a8697 libpayload: Extend CMOS access library
libpayload already contained a number of functions for convenient
access to CMOS configuration. Add functions to support iteration
over available enum fields.

Change-Id: If95f45d7223d2e19c42f1d8680c12d23f6890a01
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1538
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-09-26 20:51:32 +02:00
Anton Kochkov 1d66897364 Fix disconnect handling on UHCI root ports
Change-Id: I03b72cd1c6ed0df09c08f2a687d4f17fa3cf6afc
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1531
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-09-21 23:47:05 +02:00
Anton Kochkov f6c808090a UHCI: use proper pointer size
We used sizeof(listp*) at a place where sizeof(listp) is more appropriate:
While these are pointers, they're part of the UHCI design, and don't depend
on ISA details.

Change-Id: I4d3cb571c9a407103bc81fc171a8e73b68f7c7a1
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1530
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-09-21 23:46:23 +02:00
Anton Kochkov 1c36eada27 libpayload: add controller type in usbdev_hc
Add controller type (UHCI, OHCI, EHCI or XHCI)
into usbdev_hc (hci_t) struct, so now we know
which type selected controller have. It needed
to access controller specific data, if access
usb tree outside of libpayload (e.g. in payload
intself)

Change-Id: I7df947bbb56a50d0d792ccd4d3a6b021ee95e2ea
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1145
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-08-23 07:05:02 +02:00
Alexandru Gagniuc 811d661f3a coreinfo: fix build error (TRIVIAL)
Changes to libpayload, and lack of maintenance to coreinfo, and it no
longer builds. Fix that.

Change-Id: I03497880671f42b5aeb6db08ddf6ce2acd243a18
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/1453
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-08-15 14:06:07 +02:00
Patrick Georgi 19e99f5cf1 libpayload: Fix typo
Change-Id: I8708703e497053aa1251f06402bd8ea59bd9d24e
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1370
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-07-27 11:09:19 +02:00
Anton Kochkov db2c400ab8 libpayload: Add reset function for OHCI USB driver
Implemented OHCI reset function ohci_reset() in ohci.c
for libpayload's USB driver.

Change-Id: Id6518cbe00a21202757b34926bad171909740e97
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1177
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-07-12 10:00:17 +02:00
Anton Kochkov ac6e3172ff libpayload: OHCI driver correct PCI BAR reading
Correct registers base (PCI BAR) reading to be
more specification friendly. Registers base
only in [31-12] bits, all other proposed to be 0
but that not true for some motherboards. So
adding mask to use only valid bits.

Change-Id: I2e9a4997e016dab812ccfe654e966bc91d42a625
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1143
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-06-29 22:13:57 +02:00
Anton Kochkov 8fef662505 libpayload: use correct types in UHCI driver
As we using 16-bit reading and writing in UHCI drive,
so all variables related to that must be 16-bit too.

Change-Id: Ib1abb03d054c167512e21f24f3c3da688c7fd01f
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1144
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-06-29 22:12:25 +02:00
Nico Huber df28d9fe17 libpayload: Adjust timeouts and delays in OHCI driver
This sets the timeout for control and bulk transfers to 2s per
transfer descriptor (like we set it in the EHCI driver). It also adds
delays around the disabling of control and bulk list access to
overcome some race conditions.

Change-Id: Ia2d1db890fca51c7d9477de163d55030e0c5a04a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1127
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-06-22 18:20:21 +02:00
Nico Huber d8a6680073 libpayload: Add check for failure in usb_attach_device()
This adds a simple check if a device is really configured before
returning it's address to the usb hub driver who wants to attach it.

Change-Id: I6fea140217c3e7468cc48ef7c3cbf2be8d11f47a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1131
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-06-22 08:55:50 +02:00
Nico Huber 445a3a04d8 libpayload: Shutdown reasonably if we can't init usb msc device
This lets the init of usb mass storage return if the device
configuration is unusable. Also add some checks for proper shutdown so
we don't free/remove an uninitialized device.

Change-Id: I6daf9b38e632b6e381bcd5a7717f0f1a3150b64a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1130
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-06-22 08:55:22 +02:00