coreboot-kgpe-d16/src/soc/intel/tigerlake
Pratik Prajapati 05ea79cf53 soc/intel/tigerlake: Set TME upd param based on config
Set TmeEnable FSP-M upd based on config.

TEST: TME ENABLE and LOCK bits get set when Tme is enabled.

Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Change-Id: Ia804c88057e17844f055fd852fc0b36cfe316432
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45486
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
2020-09-30 10:16:05 +00:00
..
acpi soc/intel/common/block/acpi: Factor out common gpio_op.asl 2020-09-27 03:03:06 +00:00
bootblock soc/intel/tigerlake: Rename pch_init() code 2020-08-26 07:36:21 +00:00
include/soc soc/intel/tigerlake: Remove extra '_' from GPIO PIN name 2020-09-25 14:35:54 +00:00
romstage soc/intel/tigerlake: Set TME upd param based on config 2020-09-30 10:16:05 +00:00
spd util: Add new memory part for zork boards 2020-09-28 06:11:54 +00:00
acpi.c soc/intel/tigerlake: Simplify is-device-enabled checks 2020-07-28 08:36:59 +00:00
chip.c soc/intel/common/block/lpc: add acpi name 2020-09-28 09:38:39 +00:00
chip.h soc/intel/tigerlake: Configure FSP UPDs for minimum assertion widths 2020-09-23 16:24:42 +00:00
cpu.c soc/intel/{icl.tgl,jsl}: Remove SMRAM register programming 2020-08-09 11:03:37 +00:00
elog.c elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE 2020-08-18 15:57:40 +00:00
espi.c soc/intel: Drop unused #include <reg_script.h> 2020-07-06 19:29:07 +00:00
finalize.c soc/intel/tigerlake: Disable Thunderbolt PCIe root ports bus master 2020-07-07 17:29:56 +00:00
fsp_params.c soc/intel/tigerlake: Add support for CnviBtCore and CnviBtAudioOffload 2020-09-24 18:48:44 +00:00
gpio.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
gspi.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
i2c.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
Kconfig arch/x86: Introduce ARCH_ALL_STAGES_X86_32 2020-09-26 11:42:28 +00:00
lockdown.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
Makefile.inc soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code 2020-05-27 21:35:43 +00:00
me.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
meminit.c soc/intel/tigerlake: add common routine for DDR init 2020-08-06 17:42:20 +00:00
p2sb.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
pmc.c drivers/intel/pmx_mux: Remove redundant declaration 2020-07-03 08:28:20 +00:00
pmutil.c src/soc/intel: Drop unneeded empty lines 2020-09-21 16:15:25 +00:00
reset.c Revert "soc/intel: Refactor do_global_reset() function" 2020-09-22 05:13:39 +00:00
smihandler.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
smmrelocate.c soc/intel/tigerlake: Add SMRR Locking support 2020-09-08 05:25:34 +00:00
soundwire.c soc/intel/tigerlake: Provide SoundWire controller properties 2020-05-22 01:48:39 +00:00
spi.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
systemagent.c soc/intel/tigerlake: Set power limits for Tiger Lake Y-SKU 2020-07-25 00:07:36 +00:00
uart.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00