Martin Roth 15f232df08 chromeec platforms: Update ACPI thermal event handler call ... Currently the thermal event handler method TEVT is defined as an extern, then defined again in platforms with thermal event handling. In newer versions of IASL, this generates an error, as the method is defined in two places. Simply removing the extern causes the call to it to fail on platforms where it isn't actually defined, so add a preprocessor define where it's implemented, and only call the method on those platforms. Change-Id: I64dcd2918d14f75ad3c356b321250bfa9d92c8a5 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/25916 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2018-05-01 15:54:55 +00:00
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acpi	chromeec platforms: Update ACPI thermal event handler call	2018-05-01 15:54:55 +00:00
bootblock	soc/intel: Add KBL-S MCH and some KBL PCH support	2018-03-26 10:21:40 +00:00
include	soc/intel/skylake: Generate ACPI DMAR table	2018-04-05 15:53:20 +00:00
nhlt	soc/intel/skylake: Add NHLT config for max98373 codec	2018-03-27 19:55:48 +00:00
romstage	compiler.h: add __weak macro	2018-04-24 14:37:59 +00:00
acpi.c	compiler.h: add __weak macro	2018-04-24 14:37:59 +00:00
chip.c	soc/intel/skylake: Limit xDCI feature when VBOOT is enabled	2018-03-28 22:52:38 +00:00
chip.h	soc/intel/skylake: Enable VT-d and X2APIC	2018-04-05 15:52:45 +00:00
chip_fsp20.c	compiler.h: add __weak macro	2018-04-24 14:37:59 +00:00
cpu.c	soc/intel/skylake: enable VMX support	2018-03-28 06:42:34 +00:00
elog.c	soc/intel/skylake: Probe XHCI for wake source for Internal PME	2017-10-19 00:43:45 +00:00
finalize.c	soc/intel/skylake: Set low maximum temperature threshold for Thermal Device	2017-11-30 16:27:12 +00:00
gpio.c	soc/intel/common/block/gpio: Change group offset calculation	2018-02-16 03:59:29 +00:00
graphics.c	soc/intel/skylake: Hook up libgfxinit	2018-04-16 08:37:09 +00:00
gspi.c	soc/intel/{cannonlake,skylake}: Add _soc_ prefix in spi soc routine	2017-11-11 18:19:31 +00:00
i2c.c	drivers/i2c/designware: reduce API complication for bus config	2018-01-25 22:36:30 +00:00
irq.c	src/soc: Fix various typos	2018-02-20 23:17:39 +00:00
Kconfig	soc/intel/common: prepare for lpss clock split	2018-04-10 18:07:54 +00:00
lockdown.c	soc/intel/skylake: Enable common LPC IP	2017-10-03 20:23:21 +00:00
lpc.c	soc/intel/skylake: Move PCR DMI programming into bootblock	2018-03-09 21:40:32 +00:00
Makefile.inc	soc/intel/skylake: Make use of common SMM code for SKL	2017-12-22 01:44:18 +00:00
me.c	soc/intel/skylake: Protect me_progress_rom_values array boundary	2018-03-30 06:43:12 +00:00
memmap.c	soc/intel: Remove superfluous pointers variables	2018-04-11 02:19:43 +00:00
pei_data.c	soc/intel/skylake: Make use of common SMM code for SKL	2017-12-22 01:44:18 +00:00
pmc.c	pci: Move inline PCI functions to pci_ops.h	2018-04-20 13:03:54 +00:00
pmutil.c	security/vboot: Move vboot2 to security kconfig section	2017-10-22 02:14:46 +00:00
reset.c	soc/intel/skylake: Add support in SKL for PMC common code	2017-10-05 21:11:39 +00:00
sd.c	soc/intel/skylake: Use SCS common code	2017-06-16 17:37:13 +02:00
smihandler.c	soc/intel/{apollolake, cannonlake, common, skylake}: Add _soc_ prefix in weak function	2017-12-23 05:23:09 +00:00
smmrelocate.c	soc/intel/skylake: Make use of common SMM code for SKL	2017-12-22 01:44:18 +00:00
spi.c	soc/intel/skylake: Make use of Intel SPI common block	2017-11-11 18:19:39 +00:00
systemagent.c	pci: Move inline PCI functions to pci_ops.h	2018-04-20 13:03:54 +00:00
thermal.c	soc/intel/skylake: Set low maximum temperature threshold for Thermal Device	2017-11-30 16:27:12 +00:00
uart.c	soc/intel/skylake: Clean up UART code	2017-12-07 03:21:04 +00:00
vr_config.c	pci: Move inline PCI functions to pci_ops.h	2018-04-20 13:03:54 +00:00