..
common
northbridge/intel: move mrccache.c of sandybridge + haswell to common
2016-03-11 19:00:14 +01:00
e7501
northbridge/intel: add missing #include guards
2016-02-28 18:55:32 +01:00
e7505
northbridge/intel: add missing #include guards
2016-02-28 18:55:32 +01:00
fsp_rangeley
header files: Fix guard name comments to match guard names
2016-01-18 04:07:53 +01:00
fsp_sandybridge
northbridge/intel: move mrc_cache definition into a common header
2016-03-11 18:56:21 +01:00
gm45
northbridge/intel/gm45: Use TSC for ramstage timer per default
2016-03-09 17:04:21 +01:00
haswell
northbridge/intel: move mrccache.c of sandybridge + haswell to common
2016-03-11 19:00:14 +01:00
i440bx
northbridge/intel/i440bx: Unify UDELAY selection
2016-03-10 16:55:35 +01:00
i855
northbridge/intel: add missing #include guards
2016-02-28 18:55:32 +01:00
i945
northbridge/i945/gma: Re-enable NVRAM tft_brightness
2016-03-11 00:48:54 +01:00
i3100
cpu/x86/mtrr: move cache_ramstage() to its only user
2016-03-16 18:55:51 +01:00
i5000
tree: drop last paragraph of GPL copyright header
2015-10-31 21:37:39 +01:00
i82810
northbridge/intel/i82810: Unify UDELAY selection
2016-03-13 00:46:55 +01:00
i82830
northbridge/intel/i82830: Unify UDELAY selection
2016-03-12 22:03:42 +01:00
nehalem
northbridge/intel: move mrccache.c of sandybridge + haswell to common
2016-03-11 19:00:14 +01:00
pineview
northbridge/intel: add missing #include guards
2016-02-28 18:55:32 +01:00
sandybridge
nb/intel/sandybridge/raminit: prepare raminit for fallback
2016-04-05 22:38:28 +02:00
sch
northbridge/intel: add missing #include guards
2016-02-28 18:55:32 +01:00
x4x
Kconfig: Move defaults for CBFS_SIZE
2016-02-10 16:27:50 +01:00