Ronald G. Minnich 5ee2bbb90c fix the msr.lo for olpc 0x20000019 ... git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2275 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2006-04-25 04:07:44 +00:00
..
arch	Adds a CONFIG_MAX_PCI_BUSES to pci_locate_device()	2006-04-23 23:12:21 +00:00
boot	these were factored out.	2005-11-17 13:45:46 +00:00
config	Adds a CONFIG_MAX_PCI_BUSES to pci_locate_device()	2006-04-23 23:12:21 +00:00
console	1201_ht_bus0_dev0_fidvid_core.diff	2005-12-02 21:52:30 +00:00
cpu	boot to kernel	2006-04-20 21:26:01 +00:00
devices	hex values with 0x prefix	2006-04-24 16:56:05 +00:00
drivers	serverworks HT1000/HT2000, bcm5785/5780 support	2006-02-16 17:22:19 +00:00
include	boot to kernel	2006-04-20 21:26:01 +00:00
lib	Updated ep405pc to latest config system.	2005-07-20 18:28:12 +00:00
mainboard	fix the msr.lo for olpc 0x20000019	2006-04-25 04:07:44 +00:00
northbridge	Lower debug progress messages in vt8623 init to debug level rather than error.	2006-04-21 16:43:06 +00:00
pc80	implement io based udelay function for all mainboards that lack an apic	2005-12-04 17:50:32 +00:00
pmc/altimus/mpc7410	changes to support new ppc arch	2005-10-20 01:44:21 +00:00
ram	- Adds support for the Advantech eval board. Configuration was produced	2006-04-01 04:10:44 +00:00
sdram	1201_ht_bus0_dev0_fidvid_core.diff	2005-12-02 21:52:30 +00:00
southbridge	fix so that olpc uarts come up enabled.	2006-04-23 19:21:12 +00:00
stream	Some compilation issue fix for PPC970 port	2005-10-21 00:52:52 +00:00
superio	rename files	2006-02-24 17:23:46 +00:00