Elyes HAOUAS 6ea24ffa8f {sb/intel/*/azalia.c,device/azalia_device.c}: Reduce differences ... Remaining notable differences at function 'codec_detect(u8 *base)'. Change-Id: Ia64e0ba10f145cf2eae0cb2ff4951b1455963d5d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44370 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>		2020-08-17 06:58:45 +00:00
..
acpi	{sb,soc}/intel/*/acpi/lpc.asl: Drop commented-out code	2020-08-05 15:46:17 +00:00
azalia.c	{sb/intel/*/azalia.c,device/azalia_device.c}: Reduce differences	2020-08-17 06:58:45 +00:00
bootblock.c	sb/intel/bd82x6x: Use common early SPI code	2020-06-27 17:29:02 +00:00
chip.h
early_me.c	sb/intel/bd82x6x: Use PCI bitwise ops	2020-06-10 18:48:32 +00:00
early_me_mrc.c
early_pch.c
early_rcba.c	src: Remove unused '#include <stdint.h>'	2020-05-13 08:48:17 +00:00
early_thermal.c	sb/intel/bd82x6x: Use PCI bitwise ops	2020-06-10 18:48:32 +00:00
early_usb.c
early_usb_mrc.c	sb/intel/bd82x6x: Fix 16-bit read/write PCI_COMMAND register	2020-06-02 07:43:31 +00:00
elog.c
fadt.c	src: Report word-sized access for PM1a_EVT	2020-07-20 13:33:32 +00:00
Kconfig	sandybridge/bd82x6x: Use common code for early SMBus	2020-07-21 18:22:59 +00:00
lpc.c	{sb,soc}/intel/**/*.c: Use macros for PCI COMMAND bits	2020-07-26 21:17:50 +00:00
Makefile.inc	sandybridge/bd82x6x: Use common code for early SMBus	2020-07-21 18:22:59 +00:00
me.c	sb/intel/bd82x6x: Align mei_recv_msg() functions	2020-06-24 11:50:12 +00:00
me.h
me_8.x.c	sb/intel/bd82x6x/me_8.x.c: Relocate mkhi_end_of_post	2020-08-13 06:59:29 +00:00
me_status.c
nvs.h	sb/intel: Add include guards on nvs.h	2020-06-30 09:20:02 +00:00
pch.c	sb/intel/bd82x6x: Make pch_silicon_supported static	2020-08-12 11:02:34 +00:00
pch.h	sb/intel/bd82x6x: Make pch_silicon_supported static	2020-08-12 11:02:34 +00:00
pci.c	sb/intel/bd82x6x: Use PCI bitwise ops	2020-06-10 18:48:32 +00:00
pcie.c	src: Never set ISA Enable on PCI bridges	2020-07-28 10:54:02 +00:00
sata.c	{sb,soc}/intel/**/*.c: Use macros for PCI COMMAND bits	2020-07-26 21:17:50 +00:00
smbus.c	sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASE	2020-07-20 17:04:46 +00:00
smihandler.c	ACPI GNVS: Replace uses of smm_get_gnvs()	2020-07-01 05:14:24 +00:00
usb_ehci.c	sb/intel/bd82x6x: Fix 16-bit read/write PCI_COMMAND register	2020-06-02 07:43:31 +00:00
usb_xhci.c	sb/intel/bd82x6x: Use PCI bitwise ops	2020-06-10 18:48:32 +00:00