coreboot-kgpe-d16/src/northbridge/intel/e7505
Arthur Heymans 7c9a0e8a9c arch/x86: Use the stage argument to implement cbmem_top
Currently all stages that need cbmem need an implementation of a
cbmem_top function.  On FSP and AGESA platforms this proves to be
painful and a pointer to the top of lower memory if often passed via
lower memory (e.g. EBDA) or via a PCI scratchpad register.

The problem with writing to lower memory is that also need to be
written on S3 as one cannot assume it to be still there. Writing
things on S3 is always a fragile thing to do.

A very generic solution is to pass cbmem_top via the program argument.
It should be possible to implement this solution on every
architecture.

Instead trying to figure out which files can be removed from stages
and which cbmem_top implementations need with preprocessor, rename all
cbmem_top implementation to cbmem_top_romstage.

TESTED on qemu-x86.

Change-Id: I6d5a366d6f1bc76f26d459628237e6b2c8ae03ea
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36144
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2019-11-03 11:18:31 +00:00
..
e7505.h intel/e7505,i82801dx: Fix SMM_ASEG lock 2019-07-13 13:16:26 +00:00
Kconfig arch/x86: Flip option NO_CAR_GLOBAL_MIGRATION 2019-08-11 18:35:36 +00:00
Makefile.inc arch/x86: Use the stage argument to implement cbmem_top 2019-11-03 11:18:31 +00:00
memmap.c lib/cbmem_top: Add a common cbmem_top implementation 2019-11-01 11:44:51 +00:00
northbridge.c {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem() 2019-03-21 16:18:05 +00:00
raminit.c src/[northbridge,security]: change "unsigned" to "unsigned int" 2019-10-27 18:12:50 +00:00
raminit.h intel/e7505: Drop ECC scrubber code 2019-01-04 04:50:40 +00:00