Vaibhav Shankar 8f20044c77 soc/intel/cannonlake: Fix and clean up xhci ACPI code ... During S3 cycling, system entered S3 only once and falied to enter S3 the second time. The system gets stuck at this point and we have to do a cold reboot to restore the system. Since XHCI IP is able to power gate during kernel freeze/suspend, this patch removes unnecessary device gating from ASL. This helps in continuous cycling of S3. BUG=b:69115421 TEST=run powerd_dbus_suspend multiple times and check if the system enters and resumes from S3. Change-Id: Id459631ea2d32feea4b8f658fd34fa25945f909e Signed-off-by: Vaibhav Shankar <vaibhav.shankar@intel.com> Reviewed-on: https://review.coreboot.org/22389 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2017-11-15 05:56:33 +00:00
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acpi	soc/intel/cannonlake: Fix and clean up xhci ACPI code	2017-11-15 05:56:33 +00:00
bootblock	soc/intel/cannonlake: Fix HECI error on reset	2017-10-19 19:48:43 +00:00
include/soc	soc/intel/{cannonlake,skylake}: Add _soc_ prefix in spi soc routine	2017-11-11 18:19:31 +00:00
romstage	soc/intel/cannonlake: remove duplicate power_state migration	2017-10-26 15:54:19 +00:00
acpi.c	soc/intel/cannonlake: Add support for C state and P state	2017-10-26 15:55:37 +00:00
cbmem.c
chip.c	soc/intel/cannonlake: Add support for C state and P state	2017-10-26 15:55:37 +00:00
chip.h	soc/intel/cannonlake: Install common i2c	2017-11-04 00:42:00 +00:00
cpu.c	soc/intel/cannonlake: Fill the SMI usage	2017-10-03 20:23:41 +00:00
finalize.c	soc/intel/cannonlake: Add finalize function	2017-10-18 17:52:11 +00:00
gpio.c	soc/intel/cannonlake: Add PMC pci drivers	2017-09-20 01:22:18 +00:00
graphics.c	soc/intel/cannonlake: Add IGD Support and pre-OS display code	2017-10-19 15:19:36 +00:00
gspi.c	soc/intel/{cannonlake,skylake}: Add _soc_ prefix in spi soc routine	2017-11-11 18:19:31 +00:00
i2c.c	soc/intel/cannonlake: Install common i2c	2017-11-04 00:42:00 +00:00
Kconfig	soc/intel/cannonlake: Define default LPSS clock	2017-11-13 17:39:41 +00:00
lockdown.c	soc/intel/cannonlake: Add finalize function	2017-10-18 17:52:11 +00:00
lpc.c	soc/intel/cannonlake: Add lpc pci driver	2017-10-03 20:23:32 +00:00
Makefile.inc	soc/intel/cannonlake: Make use of Intel SPI common block	2017-11-11 18:19:58 +00:00
memmap.c	soc/intel/cannonlake: Use EBDA structure to store soc reserve memory size	2017-10-19 17:36:16 +00:00
pmc.c	security/vboot: Move vboot2 to security kconfig section	2017-10-22 02:14:46 +00:00
pmutil.c	security/vboot: Move vboot2 to security kconfig section	2017-10-22 02:14:46 +00:00
reset.c	soc/intel/cannonlake: Remove structure variable initialization with 0	2017-11-10 16:38:05 +00:00
sd.c	soc/intel/cannonlake: Use SCS common code	2017-11-01 17:42:30 +00:00
smihandler.c	soc/intel/cannonlake: Fill the SMI usage	2017-10-03 20:23:41 +00:00
smmrelocate.c	soc/intel/cannonlake: Fill the SMI usage	2017-10-03 20:23:41 +00:00
spi.c	soc/intel/cannonlake: Make use of Intel SPI common block	2017-11-11 18:19:58 +00:00
systemagent.c
uart.c
uart_pch.c	soc/intel/cannonlake: Add ramstage uart debug support	2017-09-13 17:25:02 +00:00
vr_config.c