Matt DeVillier 9e0d69bf1e soc/intel/skylake: pass SataSpeedLimit param to FSP2 ... The Librem13v2 needs to set this parameter to work around power-related issues with some SATA devices. Change-Id: I7fcef36ec8662e18834394b72427a0633c6b7e92 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/22045 Reviewed-by: Youness Alaoui <snifikino@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2017-10-22 01:58:22 +00:00
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acpi	soc/intel/skylake: Add GNVS variables and include SGX ASL	2017-10-20 20:06:15 +00:00
bootblock	soc/intel/skylake: Add support in SKL for PMC common code	2017-10-05 21:11:39 +00:00
include	skylake/me: Add debug output of HFST registers	2017-10-22 01:48:59 +00:00
nhlt	intel/skylake: nhlt: Add capture configuration format for IV feedback from max98927	2017-09-05 23:28:36 +00:00
romstage	soc/intel/skylake: Move power_state functions to pmutil.c	2017-10-19 00:43:22 +00:00
acpi.c	soc/intel/skylake: update GNVS with SGX data	2017-10-20 20:06:33 +00:00
chip.c	intel/skylake: Use Sata related registers from devicetree	2017-10-14 00:25:08 +00:00
chip.h	soc/intel/skylake: pass SataSpeedLimit param to FSP2	2017-10-22 01:58:22 +00:00
chip_fsp20.c	soc/intel/skylake: pass SataSpeedLimit param to FSP2	2017-10-22 01:58:22 +00:00
cpu.c	soc/intel/common/sgx: Define and use soc_fill_sgx_param()	2017-09-15 16:21:11 +00:00
dsp.c
elog.c	soc/intel/skylake: Probe XHCI for wake source for Internal PME	2017-10-19 00:43:45 +00:00
finalize.c	soc/intel/skylake: Enable common LPC IP	2017-10-03 20:23:21 +00:00
gpio.c	soc/intel/skylake: Use common/block/gpio	2017-10-02 22:32:33 +00:00
gspi.c	lib: provide clearer devicetree semantics	2017-04-25 18:14:38 +02:00
i2c.c	intel/common/block/i2c: Add common block for I2C and use the same in SoCs	2017-05-18 06:07:15 +02:00
igd.c	Kconfig: Move and rename ADD_VBT_DATA_FILE	2017-09-04 15:34:10 +00:00
irq.c	soc/intel/skylake: Enable common LPC IP	2017-10-03 20:23:21 +00:00
Kconfig	soc/intel/skylake: Add support in SKL for PMC common code	2017-10-05 21:11:39 +00:00
lockdown.c	soc/intel/skylake: Enable common LPC IP	2017-10-03 20:23:21 +00:00
lpc.c	soc/intel/skylake: Enable common LPC IP	2017-10-03 20:23:21 +00:00
Makefile.inc	soc/intel/skylake: Support logging wake source in SMM	2017-10-19 00:43:30 +00:00
me.c	skylake/me: Add debug output of HFST registers	2017-10-22 01:48:59 +00:00
memmap.c	soc/intel/skylake: Use EBDA structure to store soc reserve memory size	2017-10-19 17:36:06 +00:00
pch.c	soc/intel/skylake: Clean up code by using common FAST_SPI module	2017-05-02 18:26:07 +02:00
pei_data.c
pmc.c	soc/intel/skylake: Add support in SKL for PMC common code	2017-10-05 21:11:39 +00:00
pmutil.c	soc/intel/skylake: Move power_state functions to pmutil.c	2017-10-19 00:43:22 +00:00
reset.c	soc/intel/skylake: Add support in SKL for PMC common code	2017-10-05 21:11:39 +00:00
sd.c	soc/intel/skylake: Use SCS common code	2017-06-16 17:37:13 +02:00
smi.c	soc/intel/common: Clean up PMC library GPE handling API	2017-10-12 22:13:39 +00:00
smihandler.c	soc/intel/skylake: Define mask for SMI handlers that can be run in SCI mode	2017-10-19 00:43:34 +00:00
smmrelocate.c	soc/intel/skylake: Move UNCORE PRMRR base and mask defines.	2017-09-15 16:21:29 +00:00
spi.c	soc/intel/common: Provide common block fast_spi_flash_ctrlr	2017-05-05 23:40:51 +02:00
systemagent.c	soc/intel/skylake: Move UNCORE PRMRR base and mask defines.	2017-09-15 16:21:29 +00:00
uart.c	soc/intel/skylake: Add support for all UART port index	2017-08-21 16:29:55 +00:00
uart_debug.c	soc/intel/skylake: Add support for all UART port index	2017-08-21 16:29:55 +00:00
vr_config.c	intel/skylake: Support for setting AC/DC loadline	2017-03-15 19:45:55 +01:00