Curtis Chen b89c798ddc soc/intel/common: Do not trigger crashlog on all resets by default ... Crashlog has error records and PMC reset records two parts. When we send ipc cmd "PMC_IPC_CMD_ID_CRASHLOG_ON_RESET", PMC reset record is enabled. At each warm/cold/global reset, crashlog would be triggered. The cause of this crash would be "TRIGGER_ON_ALL_RESETS", it is used to catch unknown reset reason. At the same time, we would see [Hardware Error] in the kernel log. If we default enable TRIGGER_ON_ALL_RESETS, we would have too many false alarm. Now we disable PMC reset records part by default. And we could enable it when we need it for the debug purpose. The generated bert dump is under /var/spool/crash/, we could check this path to verify this CONFIG disable/enable status. BUG=b:202737385 TEST=No new bert dump after a warm reset. Signed-off-by: Curtis Chen <curtis.chen@intel.com> Change-Id: I3ec4ff3c8a3799156de030f4556fe6ce61305139 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59951 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>		2021-12-20 17:49:53 +00:00
..
acpi	soc/intel/tigerlake: Add config option for S3 ACPI	2021-11-15 04:37:44 +00:00
bootblock	soc/tigerlake: Make IO decode / enable register configurable	2021-10-01 18:53:28 +00:00
include/soc	soc/intel: Update api name for getting spi destination id	2021-10-26 18:12:17 +00:00
romstage	soc/intel/tigerlake: Hook up SMBus device to devicetree	2021-12-09 21:52:13 +00:00
acpi.c	soc/intel: Constify soc_get_cstate_map()	2021-10-19 14:57:59 +00:00
chip.c	soc/intel/tigerlake: Add USB ACPI devices for PCH-H	2021-08-24 14:51:47 +00:00
chip.h	soc/intel/tigerlake: Hook up DPTF device to devicetree	2021-12-09 22:00:23 +00:00
chipset.cb	mb/*/{tglrvp,volteer,deltaur}: move cpu_cluster configuration to chipset.cb	2021-08-16 15:01:11 +00:00
chipset_pch_h.cb	soc/intel/tigerlake: Add PCH-H chipset devicetree	2021-08-24 14:46:16 +00:00
cpu.c	cpu/x86/mp_init: move printing of failure message into mp_init_with_smm	2021-10-22 01:27:07 +00:00
crashlog_lib.c
dptf.c
elog.c
espi.c
finalize.c	soc/intel/{adl,ehl,jsl,tgl}: Remove unused header thermal.h	2021-11-22 08:02:48 +00:00
fsp_params.c	soc/intel/tigerlake: Hook up DPTF device to devicetree	2021-12-09 22:00:23 +00:00
gpio.c	soc/intel/{xeon-sp,icl,tgl,jsl,ehl}: add NMI_{EN,STS} registers	2021-09-23 06:31:48 +00:00
gpio_pch_h.c	soc/intel/{xeon-sp,icl,tgl,jsl,ehl}: add NMI_{EN,STS} registers	2021-09-23 06:31:48 +00:00
graphics.c	soc/intel/tigerlake: Hook up GMA ACPI brightness controls	2021-10-07 11:04:48 +00:00
gspi.c
i2c.c
Kconfig	soc/intel/common: Do not trigger crashlog on all resets by default	2021-12-20 17:49:53 +00:00
lockdown.c
lpm.c	soc/intel/tigerlake: Move LPM functions to new file	2021-09-10 21:53:48 +00:00
Makefile.inc	soc/intel/tigerlake: Define soc_get_pcie_rp_type	2021-12-13 13:54:52 +00:00
me.c
meminit.c
p2sb.c
pcie_rp.c	soc/intel/tigerlake: Define soc_get_pcie_rp_type	2021-12-13 13:54:52 +00:00
pmc.c	soc/intel: implement ACPI timer disabling per SoC and drop common code	2021-10-17 13:57:53 +00:00
pmutil.c	soc/intel/tigerlake: Clear RTC_BATTERY_DEAD	2021-09-20 15:44:07 +00:00
reset.c
smihandler.c
soundwire.c
spi.c	soc/intel: Update api name for getting spi destination id	2021-10-26 18:12:17 +00:00
systemagent.c	Rename ECAM-specific MMCONF Kconfigs	2021-11-10 17:24:16 +00:00
uart.c
xhci.c