Furquan Shaikh e4f7e04050 soc/intel: Drop dev parameter from soc_get_gen_io_dec_range() ... This change drops the parameter `struct device *dev` from the function `soc_get_gen_io_dec_range()`. This function uses the parameter dev to get a pointer to config structure for extracting the decode ranges configured by mainboard in device tree. However, there is no separate chip driver for the LPC device which means that the SoC code can use `config_of_soc()` to get to SoC chip config instead of using the LPC device. This change is being done in preparation to clean up the device tree/chip config access in early stages that allows for optimizing the inclusion of device tree elements in the early stages. Change-Id: I3ea53ddc771f592dd0ea5e5e809be2d2eff7f16d Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49209 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>		2021-01-08 08:23:59 +00:00
..
acpi	soc/intel/common: Move gfx.asl to drivers/intel/gma	2020-12-30 16:35:21 +00:00
bootblock	soc/intel/common/dmi: Move DMI defines into DMI driver header	2020-12-09 14:23:15 +00:00
include/soc	soc/intel/cannonlake: Change mainboard_silicon_init_params argument	2020-12-17 06:22:55 +00:00
romstage	soc/intel: remove duplicate weak versions of mainboard_get_dram_part_num()	2020-10-05 18:03:22 +00:00
acpi.c	soc/intel/cannonlake: Fix DMAR when no iGPU is present	2020-07-31 09:42:16 +00:00
chip.c	soc/intel: hook up new gpio device in the soc chips	2020-12-30 00:30:04 +00:00
chip.h	soc/intel/cnl: add panel and backlight configuration code	2021-01-01 21:12:45 +00:00
cnl_memcfg_init.c
cpu.c	soc/intel: deduplicate ACPI timer emulation	2020-10-28 21:28:19 +00:00
elog.c	soc/intel/common: Adapt XHCI elog driver for reuse	2020-12-10 17:45:47 +00:00
finalize.c	soc/intel/{skl,cnl}: drop duplicate PM ACPI timer disabling	2020-11-13 17:18:20 +00:00
fsp_params.c	soc/intel/cannonlake: Change mainboard_silicon_init_params argument	2020-12-17 06:22:55 +00:00
gpio.c	soc/intel/{skl,cnl}: add NMI_{EN,STS} registers	2020-12-04 00:10:38 +00:00
gpio_cnp_h.c	soc/intel/{skl,cnl}: add NMI_{EN,STS} registers	2020-12-04 00:10:38 +00:00
gpio_common.c
graphics.c	soc/intel/cnl: add panel and backlight configuration code	2021-01-01 21:12:45 +00:00
gspi.c
i2c.c
Kconfig	soc/intel/cnl: add Kconfig values for GMA backlight registers	2020-12-30 01:05:21 +00:00
lockdown.c
lpc.c	soc/intel: Drop dev parameter from soc_get_gen_io_dec_range()	2021-01-08 08:23:59 +00:00
Makefile.inc	soc/intel/cnl: add panel and backlight configuration code	2021-01-01 21:12:45 +00:00
me.c	soc/intel/cannonlake: Align cosmetics with Ice Lake	2020-10-12 20:59:17 +00:00
nhlt.c
p2sb.c
pmc.c
pmutil.c
reset.c	soc/intel: Use of common reset code block	2020-11-02 10:43:53 +00:00
sd.c	soc/intel/cannonlake: Align cosmetics with Ice Lake	2020-10-12 20:59:17 +00:00
smihandler.c	soc/intel/cnl: replace the remains of HeciEnabled by device state in dt	2020-11-13 22:30:29 +00:00
smmrelocate.c	src/soc/intel: Drop unneeded empty lines	2020-09-21 16:15:25 +00:00
spi.c
systemagent.c
uart.c
vr_config.c	soc/intel/cannonlake: Add Iccmax and loadlines for CML-S	2020-12-22 22:21:00 +00:00
xhci.c	soc/intel/common: Adapt XHCI elog driver for reuse	2020-12-10 17:45:47 +00:00