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coreboot-kgpe-d16/util/superiotool/fintek.c

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util/: Replace GPLv2 boiler plate with SPDX header Used commands: perl -i -p0e 's|\/\*[\s*]*.*is free software[:;][\s*]*you[\s*]*can[\s*]*redistribute[\s*]*it[\s*]*and\/or[\s*]*modify[\s*]*it[\s*]*under[\s*]*the[\s*]*terms[\s*]*of[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*as[\s*]*published[\s*]*by[\s*]*the[\s*]*Free[\s*]*Software[\s*]*Foundation[;,][\s*]*version[\s*]*2[\s*]*of[\s*]*the[\s*]*License.[\s*]*This[\s*]*program[\s*]*is[\s*]*distributed[\s*]*in[\s*]*the[\s*]*hope[\s*]*that[\s*]*it[\s*]*will[\s*]*be[\s*]*useful,[\s*]*but[\s*]*WITHOUT[\s*]*ANY[\s*]*WARRANTY;[\s*]*without[\s*]*even[\s*]*the[\s*]*implied[\s*]*warranty[\s*]*of[\s*]*MERCHANTABILITY[\s*]*or[\s*]*FITNESS[\s*]*FOR[\s*]*A[\s*]*PARTICULAR[\s*]*PURPOSE.[\s*]*See[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*for[\s*]*more[\s*]*details.[\s*]*\*\/|/* SPDX-License-Identifier: GPL-2.0-only */|' $(cat filelist) perl -i -p0e 's|This[\s*]*program[\s*]*is[\s*]*free[\s*]*software[:;][\s*]*you[\s*]*can[\s*]*redistribute[\s*]*it[\s*]*and/or[\s*]*modify[\s*]*it[\s*]*under[\s*]*the[\s*]*terms[\s*]*of[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*as[\s*]*published[\s*]*by[\s*]*the[\s*]*Free[\s*]*Software[\s*]*Foundation[;,][\s*]*either[\s*]*version[\s*]*2[\s*]*of[\s*]*the[\s*]*License,[\s*]*or[\s*]*.at[\s*]*your[\s*]*option.*[\s*]*any[\s*]*later[\s*]*version.[\s*]*This[\s*]*program[\s*]*is[\s*]*distributed[\s*]*in[\s*]*the[\s*]*hope[\s*]*that[\s*]*it[\s*]*will[\s*]*be[\s*]*useful,[\s*]*but[\s*]*WITHOUT[\s*]*ANY[\s*]*WARRANTY;[\s*]*without[\s*]*even[\s*]*the[\s*]*implied[\s*]*warranty[\s*]*of[\s*]*MERCHANTABILITY[\s*]*or[\s*]*FITNESS[\s*]*FOR[\s*]*A[\s*]*PARTICULAR[\s*]*PURPOSE.[\s*]*See[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*for[\s*]*more[\s*]*details.[\s*]*\*\/|/* SPDX-License-Identifier: GPL-2.0-or-later */|' $(cat filelist) perl -i -p0e 's|\/\*[\s*]*.*This[\s*#]*program[\s*#]*is[\s*#]*free[\s*#]*software[;:,][\s*#]*you[\s*#]*can[\s*#]*redistribute[\s*#]*it[\s*#]*and/or[\s*#]*modify[\s*#]*it[\s*#]*under[\s*#]*the[\s*#]*terms[\s*#]*of[\s*#]*the[\s*#]*GNU[\s*#]*General[\s*#]*Public[\s*#]*License[\s*#]*as[\s*#]*published[\s*#]*by[\s*#]*the[\s*#]*Free[\s*#]*Software[\s*#]*Foundation[;:,][\s*#]*either[\s*#]*version[\s*#]*3[\s*#]*of[\s*#]*the[\s*#]*License[;:,][\s*#]*or[\s*#]*.at[\s*#]*your[\s*#]*option.*[\s*#]*any[\s*#]*later[\s*#]*version.[\s*#]*This[\s*#]*program[\s*#]*is[\s*#]*distributed[\s*#]*in[\s*#]*the[\s*#]*hope[\s*#]*that[\s*#]*it[\s*#]*will[\s*#]*be[\s*#]*useful[;:,][\s*#]*but[\s*#]*WITHOUT[\s*#]*ANY[\s*#]*WARRANTY[;:,][\s*#]*without[\s*#]*even[\s*#]*the[\s*#]*implied[\s*#]*warranty[\s*#]*of[\s*#]*MERCHANTABILITY[\s*#]*or[\s*#]*FITNESS[\s*#]*FOR[\s*#]*A[\s*#]*PARTICULAR[\s*#]*PURPOSE.[\s*#]*See[\s*#]*the[\s*#]*GNU[\s*#]*General[\s*#]*Public[\s*#]*License[\s*#]*for[\s*#]*more[\s*#]*details.[\s*]*\*\/|/* SPDX-License-Identifier: GPL-3.0-or-later */|' $(cat filelist) perl -i -p0e 's|(\#\#*)[\w]*.*is free software[:;][\#\s]*you[\#\s]*can[\#\s]*redistribute[\#\s]*it[\#\s]*and\/or[\#\s]*modify[\#\s]*it[\s\#]*under[\s \#]*the[\s\#]*terms[\s\#]*of[\s\#]*the[\s\#]*GNU[\s\#]*General[\s\#]*Public[\s\#]*License[\s\#]*as[\s\#]*published[\s\#]*by[\s\#]*the[\s\#]*Free[\s\#]*Software[\s\#]*Foundation[;,][\s\#]*version[\s\#]*2[\s\#]*of[\s\#]*the[\s\#]*License.*[\s\#]*This[\s\#]*program[\s\#]*is[\s\#]*distributed[\s\#]*in[\s\#]*the[\s\#]*hope[\s\#]*that[\s\#]*it[\s\#]*will[\#\s]*be[\#\s]*useful,[\#\s]*but[\#\s]*WITHOUT[\#\s]*ANY[\#\s]*WARRANTY;[\#\s]*without[\#\s]*even[\#\s]*the[\#\s]*implied[\#\s]*warranty[\#\s]*of[\#\s]*MERCHANTABILITY[\#\s]*or[\#\s]*FITNESS[\#\s]*FOR[\#\s]*A[\#\s]*PARTICULAR[\#\s]*PURPOSE.[\#\s]*See[\#\s]*the[\#\s]*GNU[\#\s]*General[\#\s]*Public[\#\s]*License[\#\s]*for[\#\s]*more[\#\s]*details.\s(#* *\n)*|\1 SPDX-License-Identifier: GPL-2.0-only\n\n|' $(cat filelist) perl -i -p0e 's|(\#\#*)[\w*]*.*is free software[:;][\s*]*you[\s*]*can[\s*]*redistribute[\s*]*it[\s*]*and\/or[\s*]*modify[\s*]*it[\s*]*under[\s*]*the[\s*]*terms[\s*]*of[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*as[\s*]*published[\s*]*by[\s*]*the[\s*]*Free[\s*]*Software[\s*]*Foundation[;,][\s*]*version[\s*]*2[\s*]*of[\s*]*the[\s*]*License.[\s*]*This[\s*]*program[\s*]*is[\s*]*distributed[\s*]*in[\s*]*the[\s*]*hope[\s*]*that[\s*]*it[\s*]*will[\s*]*be[\s*]*useful,[\s*]*but[\s*]*WITHOUT[\s*]*ANY[\s*]*WARRANTY;[\s*]*without[\s*]*even[\s*]*the[\s*]*implied[\s*]*warranty[\s*]*of[\s*]*MERCHANTABILITY[\s*]*or[\s*]*FITNESS[\s*]*FOR[\s*]*A[\s*]*PARTICULAR[\s*]*PURPOSE.[\s*]*See[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*for[\s*]*more[\s*]*details.\s(#* *\n)*|\1 SPDX-License-Identifier: GPL-2.0-only\n\n|' $(cat filelist) Change-Id: I1008a63b804f355a916221ac994701d7584f60ff Signed-off-by: Patrick Georgi <pgeorgi@google.com> Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41177 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-08 20:48:04 +02:00
/* SPDX-License-Identifier: GPL-2.0-or-later */
Split up superiotool.c into multiple source files, one per vendor. As there will be lots more supported Super I/Os soon, the file is really getting way too big... Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16 20:11:03 +02:00
#include "superiotool.h"
Fix up and generalize the ITE IT8708F code. It was only working out of pure luck (and broken code elsewhere). Needs some more fixing. Add more LDN descriptions to various Super I/Os. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21 00:13:48 +02:00
#define DEVICE_ID_BYTE1_REG 0x20
#define DEVICE_ID_BYTE2_REG 0x21
Add support for some more Fintek chips and an ALi chip. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2813 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-28 17:39:10 +02:00
Fix up and generalize the ITE IT8708F code. It was only working out of pure luck (and broken code elsewhere). Needs some more fixing. Add more LDN descriptions to various Super I/Os. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21 00:13:48 +02:00
#define VENDOR_ID_BYTE1_REG 0x23
#define VENDOR_ID_BYTE2_REG 0x24
Minor fixes/improvements in the Fintek code (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2802 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-23 15:17:29 +02:00
#define FINTEK_VENDOR_ID 0x3419
Use the preferred order of 'static const' instead of 'const static'. This is the common style in both Linux as well as in LinuxBIOS. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Jordan Crouse <jordan.crouse@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2922 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-31 23:22:11 +01:00
static const struct superio_registers reg_table[] = {
Add detection support for ITE IT8228E, IT8711F, IT8722F, IT8761E, IT8780F, and Fintek F71863FG. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-12 20:08:58 +01:00
{0x0106, "F71862FG / F71863FG", { /* Same ID? Datasheet typo? */
Add dump information for F71862FG and F71863FG. Signed-off-by: Arjan Koers <0h3q2rmn2bdb@list.nospam.xutrox.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4372 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26 17:16:21 +02:00
/* We assume reserved bits are read as 0. */
{NOLDN, NULL,
{0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
0x2b,0x2c,0x2d,EOT},
{0x06,0x01,0x19,0x34,0x00,0x00,MISC,0x00,0x00,0x00,
0x00,0x00,0x08,EOT}},
Various superiotool fixes. - IT8671F/IT8687R: - Fix typo: Parallel port register 0x60 value is 0x03 (not 0x01). - Fix typo: APC register 0xf6 is 0x00. - Drop register 0x07 (LDN 0 / none), that's not useful and not listed in any of the other Super I/Os either, it always contains the LDN number selected "last time", which is useless. - Fix indentation and other cosmetics. - Cosmetics, and consistency fixes in LDN names of various Super I/Os. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5549 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-14 18:40:55 +02:00
{0x0, "Floppy",
Add dump information for F71862FG and F71863FG. Signed-off-by: Arjan Koers <0h3q2rmn2bdb@list.nospam.xutrox.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4372 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26 17:16:21 +02:00
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
Various superiotool fixes. - IT8671F/IT8687R: - Fix typo: Parallel port register 0x60 value is 0x03 (not 0x01). - Fix typo: APC register 0xf6 is 0x00. - Drop register 0x07 (LDN 0 / none), that's not useful and not listed in any of the other Super I/Os either, it always contains the LDN number selected "last time", which is useless. - Fix indentation and other cosmetics. - Cosmetics, and consistency fixes in LDN names of various Super I/Os. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5549 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-14 18:40:55 +02:00
{0x1, "COM1",
Add dump information for F71862FG and F71863FG. Signed-off-by: Arjan Koers <0h3q2rmn2bdb@list.nospam.xutrox.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4372 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26 17:16:21 +02:00
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x01,0x03,0xf8,0x04,0x00,EOT}},
Various superiotool fixes. - IT8671F/IT8687R: - Fix typo: Parallel port register 0x60 value is 0x03 (not 0x01). - Fix typo: APC register 0xf6 is 0x00. - Drop register 0x07 (LDN 0 / none), that's not useful and not listed in any of the other Super I/Os either, it always contains the LDN number selected "last time", which is useless. - Fix indentation and other cosmetics. - Cosmetics, and consistency fixes in LDN names of various Super I/Os. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5549 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-14 18:40:55 +02:00
{0x2, "COM2",
Add dump information for F71862FG and F71863FG. Signed-off-by: Arjan Koers <0h3q2rmn2bdb@list.nospam.xutrox.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4372 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26 17:16:21 +02:00
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
{0x4, "Hardware monitor",
{0x30,0x60,0x61,0x70,EOT},
{0x01,0x02,0x95,0x00,EOT}},
{0x5, "Keyboard",
{0x30,0x60,0x61,0x70,0x72,EOT},
{0x01,0x00,0x60,0x00,0x00,EOT}},
{0x6, "GPIO",
{0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,
0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,
EOT},
{0x00,0x0f,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,
NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0x3f,NANA,0x00,
EOT}},
{0x7, "VID",
{0x30,0x60,0x61, 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,
0xf7,EOT},
{0x00,0x00,0x00, 0x00,0x00,MISC,0x00,NANA,0x00,0x00,
0x00,EOT}},
{0x8, "SPI",
{0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
0xfb,0xfc,0xfd,0xfe,0xff,EOT},
{0x10,0x04,0x01,NANA,0x00,0x00,0x00,NANA,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,EOT}},
{0xa, "PME, ACPI",
{0x30,0xf0,0xf1,0xf4,0xf5,0xf7,EOT},
{0x00,0x00,NANA,0x06,0x1c,0x01,EOT}},
Add support for some more Fintek chips and an ALi chip. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2813 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-28 17:39:10 +02:00
{EOT}}},
util/superiotool: Add support for Fintek F71808A Default values taken from the datasheet and from the dump of an uninitialized F71808A on a Sapphire Pure Platinum H61. Both the control registers and the HWM configuration registers are added. Change-Id: Ia6e2a7c13a5086d19ebdb426f2f975b43220a273 Signed-off-by: Nicola Corna <nicola@corna.info> Reviewed-on: https://review.coreboot.org/18562 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-02-28 23:45:42 +01:00
{0x0110, "F71808A", {
/* We assume reserved bits are read as 0. */
{NOLDN, NULL,
{0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,
0x29,0x2a,0x2b,0x2c,0x2d,EOT},
{0x00,0x00,0x10,0x01,0x19,0x34,0x00,0x00,MISC,0x00,
0xc0,0x21,0x2f,0x5c,0x27,EOT}},
{0x1, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x01,0x03,0xf8,0x04,0x00,EOT}},
{0x4, "Hardware monitor",
{0x30,0x60,0x61,0x70,EOT},
{0x01,0x02,0x95,0x00,EOT}},
{0x5, "Keyboard",
{0x30,0x60,0x61,0x70,0x72,0xfe,0xff,EOT},
{0x01,0x00,0x60,0x01,0x0c,0x01,0x29,EOT}},
{0x6, "GPIO",
{0x70,0xc0,0xc1,0xc2,0xc3,0xc4,0xc5,0xc6,0xcb,0xcc,
0xcd,0xce,0xcf,0xd0,0xd1,0xd2,0xd3,0xd4,0xd5,0xd6,
0xd7,0xd8,0xe0,0xe1,0xe2,0xe3,0xf0,0xf1,0xf2,0xf3,
EOT},
{0x00,0x00,0x3f,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0xe0,0x40,0x00,0x00,NANA,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x1f,NANA,0x00,0x00,0xff,NANA,0x00,
EOT}},
{0x7, "WDT",
{0x30,0x60,0x61,0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,
EOT},
{0x00,0x00,0x00,0x03,NANA,NANA,NANA,0x00,0x0a,0x00,
EOT}},
{0x8, "CIR",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf8,0xf9,0xfa,0xfb,
0xfc,0xfd,0xfe,EOT},
{0x00,0x00,0x00,0x00,NANA,NANA,0x00,0x00,0x80,0x3b,
0x00,0x00,0x00,EOT}},
{0xa, "PME, ACPI, and EUP Power Saving",
{0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
0xe9,0xec,0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,
0xf6,0xf7,0xf8,0xf9,0xfa,0xfd,EOT},
{0x00,0x10,0xcc,0x0c,0x13,0x09,0xc7,0x09,0x63,0x00,
0x0f,0x00,0x00,0x00,0x00,NANA,0x00,NANA,0x06,0x3c,
0x1f,0x00,0x00,0x00,0x00,NANA,EOT}},
{EOT}}},
util/superiotool: Register fix for Fintek F71869AD Fixed F71869AD based on the proper datasheet: http://www.alldatasheet.com/datasheet-pdf/pdf/459074/FINTEK/F71869AD.html Change-Id: If22341551c6a1a9bbae088801a6194f7b5b6bf4d Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com> Reviewed-on: http://review.coreboot.org/5405 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-03-24 10:02:42 +01:00
{0x0710, "F71869A/AD", {
util/superiotool: Add initial support for Fintek F71869AD. Change-Id: Ia2ce8214d8b419d0ca0186e6f6b2241097b0847b Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/4802 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-25 14:19:58 +01:00
/* We assume reserved bits are read as 0. */
{NOLDN, NULL,
util/superiotool: Register fix for Fintek F71869AD Fixed F71869AD based on the proper datasheet: http://www.alldatasheet.com/datasheet-pdf/pdf/459074/FINTEK/F71869AD.html Change-Id: If22341551c6a1a9bbae088801a6194f7b5b6bf4d Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com> Reviewed-on: http://review.coreboot.org/5405 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-03-24 10:02:42 +01:00
{0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,
0x29,0x29,0x2a,0x2a,0x2b,0x2b,0x2c,0x2c,0x2d,EOT},
{0x00,0x00,0x10,0x07,0x19,0x34,0x00,0x00,NANA,0x38,
0x6f,0x03,0x0f,0xe7,0x0f,NANA,0x00,NANA,0x28,EOT}},
util/superiotool: Add initial support for Fintek F71869AD. Change-Id: Ia2ce8214d8b419d0ca0186e6f6b2241097b0847b Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/4802 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-25 14:19:58 +01:00
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
{0x1, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x01,0x03,0xf8,0x04,0x00,EOT}},
{0x2, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
{0x4, "Hardware monitor",
{0x30,0x60,0x61,0x70,EOT},
{0x01,0x02,0x95,0x00,EOT}},
{0x5, "Keyboard",
{0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT},
{0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT}},
{0x6, "GPIO",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,
0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0,
util/superiotool: Register fix for Fintek F71869AD Fixed F71869AD based on the proper datasheet: http://www.alldatasheet.com/datasheet-pdf/pdf/459074/FINTEK/F71869AD.html Change-Id: If22341551c6a1a9bbae088801a6194f7b5b6bf4d Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com> Reviewed-on: http://review.coreboot.org/5405 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-03-24 10:02:42 +01:00
0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xa0,
0xa1,0xa2,0xa4,0xa5,0xa6,0xa9,0xab,0xac,0xad,0xae,
0xaf,0x90,0x91,0x92,0x80,0x81,0x82,0x83,EOT},
util/superiotool: Add initial support for Fintek F71869AD. Change-Id: Ia2ce8214d8b419d0ca0186e6f6b2241097b0847b Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/4802 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-25 14:19:58 +01:00
{0x00,0x00,0x00,0x00,0x00,0x3f,NANA,0x00,0x00,0xff,
NANA,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,0x00,
util/superiotool: Register fix for Fintek F71869AD Fixed F71869AD based on the proper datasheet: http://www.alldatasheet.com/datasheet-pdf/pdf/459074/FINTEK/F71869AD.html Change-Id: If22341551c6a1a9bbae088801a6194f7b5b6bf4d Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com> Reviewed-on: http://review.coreboot.org/5405 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-03-24 10:02:42 +01:00
0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x00,0x00,0x00,
0x1f,NANA,0x00,0x00,0x00,0x00,0x00,0xe0,0x00,0x00,
0x40,0x00,0xff,NANA,0x00,0xff,NANA,0x00,EOT}},
{0x7, "WDT",
{0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
{0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}},
{0x8, "CIR",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf8,0xf9,0xfa,0xfb,
0xfc,0xfd,0xfe,EOT},
{0x00,0x00,0x00,0x00,NANA,NANA,0x00,0x00,0x80,0x3b,
0x00,0x00,0x00,EOT}},
{0xa, "PME, ACPI, and ERP Power Saving",
{0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
0xe9,0xec,0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,
0xf6,0xf7,0xf8,0xf9,0xfa,0xfc,0xfe,EOT},
{0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08,
0x0f,0x00,0x00,0x00,0x00,NANA,0x00,NANA,0x06,0x1c,
0x1f,0x86,0x00,0x00,0x00,0x07,0x00,EOT}},
util/superiotool: Add initial support for Fintek F71869ED. Datasheet: http://www.fintek.com.tw/files/productfiles/F71869_V1.1.pdf Practically the same as F71869AD, just another ID (0x1408). Tested on actual hardware, Jetway NC9C-550-LF. Update: Fixed F71869ED based on the proper datasheet: http://www.alldatasheet.com/datasheet-pdf/pdf/459075/FINTEK/F71869ED.html Change-Id: I5da858565ca16ba4d73b47b42fadd31dabbc290b Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com> Reviewed-on: http://review.coreboot.org/5380 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-03-12 11:19:31 +01:00
{EOT}}},
{0x1408, "F71869E/ED", {
/* We assume reserved bits are read as 0. */
{NOLDN, NULL,
{0x02,0x07,0x20,0x21,0x23,0x24,0x26,0x27,0x28,0x29,
0x2a,0x2b,0x2d,EOT},
{0x00,0x00,0x08,0x14,0x19,0x34,0x00,NANA,0x38,0x6f,
0x07,0x0f,0x28,EOT}},
{0x00, "FDC",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
{0x01, "UART1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x01,0x03,0xf8,0x04,0x00,EOT}},
{0x02, "UART2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
{0x03, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
{0x04, "Hardware Monitor",
{0x30,0x60,0x61,0x70,EOT},
{0x01,0x02,0x95,0x00,EOT}},
{0x05, "KBC",
{0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT},
{0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT}},
{0x06, "GPIO",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,
0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0,
0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,
0x90,0x91,0x92,0x93,EOT},
{0x00,0x00,0x00,0x00,0x00,0x3f,NANA,0x00,0x00,0xff,
NANA,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,0x00,
0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x1f,NANA,0x00,
0x00,0x3f,NANA,0x00,EOT}},
{0x07, "WDT",
{0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
{0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}},
{0x0a, "PME, ACPI, and EUP Power Saving",
{0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,
0xf8,0xf9,0xfe,EOT},
{0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08,
0x00,0x00,0x00,0x00,0x00,NANA,0x06,0x1c,0x1f,0x86,
0x00,0x00,0x00,EOT}},
{EOT}}},
Add Fintek F71889 detection and dump support. The patch was tested by a user on IRC who had the F71889FG. I wrote it using documentation from Fintek's website available here: http://www.fintek.com.tw/files/productfiles/F71889_V0.28P.pdf This patch also seems to work for the F71889ED, which uses 0x09 and 0x09 for chip ID bytes 1 & 2. However, I have not been able to find documentation to verify that the two chips are identical from superiotool's perspective. Signed-off-by: David Hendricks <dhendrix@google.com> Signed-off-by: Alec Ari <neotheuser@ymail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-29 12:56:39 +01:00
{0x2307, "F71889", {
/* We assume reserved bits are read as 0. */
{NOLDN, NULL,
{0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x2a,0x2b,
0x2c,0x2d,EOT},
{0x07,0x23,0x19,0x34,0x00,0x00,0x00,0x00,0xf0,0x30,
0x00,0x08,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
{0x1, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x01,0x03,0xf8,0x04,0x00,EOT}},
{0x2, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
{0x4, "Hardware monitor",
{0x30,0x60,0x61,0x70,EOT},
{0x01,0x02,0x95,0x00,EOT}},
{0x5, "Keyboard",
{0x30,0x60,0x61,0x70,0x72,0xfe,EOT},
{0x01,0x00,0x60,0x01,0x0c,0x81,EOT}},
{0x6, "GPIO",
{0x80,0x81,0x82,0x83,0x90,0x91,0x92,0x93,0xa0,0xa1,
0xa2,0xa3,0xb0,0xb1,0xb2,0xc0,0xc1,0xc2,0xc3,0xd0,
0xd1,0xd2,0xd3,0xe0,0xe1,0xe2,0xe3,0xf0,0xf1,0xf2,
0xf3,0xfe,0xff,EOT},
{0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0x1f,
NANA,0x00,0x00,0xff,NANA,0x00,0xff,NANA,0x00,0x00,
0xff,NANA,0x00,0x00,0x7f,NANA,0x00,0x00,0x7f,NANA,
0x00,0x00,0x00,EOT}},
{0x7, "VID",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
{0x8, "SPI",
{0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
0xfb,0xfc,0xfd,0xfe,0xff,EOT},
{0x00,RSVD,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,EOT}},
{0xa, "PME, ACPI",
{0x30,0xf0,0xf1,0xf4,0xf5,0xf6,EOT},
{0x00,0x00,0x00,0x26,0x1c,0x07,EOT}},
{0xb, "VREF",
{0xf0,0xf1,0xf2,0xf3,0xff,EOT},
{0x64,0x64,0x64,0x00,0x00,EOT}},
{EOT}}},
Add support for some more Fintek chips and an ALi chip. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2813 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-28 17:39:10 +02:00
{0x4103, "F71872F/FG / F71806F/FG", { /* Same ID? Datasheet typo? */
Teach superiotool about the registers in a Fintek F71806 (and F71872). Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-24 14:43:41 +02:00
{NOLDN, NULL,
{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
0x29,0x2a,0x2b,0x2c,0x2d,EOT},
{0x03,0x41,RSVD,0x19,0x34,0x00,0x00,MISC,0x66,
0x80,0x00,0x00,0x00,0x04,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
{0x1, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x01,0x03,0xf8,0x04,0x00,EOT}},
{0x2, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
{0x4, "Hardware monitor",
{0x30,0x60,0x61,0x70,EOT},
{0x00,0x02,0x95,0x00,EOT}},
Add small comment about LDN 5 on F71872F/FG / F71806F/FG. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5984 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-24 16:19:09 +02:00
{0x5, "Keyboard", /* Only documented on F71872F/FG. */
Teach superiotool about the registers in a Fintek F71806 (and F71872). Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-24 14:43:41 +02:00
{0x30,0x60,0x61,0x70,0x72,0xf0,0xf1,EOT},
{0x01,0x00,0x60,0x00,0x00,0x83,0x00,EOT}},
{0x6, "GPIO",
{0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
0xe9,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,
EOT},
{0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
0x7f,0x00,0x7f,NANA,0x00,0xff,NANA,0x00,0x03,NANA,
EOT}},
{0x7, "VID",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
{0xa, "PME, ACPI",
{0x30,0xf0,0xf1,0xf4,0xf5,EOT},
{0x00,0x00,0x61,0x06,0x3c,EOT}},
Add support for some more Fintek chips and an ALi chip. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2813 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-28 17:39:10 +02:00
{EOT}}},
{0x4105, "F71882FG/F71883FG", { /* Same ID? Datasheet typo? */
Add Fintek F71882FG support (trivial). Tested on actual hardware, the MSI K9AG Neo2-Digital (MS-7368). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3645 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-10 01:56:11 +02:00
/* We assume reserved bits are read as 0. */
{NOLDN, NULL,
{0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
0x2b,0x2c,0x2d,EOT},
{0x05,0x41,0x19,0x34,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x08,0x08,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
{0x1, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x01,0x03,0xf8,0x04,0x00,EOT}},
{0x2, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
{0x4, "Hardware monitor",
{0x30,0x60,0x61,0x70,EOT},
{0x01,0x02,0x95,0x00,EOT}},
{0x5, "Keyboard",
{0x30,0x60,0x61,0x70,0x72,0xf0,EOT},
{0x01,0x00,0x60,0x00,0x00,0x83,EOT}},
{0x6, "GPIO",
{0x70,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,0xd2,0xd3,0xc0,
0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xf0,0xf1,0xf2,
0xf3,EOT},
{0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,
0x0f,NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0xff,NANA,
0x00,EOT}},
{0x7, "VID",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
{0x7, "SPI",
{0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
0xfb,0xfc,0xfd,0xfe,0xff,EOT},
{0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,EOT}},
{0xa, "PME, ACPI",
{0x30,0xf0,0xf1,0xf4,0xf5,EOT},
{0x00,0x00,0x01,0x06,0x1c,EOT}},
Add support for some more Fintek chips and an ALi chip. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2813 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-28 17:39:10 +02:00
{EOT}}},
{0x0604, "F71805F/FG", {
Dump support for the Fintek F71805 (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2808 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-26 17:48:09 +02:00
/* We assume reserved bits are read as 0. */
{NOLDN, NULL,
Drop global register 0x07 for all Super I/Os (trivial). This is useless, as it changes with each access; it doesn't convey any useful information at all. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-14 18:34:38 +02:00
{0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,EOT},
{0x04,0x06,0x19,0x34,0x00,0x00,0x3f,0x08,0x00,EOT}},
Dump support for the Fintek F71805 (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2808 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-26 17:48:09 +02:00
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
{0x1, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x01,0x03,0xf8,0x04,0x00,EOT}},
{0x2, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
{0x4, "Hardware monitor",
{0x30,0x60,0x61,0x70,EOT},
{0x00,0x02,0x95,0x00,EOT}},
{0x6, "GPIO",
{0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
0xe9,0xf0,0xf1,0xf3,0xf4,EOT},
{0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,NANA,0x00,NANA,EOT}},
{0xa, "PME",
{0x30,0xf0,0xf1,EOT},
{0x00,0x00,0x00,EOT}},
Fix up and generalize the ITE IT8708F code. It was only working out of pure luck (and broken code elsewhere). Needs some more fixing. Add more LDN descriptions to various Super I/Os. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21 00:13:48 +02:00
{EOT}}},
Add some more Super I/O IDs/names (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-01 22:16:58 +02:00
{0x0581, "F8000", { /* Fintek/ASUS F8000 */
{EOT}}},
Add support for Fintek F81216D/DG/AD Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-17 10:24:01 +02:00
{0x0802, "F81216D/DG", {
{NOLDN, NULL,
{0x25,0x2f,EOT},
{0x00,RSVD,EOT}},
{0x0, "UART1",
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{NANA,NANA,NANA,NANA,0x00,0x40,EOT}},
{0x1, "UART2",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{NANA,NANA,NANA,NANA,0x00,EOT}},
{0x2, "UART3",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{NANA,NANA,NANA,NANA,0x00,EOT}},
{0x3, "UART4",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{NANA,NANA,NANA,NANA,0x00,EOT}},
{0x8, "WDT",
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x00,NANA,NANA,NANA,NANA,NANA,EOT}},
{EOT}}},
{0x1602, "F81216AD", {
{NOLDN, NULL,
{0x25,0x27,EOT},
{0x00,NANA,EOT}},
{0x0, "UART1",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf4,0xf5,EOT},
{NANA,NANA,NANA,NANA,0x00,0x40,0x00,0x00,EOT}},
{0x1, "UART2",
{0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
{NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
{0x2, "UART3",
{0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
{NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
{0x3, "UART4",
{0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
{NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
{0x8, "WDT",
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x00,NANA,NANA,NANA,NANA,NANA,EOT}},
{EOT}}},
Add detection support for the Fintek F81865/F81865-I. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6024 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 01:34:12 +01:00
{0x0407, "F81865F/F-I", {
superiotool: Add support for Fintek F81865F/F-I register dump. Datasheet: http://www.fintek.com.tw/files/productfiles/F81865_V028P.pdf The code was done by Juha Tuomala <Juha.Tuomala@iki.fi> but he refused to sign it off, or commit it for review. I'll commit it anyway with my sign-off because it does not exceed threshold of originality for any copyright. Change-Id: Id86267f5add539b99229f20bbe339bfb5eb20f8b Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: http://review.coreboot.org/1496 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-09-06 10:38:49 +02:00
{NOLDN, NULL,
util/superiotool: Register fix for Fintek F81865F/F-I Datasheet: http://www.fintek.com.tw/files/productfiles/F81865_V028P.pdf There is a multi-function select register listed as 0x2a-1 and 0x2a-2. These are the original names in the datasheet, but superiotool will display register 0x29 and 0x28 and their values. This patch renames them both to 0x2a and shows both of the default values for them. They are both 0x00, so one of them could be dropped though. Change-Id: Iad91f9e4755d2d1a123e56ab0fa9257be7ea9978 Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com> Reviewed-on: https://review.coreboot.org/5404 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-03-24 09:50:25 +01:00
{0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2a,0x2b,0x2c,0x2d,EOT},
superiotool: Add support for Fintek F81865F/F-I register dump. Datasheet: http://www.fintek.com.tw/files/productfiles/F81865_V028P.pdf The code was done by Juha Tuomala <Juha.Tuomala@iki.fi> but he refused to sign it off, or commit it for review. I'll commit it anyway with my sign-off because it does not exceed threshold of originality for any copyright. Change-Id: Id86267f5add539b99229f20bbe339bfb5eb20f8b Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: http://review.coreboot.org/1496 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-09-06 10:38:49 +02:00
{NANA,0x00,0x07,0x04,0x19,0x34,NANA,NANA,NANA,0x00,0x00,0x00,0x00,0x1f,0x00,0x08,EOT}},
{0x00, "FDC",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
{NANA,0x03,0xf0,NANA,NANA,NANA,NANA,NANA,EOT}},
{0x03, "LPT",
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{NANA,0x03,0x78,NANA,NANA,NANA,EOT}},
{0x04, "HWMON",
{0x30,0x60,0x61,0x70,EOT},
{NANA,0x02,0x95,NANA,EOT}},
{0x05, "KBC",
{0x30,0x60,0x61,0x70,0x72,0xfe,0xf0,EOT},
{NANA,0x00,0x60,NANA,NANA,NANA,0x71,EOT}},
{0x06, "GPIO",
{0x30,0x60,0x61,0x70,0xf1,0xf2,0xf3,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xe0,0xe1,0xe2,0xe3,0xef,0xd0,0xd1,0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,0x90,0x91,0x92,0x93,EOT},
{NANA,0x00,0x60,NANA,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,NANA,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,NANA,NANA,NANA,NANA,EOT}},
{0x07, "WDT",
{0x30,0x60,0x61,0xf5,0xf6,0xfa,EOT},
{NANA,0x00,0x00,0x00,0x00,NANA,EOT}},
{0x08, "SPI",
{0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,0xfb,0xfc,0xfd,0xfe,0xff,EOT},
{0x10,0x04,NANA,NANA,0x00,0x00,NANA,NANA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
{0x0a, "PME & ACPI",
{0x30,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,EOT},
{NANA,NANA,NANA,NANA,NANA,0x06,NANA,0x00,EOT}},
{0x0b, "RTC",
{0x30,0x60,0x61,0x70,EOT},
{NANA,0x00,0x00,NANA,EOT}},
{0x10, "UART1",
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
{NANA,0x03,0xf8,NANA,NANA,NANA,0x00,0x00,EOT}},
{0x11, "UART2",
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
{NANA,0x02,0xf8,NANA,NANA,NANA,0x00,0x00,EOT}},
{0x12, "UART3",
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
{NANA,0x03,0xe8,NANA,NANA,NANA,0x00,0x00,EOT}},
{0x13, "UART4",
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
{NANA,0x02,0xe8,NANA,NANA,NANA,0x00,0x00,EOT}},
{0x14, "UART5",
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
{NANA,0x00,0x00,NANA,NANA,NANA,0x00,0x00,EOT}},
{0x15, "UART6",
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
{NANA,0x00,0x00,NANA,NANA,NANA,0x00,0x00,EOT}},
Add detection support for the Fintek F81865/F81865-I. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6024 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 01:34:12 +01:00
{EOT}}},
util/superiotool: detect Fintek F81866, F8196* F81866 detection tested with the iBASE SI-613: superiotool r4.9-420-g034e5e6 Found Fintek F81866 (vid=0x3419, id=0x1010) at 0x4e F8196* detection is based on chip IDs provided by iBASE, but untested. Change-Id: I7210e1523a188a8593cd03547bb0c95cd3e7aa39 Signed-off-by: Kyle Stevenson <kstevenson@comqi.com> Reviewed-on: https://review.coreboot.org/c/31052 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-23 16:55:33 +01:00
{0x1010, "F81866", {
{EOT}}},
{0x0215, "F81962/F81964/F81966/F81967", {
{EOT}}},
Fix up and generalize the ITE IT8708F code. It was only working out of pure luck (and broken code elsewhere). Needs some more fixing. Add more LDN descriptions to various Super I/Os. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21 00:13:48 +02:00
{EOT}
};
util/superiotool: Add support for Fintek F71808A Default values taken from the datasheet and from the dump of an uninitialized F71808A on a Sapphire Pure Platinum H61. Both the control registers and the HWM configuration registers are added. Change-Id: Ia6e2a7c13a5086d19ebdb426f2f975b43220a273 Signed-off-by: Nicola Corna <nicola@corna.info> Reviewed-on: https://review.coreboot.org/18562 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-02-28 23:45:42 +01:00
static const struct superio_registers hwm_table[] = {
{0x0110, "F71808A", {
{NOLDN, NULL,
{0x01, 0x02, 0x03, 0x08, 0x0a, 0x0b, 0x0c, 0x0d,
0x0f,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
/* 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, */
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
0x60, 0x61, 0x62, 0x63, 0x64, 0x66, 0x6b, 0x6c,
0x6d, 0x6f, 0x7f,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x98,
0x9b, 0x9c, 0x9e, 0x9f,
0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xec, 0xed, 0xee,
0xef, EOT},
{0x03, 0x00, 0x01, 0x4c, 0x00, 0x00, 0x55, 0x00,
0x20,
NANA, NANA, NANA, NANA, RSVD, RSVD, RSVD, NANA,
NANA, RSVD, RSVD, RSVD, RSVD, NANA, NANA, NANA,
/* RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD,
RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, */
0x44, 0x00, NANA, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x06, 0x40,
0x04, 0x00, 0x00,
RSVD, RSVD, NANA, RSVD, NANA, RSVD, RSVD, RSVD,
NANA, NANA, NANA, NANA, NANA, RSVD, RSVD,
RSVD, RSVD, NANA, NANA, NANA, NANA, RSVD, RSVD,
RSVD, RSVD, RSVD, RSVD, RSVD, RSVD,
0x00, NANA, NANA, 0x00, 0x2e, 0xff, 0x05, 0x44,
0x05, 0x55, 0x66, 0x00,
0x03, 0xff, 0x00, 0x83, 0x03, 0xff, 0x3c, 0x32,
0x28, 0x1e, 0xff, 0xd9, 0xb2, 0x99, 0x80, 0x1d,
0x0c, 0x25, 0x00, 0x80, 0x03, 0xff, 0x3c, 0x32,
0x28, 0x1e, 0xff, 0xd9, 0xb2, 0x99, 0x80, 0x1e,
0x0f, 0xff, RSVD, 0x7f, RSVD, RSVD, RSVD, RSVD,
RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, 0x00,
NANA, NANA, NANA, NANA, NANA, 0x00, 0x01, 0x01,
0x00, EOT}},
{EOT}}},
{EOT}
};
Split out enter_conf_mode_*()/exit_conf_mode_() functions, we'll soon need them. Reduce code duplication a bit by improved 'no dump available' handling. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 02:48:42 +02:00
void probe_idregs_fintek(uint16_t port)
{
util/superiotool: Add support for Fintek F71808A Default values taken from the datasheet and from the dump of an uninitialized F71808A on a Sapphire Pure Platinum H61. Both the control registers and the HWM configuration registers are added. Change-Id: Ia6e2a7c13a5086d19ebdb426f2f975b43220a273 Signed-off-by: Nicola Corna <nicola@corna.info> Reviewed-on: https://review.coreboot.org/18562 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-02-28 23:45:42 +01:00
uint16_t vid, did, hwmport;
Split out enter_conf_mode_*()/exit_conf_mode_() functions, we'll soon need them. Reduce code duplication a bit by improved 'no dump available' handling. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 02:48:42 +02:00
* Convert the NSC code to the common code structure all other Super I/Os use. * Improve the --verbose output a bit more. Print the "Probing..." text for all Super I/Os and if a Super I/O is not known, show the data we were able to read from the chip (what data this is is very vendor/chip specific). * Thus the common no_superio_found() is dropped, it's not useful. The "read from 0x20" part was wrong for all Super I/Os other than the NSC ones anyway. * Winbond: For the 'olddevid' only use bits 3..0, mask away the others. * SMSC: Print which ID registers we try to read (in --verbose mode). * Minor cosmetic fixes. * Rename PC8374 to PC8374L (as per datasheet). * Rename probe_idregs_simple() to probe_idregs_nsc(). * Rename dump_readable_ns8374() to dump_readable_pc8374l(). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2821 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04 17:23:38 +02:00
probing_for("Fintek", "", port);
Decouple the ITE code from fintek.c, it doesn't belong there. Add common 'enter configuration mode' function for most Winbond/Fintek/ITE chips which use the 0x87 0x87 sequence for that reason. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2794 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21 01:37:56 +02:00
enter_conf_mode_winbond_fintek_ite_8787(port);
Split up superiotool.c into multiple source files, one per vendor. As there will be lots more supported Super I/Os soon, the file is really getting way too big... Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16 20:11:03 +02:00
Fix up and generalize the ITE IT8708F code. It was only working out of pure luck (and broken code elsewhere). Needs some more fixing. Add more LDN descriptions to various Super I/Os. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21 00:13:48 +02:00
did = regval(port, DEVICE_ID_BYTE1_REG);
did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
vid = regval(port, VENDOR_ID_BYTE1_REG);
vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
Minor fixes/improvements in the Fintek code (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2802 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-23 15:17:29 +02:00
if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
* Convert the NSC code to the common code structure all other Super I/Os use. * Improve the --verbose output a bit more. Print the "Probing..." text for all Super I/Os and if a Super I/O is not known, show the data we were able to read from the chip (what data this is is very vendor/chip specific). * Thus the common no_superio_found() is dropped, it's not useful. The "read from 0x20" part was wrong for all Super I/Os other than the NSC ones anyway. * Winbond: For the 'olddevid' only use bits 3..0, mask away the others. * SMSC: Print which ID registers we try to read (in --verbose mode). * Minor cosmetic fixes. * Rename PC8374 to PC8374L (as per datasheet). * Rename probe_idregs_simple() to probe_idregs_nsc(). * Rename dump_readable_ns8374() to dump_readable_pc8374l(). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2821 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04 17:23:38 +02:00
if (verbose)
printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
Decouple the ITE code from fintek.c, it doesn't belong there. Add common 'enter configuration mode' function for most Winbond/Fintek/ITE chips which use the 0x87 0x87 sequence for that reason. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2794 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21 01:37:56 +02:00
exit_conf_mode_winbond_fintek_ite_8787(port);
Fix up and generalize the ITE IT8708F code. It was only working out of pure luck (and broken code elsewhere). Needs some more fixing. Add more LDN descriptions to various Super I/Os. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21 00:13:48 +02:00
return;
}
* Convert the NSC code to the common code structure all other Super I/Os use. * Improve the --verbose output a bit more. Print the "Probing..." text for all Super I/Os and if a Super I/O is not known, show the data we were able to read from the chip (what data this is is very vendor/chip specific). * Thus the common no_superio_found() is dropped, it's not useful. The "read from 0x20" part was wrong for all Super I/Os other than the NSC ones anyway. * Winbond: For the 'olddevid' only use bits 3..0, mask away the others. * SMSC: Print which ID registers we try to read (in --verbose mode). * Minor cosmetic fixes. * Rename PC8374 to PC8374L (as per datasheet). * Rename probe_idregs_simple() to probe_idregs_nsc(). * Rename dump_readable_ns8374() to dump_readable_pc8374l(). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2821 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04 17:23:38 +02:00
printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
util/superiotool: Add initial support for Fintek F71869ED. Datasheet: http://www.fintek.com.tw/files/productfiles/F71869_V1.1.pdf Practically the same as F71869AD, just another ID (0x1408). Tested on actual hardware, Jetway NC9C-550-LF. Update: Fixed F71869ED based on the proper datasheet: http://www.alldatasheet.com/datasheet-pdf/pdf/459075/FINTEK/F71869ED.html Change-Id: I5da858565ca16ba4d73b47b42fadd31dabbc290b Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com> Reviewed-on: http://review.coreboot.org/5380 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-03-12 11:19:31 +01:00
get_superio_name(reg_table, did), vid, did, port);
Print a short message if no Super I/O chip could be detected (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2835 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 22:01:23 +02:00
chip_found = 1;
Split up superiotool.c into multiple source files, one per vendor. As there will be lots more supported Super I/Os soon, the file is really getting way too big... Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16 20:11:03 +02:00
The Winbond Super I/O chips have another indirection of registers. The hwmon has generic registers and banked registers, mostly temperature handling, and SMI/GPIO stuff. Not all LDNs are switched via register offset 0x07, make it a parameter. Add support for dumping the hardware monitor of Winbond W83627THF/THG parts with the -e option. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-01 15:18:57 +01:00
dump_superio("Fintek", reg_table, port, did, LDN_SEL);
Split up superiotool.c into multiple source files, one per vendor. As there will be lots more supported Super I/Os soon, the file is really getting way too big... Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16 20:11:03 +02:00
util/superiotool: Add support for Fintek F71808A Default values taken from the datasheet and from the dump of an uninitialized F71808A on a Sapphire Pure Platinum H61. Both the control registers and the HWM configuration registers are added. Change-Id: Ia6e2a7c13a5086d19ebdb426f2f975b43220a273 Signed-off-by: Nicola Corna <nicola@corna.info> Reviewed-on: https://review.coreboot.org/18562 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-02-28 23:45:42 +01:00
if (extra_dump) {
regwrite(port, LDN_SEL, 0x04); /* Select LDN 4 (HWM). */
/* Get HWM base address (stored in LDN 4, index 0x60/0x61). */
hwmport = regval(port, 0x60) << 8;
hwmport |= regval(port, 0x61);
printf("Hardware monitor (0x%04x)\n", hwmport);
dump_superio("Fintek-HWM", hwm_table, hwmport, did, LDN_SEL);
}
Decouple the ITE code from fintek.c, it doesn't belong there. Add common 'enter configuration mode' function for most Winbond/Fintek/ITE chips which use the 0x87 0x87 sequence for that reason. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2794 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21 01:37:56 +02:00
exit_conf_mode_winbond_fintek_ite_8787(port);
Split up superiotool.c into multiple source files, one per vendor. As there will be lots more supported Super I/Os soon, the file is really getting way too big... Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16 20:11:03 +02:00
}
Add new --list-supported switch for printing the list of Super I/Os supported by superiotool (closes #91). Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3050 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-15 23:30:55 +01:00
Add support for Fintek F81216D/DG/AD Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-17 10:24:01 +02:00
void probe_idregs_fintek_alternative(uint16_t port)
{
uint16_t vid, did;
probing_for("Fintek", "", port);
enter_conf_mode_fintek_7777(port);
did = regval(port, DEVICE_ID_BYTE1_REG);
did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
vid = regval(port, VENDOR_ID_BYTE1_REG);
vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
if (verbose)
printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
exit_conf_mode_fintek_7777(port);
return;
}
printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
util/superiotool: Add initial support for Fintek F71869ED. Datasheet: http://www.fintek.com.tw/files/productfiles/F71869_V1.1.pdf Practically the same as F71869AD, just another ID (0x1408). Tested on actual hardware, Jetway NC9C-550-LF. Update: Fixed F71869ED based on the proper datasheet: http://www.alldatasheet.com/datasheet-pdf/pdf/459075/FINTEK/F71869ED.html Change-Id: I5da858565ca16ba4d73b47b42fadd31dabbc290b Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com> Reviewed-on: http://review.coreboot.org/5380 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-03-12 11:19:31 +01:00
get_superio_name(reg_table, did), vid, did, port);
Add support for Fintek F81216D/DG/AD Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-17 10:24:01 +02:00
chip_found = 1;
dump_superio("Fintek", reg_table, port, did, LDN_SEL);
exit_conf_mode_fintek_7777(port);
}
Add new --list-supported switch for printing the list of Super I/Os supported by superiotool (closes #91). Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3050 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-15 23:30:55 +01:00
void print_fintek_chips(void)
{
print_vendor_chips("Fintek", reg_table);
}