2009-08-12 17:00:51 +02:00
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##
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2010-01-20 19:44:30 +01:00
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## This file is part of the coreboot project.
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2009-08-12 17:00:51 +02:00
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##
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2012-08-23 09:32:58 +02:00
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## Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
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2010-01-20 19:44:30 +01:00
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## Copyright (C) 2009-2010 coresystems GmbH
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2009-08-12 17:00:51 +02:00
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##
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2010-01-20 19:44:30 +01:00
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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2009-08-12 17:00:51 +02:00
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##
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2012-04-12 22:00:03 +02:00
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mainmenu "coreboot configuration"
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2009-08-12 17:00:51 +02:00
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2009-10-05 15:55:28 +02:00
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menu "General setup"
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2009-10-18 20:35:50 +02:00
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config EXPERT
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bool "Expert mode"
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help
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This allows you to select certain advanced configuration options.
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Warning: Only enable this option if you really know what you are
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doing! You have been warned!
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2009-10-05 15:55:28 +02:00
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config LOCALVERSION
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2009-10-07 18:15:40 +02:00
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string "Local version string"
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2009-10-05 15:55:28 +02:00
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help
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Append an extra string to the end of the coreboot version.
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2009-10-07 18:15:40 +02:00
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This can be useful if, for instance, you want to append the
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respective board's hostname or some other identifying string to
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the coreboot version number, so that you can easily distinguish
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boot logs of different boards from each other.
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2010-02-09 20:35:16 +01:00
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config CBFS_PREFIX
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string "CBFS prefix to use"
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default "fallback"
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help
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Select the prefix to all files put into the image. It's "fallback"
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by default, "normal" is a common alternative.
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2010-03-16 02:17:19 +01:00
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choice
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2012-04-12 22:00:03 +02:00
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prompt "Compiler to use"
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2010-03-16 02:17:19 +01:00
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default COMPILER_GCC
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help
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This option allows you to select the compiler used for building
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coreboot.
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config COMPILER_GCC
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bool "GCC"
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2012-04-12 22:00:03 +02:00
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help
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Use the GNU Compiler Collection (GCC) to build coreboot.
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For details see http://gcc.gnu.org.
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2010-03-16 02:17:19 +01:00
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config COMPILER_LLVM_CLANG
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bool "LLVM/clang"
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2012-04-12 22:00:03 +02:00
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help
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Use LLVM/clang to build coreboot.
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For details see http://clang.llvm.org.
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2010-03-16 02:17:19 +01:00
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endchoice
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2010-03-14 22:25:03 +01:00
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config SCANBUILD_ENABLE
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2012-04-12 22:00:03 +02:00
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bool "Build with scan-build for static code analysis"
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2010-03-14 22:25:03 +01:00
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default n
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help
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2012-04-12 22:00:03 +02:00
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Changes the build process to use scan-build (a utility for
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running the clang static code analyzer from the command line).
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Requires the scan-build utility in your system $PATH.
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For details see http://clang-analyzer.llvm.org/scan-build.html.
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2010-03-14 22:25:03 +01:00
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config SCANBUILD_REPORT_LOCATION
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2012-04-12 22:00:03 +02:00
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string "Directory for the scan-build report(s)"
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2010-03-14 22:25:03 +01:00
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default ""
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depends on SCANBUILD_ENABLE
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help
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2012-04-12 22:00:03 +02:00
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Directory where the scan-build reports should be stored in. The
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reports are stored in subdirectories of the form 'yyyy-mm-dd-*'
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in the specified directory.
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If this setting is left empty, the coreboot top-level directory
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will be used to store the report subdirectories.
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2010-03-14 22:25:03 +01:00
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2010-03-25 22:45:25 +01:00
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config CCACHE
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2012-04-12 22:00:03 +02:00
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bool "Use ccache to speed up (re)compilation"
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2010-03-25 22:45:25 +01:00
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default n
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help
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Enables the use of ccache for faster builds.
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2012-04-12 22:00:03 +02:00
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Requires the ccache utility in your system $PATH.
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For details see https://ccache.samba.org.
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2010-03-25 22:45:25 +01:00
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2010-08-09 15:28:18 +02:00
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config SCONFIG_GENPARSER
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bool "Generate SCONFIG parser using flex and bison"
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default n
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depends on EXPERT
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help
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2012-04-12 22:00:03 +02:00
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Enable this option if you are working on the sconfig device tree
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parser and made changes to sconfig.l and sconfig.y.
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2010-08-09 15:28:18 +02:00
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Otherwise, say N.
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2010-05-19 20:41:15 +02:00
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config USE_OPTION_TABLE
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bool "Use CMOS for configuration values"
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default n
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2010-07-06 23:05:04 +02:00
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depends on HAVE_OPTION_TABLE
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2010-05-19 20:41:15 +02:00
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help
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Enable this option if coreboot shall read options from the "CMOS"
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2012-04-12 22:00:03 +02:00
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NVRAM instead of using hard-coded values.
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2010-05-19 20:41:15 +02:00
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2011-05-02 21:53:04 +02:00
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config COMPRESS_RAMSTAGE
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bool "Compress ramstage with LZMA"
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default y
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help
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Compress ramstage to save memory in the flash image. Note
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that decompression might slow down booting if the boot flash
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2012-04-12 22:00:03 +02:00
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is connected through a slow link (i.e. SPI).
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2011-05-02 21:53:04 +02:00
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2011-06-19 03:03:28 +02:00
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config INCLUDE_CONFIG_FILE
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2012-04-12 22:00:03 +02:00
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bool "Include the coreboot .config file into the ROM image"
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2011-06-19 03:03:28 +02:00
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default y
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2012-04-12 22:00:03 +02:00
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help
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Include the .config file that was used to compile coreboot
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in the (CBFS) ROM image. This is useful if you want to know which
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options were used to build a specific coreboot.rom image.
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Saying Y here will increase the image size by 2-3kB.
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You can use the following command to easily list the options:
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grep -a CONFIG_ coreboot.rom
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Alternatively, you can also use cbfstool to print the image
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contents (including the raw 'config' item we're looking for).
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Example:
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$ cbfstool coreboot.rom print
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coreboot.rom: 4096 kB, bootblocksize 1008, romsize 4194304,
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offset 0x0
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Alignment: 64 bytes
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2012-05-18 19:18:47 +02:00
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2012-04-12 22:00:03 +02:00
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Name Offset Type Size
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cmos_layout.bin 0x0 cmos layout 1159
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fallback/romstage 0x4c0 stage 339756
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fallback/coreboot_ram 0x53440 stage 186664
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fallback/payload 0x80dc0 payload 51526
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config 0x8d740 raw 3324
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(empty) 0x8e480 null 3610440
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2011-06-19 03:03:28 +02:00
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2011-09-21 01:46:46 +02:00
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config EARLY_CBMEM_INIT
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bool "Initialize CBMEM while in ROM stage"
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default n
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help
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2012-04-12 22:00:03 +02:00
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Make coreboot initialize the cbmem structures while running in ROM
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stage. This could be useful when the ROM stage wants to communicate
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2011-09-21 01:46:46 +02:00
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some, for instance, execution timestamps.
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2011-09-21 23:46:43 +02:00
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config COLLECT_TIMESTAMPS
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bool "Create a table of timestamps collected during boot"
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depends on EARLY_CBMEM_INIT
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help
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2012-04-12 22:00:03 +02:00
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Make coreboot create a table of timer-ID/timer-value pairs to
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allow measuring time spent at different phases of the boot process.
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2012-04-30 21:06:10 +02:00
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config USE_BLOBS
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bool "Allow use of binary-only repository"
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default n
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help
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This draws in the blobs repository, which contains binary files that
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might be required for some chipsets or boards.
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This flag ensures that a "Free" option remains available for users.
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config REQUIRES_BLOB
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bool
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default n
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help
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This option can be configured by boards that require the blobs
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repository for the default configuration. It will make the build
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fail if USE_BLOBS is disabled. Users that still desire to do a
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coreboot build for such a board can override this manually, but
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this option serves as warning that it might fail.
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2009-10-05 15:55:28 +02:00
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endmenu
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2009-08-12 17:00:51 +02:00
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source src/mainboard/Kconfig
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2010-12-17 00:37:17 +01:00
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# This option is used to set the architecture of a mainboard to X86.
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# It is usually set in mainboard/*/Kconfig.
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config ARCH_X86
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bool
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default n
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if ARCH_X86
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2010-12-11 21:33:41 +01:00
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source src/arch/x86/Kconfig
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2010-12-17 00:37:17 +01:00
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endif
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Add kconfig menus for most chipset VIDEO_MB values.
VIDEO_MB is a variable that defines how many MB of RAM will be used
for onboard graphics frame buffer. It's northbridge-dependent which
values for CONFIG_MB are valid (but not board-dependent).
This patch adds choices for menuconfig to select the VIDEO_MB value for:
- Intel 82810
- Intel 82830
- VIA CN400
- VIA CN700
Note: CN400 and CN700 are based on the CX700 datasheet, not sure if they're
correct. If somebody has CN400 and CN700 datasheets, please verify.
We drop all per-board VIDEO_MB variables in per-board Kconfig files as
there's a northbridge-specific option/default now (plus the user can override
the value if needed in menuconfig).
As CONFIG_MB is chipset-specific but not board-specific (and never was), filter
it in util/compareboard/compareboard, we don't need to match those values.
Finally, put "CPU", "Northbridge", "Southbridge", "Super I/O", and
"Devices" sections into the "Chipset" menu, where NB-specific
options will appear if you select a board using a certain NB,
SB-specific options would appear in the "Southbridge" section etc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26 22:42:13 +01:00
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menu "Chipset"
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comment "CPU"
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source src/cpu/Kconfig
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comment "Northbridge"
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2009-08-12 17:00:51 +02:00
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source src/northbridge/Kconfig
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Add kconfig menus for most chipset VIDEO_MB values.
VIDEO_MB is a variable that defines how many MB of RAM will be used
for onboard graphics frame buffer. It's northbridge-dependent which
values for CONFIG_MB are valid (but not board-dependent).
This patch adds choices for menuconfig to select the VIDEO_MB value for:
- Intel 82810
- Intel 82830
- VIA CN400
- VIA CN700
Note: CN400 and CN700 are based on the CX700 datasheet, not sure if they're
correct. If somebody has CN400 and CN700 datasheets, please verify.
We drop all per-board VIDEO_MB variables in per-board Kconfig files as
there's a northbridge-specific option/default now (plus the user can override
the value if needed in menuconfig).
As CONFIG_MB is chipset-specific but not board-specific (and never was), filter
it in util/compareboard/compareboard, we don't need to match those values.
Finally, put "CPU", "Northbridge", "Southbridge", "Super I/O", and
"Devices" sections into the "Chipset" menu, where NB-specific
options will appear if you select a board using a certain NB,
SB-specific options would appear in the "Southbridge" section etc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26 22:42:13 +01:00
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comment "Southbridge"
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2009-08-12 17:00:51 +02:00
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source src/southbridge/Kconfig
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Add kconfig menus for most chipset VIDEO_MB values.
VIDEO_MB is a variable that defines how many MB of RAM will be used
for onboard graphics frame buffer. It's northbridge-dependent which
values for CONFIG_MB are valid (but not board-dependent).
This patch adds choices for menuconfig to select the VIDEO_MB value for:
- Intel 82810
- Intel 82830
- VIA CN400
- VIA CN700
Note: CN400 and CN700 are based on the CX700 datasheet, not sure if they're
correct. If somebody has CN400 and CN700 datasheets, please verify.
We drop all per-board VIDEO_MB variables in per-board Kconfig files as
there's a northbridge-specific option/default now (plus the user can override
the value if needed in menuconfig).
As CONFIG_MB is chipset-specific but not board-specific (and never was), filter
it in util/compareboard/compareboard, we don't need to match those values.
Finally, put "CPU", "Northbridge", "Southbridge", "Super I/O", and
"Devices" sections into the "Chipset" menu, where NB-specific
options will appear if you select a board using a certain NB,
SB-specific options would appear in the "Southbridge" section etc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26 22:42:13 +01:00
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comment "Super I/O"
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2009-08-12 17:00:51 +02:00
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source src/superio/Kconfig
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2011-01-27 12:43:03 +01:00
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comment "Embedded Controllers"
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source src/ec/Kconfig
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Add kconfig menus for most chipset VIDEO_MB values.
VIDEO_MB is a variable that defines how many MB of RAM will be used
for onboard graphics frame buffer. It's northbridge-dependent which
values for CONFIG_MB are valid (but not board-dependent).
This patch adds choices for menuconfig to select the VIDEO_MB value for:
- Intel 82810
- Intel 82830
- VIA CN400
- VIA CN700
Note: CN400 and CN700 are based on the CX700 datasheet, not sure if they're
correct. If somebody has CN400 and CN700 datasheets, please verify.
We drop all per-board VIDEO_MB variables in per-board Kconfig files as
there's a northbridge-specific option/default now (plus the user can override
the value if needed in menuconfig).
As CONFIG_MB is chipset-specific but not board-specific (and never was), filter
it in util/compareboard/compareboard, we don't need to match those values.
Finally, put "CPU", "Northbridge", "Southbridge", "Super I/O", and
"Devices" sections into the "Chipset" menu, where NB-specific
options will appear if you select a board using a certain NB,
SB-specific options would appear in the "Southbridge" section etc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26 22:42:13 +01:00
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endmenu
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2009-08-12 17:00:51 +02:00
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2012-11-14 02:00:01 +01:00
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source src/devices/Kconfig
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2010-05-16 17:31:53 +02:00
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menu "Generic Drivers"
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source src/drivers/Kconfig
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endmenu
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2009-08-12 17:00:51 +02:00
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config HEAP_SIZE
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hex
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2009-10-16 21:12:49 +02:00
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default 0x4000
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2009-08-12 17:00:51 +02:00
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|
|
|
|
config MAX_CPUS
|
|
|
|
|
int
|
|
|
|
|
default 1
|
|
|
|
|
|
|
|
|
|
config MMCONF_SUPPORT_DEFAULT
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
config MMCONF_SUPPORT
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
source src/console/Kconfig
|
|
|
|
|
|
2011-04-27 01:47:04 +02:00
|
|
|
# This should default to N and be set by SuperI/O drivers that have an UART
|
|
|
|
|
config HAVE_UART_IO_MAPPED
|
|
|
|
|
bool
|
|
|
|
|
default y
|
|
|
|
|
|
|
|
|
|
config HAVE_UART_MEMORY_MAPPED
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
2009-08-12 17:00:51 +02:00
|
|
|
config HAVE_ACPI_RESUME
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
2010-06-05 12:03:08 +02:00
|
|
|
config HAVE_ACPI_SLIC
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
2009-08-12 17:00:51 +02:00
|
|
|
config ACPI_SSDTX_NUM
|
|
|
|
|
int
|
|
|
|
|
default 0
|
|
|
|
|
|
|
|
|
|
config HAVE_HARD_RESET
|
|
|
|
|
bool
|
2009-10-09 13:47:21 +02:00
|
|
|
default n
|
2010-02-27 09:39:04 +01:00
|
|
|
help
|
|
|
|
|
This variable specifies whether a given board has a hard_reset
|
|
|
|
|
function, no matter if it's provided by board code or chipset code.
|
|
|
|
|
|
2009-08-12 17:00:51 +02:00
|
|
|
config HAVE_INIT_TIMER
|
|
|
|
|
bool
|
2010-01-04 21:09:27 +01:00
|
|
|
default n if UDELAY_IO
|
2009-10-26 16:14:07 +01:00
|
|
|
default y
|
2009-08-12 17:00:51 +02:00
|
|
|
|
2012-04-13 07:42:15 +02:00
|
|
|
config HIGH_SCRATCH_MEMORY_SIZE
|
|
|
|
|
hex
|
|
|
|
|
default 0x0
|
|
|
|
|
|
2010-07-06 23:05:04 +02:00
|
|
|
config USE_OPTION_TABLE
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
2009-08-12 17:00:51 +02:00
|
|
|
config HAVE_OPTION_TABLE
|
|
|
|
|
bool
|
2010-07-06 23:05:04 +02:00
|
|
|
default n
|
2009-10-15 19:49:07 +02:00
|
|
|
help
|
|
|
|
|
This variable specifies whether a given board has a cmos.layout
|
|
|
|
|
file containing NVRAM/CMOS bit definitions.
|
2010-07-06 23:05:04 +02:00
|
|
|
It defaults to 'n' but can be selected in mainboard/*/Kconfig.
|
2009-08-12 17:00:51 +02:00
|
|
|
|
|
|
|
|
config PIRQ_ROUTE
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
config HAVE_SMI_HANDLER
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
config PCI_IO_CFG_EXT
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
config IOAPIC
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
2012-08-16 23:05:42 +02:00
|
|
|
config CBFS_SIZE
|
|
|
|
|
hex
|
|
|
|
|
default ROM_SIZE
|
|
|
|
|
|
|
|
|
|
config CACHE_ROM_SIZE
|
|
|
|
|
hex
|
|
|
|
|
default CBFS_SIZE
|
|
|
|
|
|
Add kconfig menus for most chipset VIDEO_MB values.
VIDEO_MB is a variable that defines how many MB of RAM will be used
for onboard graphics frame buffer. It's northbridge-dependent which
values for CONFIG_MB are valid (but not board-dependent).
This patch adds choices for menuconfig to select the VIDEO_MB value for:
- Intel 82810
- Intel 82830
- VIA CN400
- VIA CN700
Note: CN400 and CN700 are based on the CX700 datasheet, not sure if they're
correct. If somebody has CN400 and CN700 datasheets, please verify.
We drop all per-board VIDEO_MB variables in per-board Kconfig files as
there's a northbridge-specific option/default now (plus the user can override
the value if needed in menuconfig).
As CONFIG_MB is chipset-specific but not board-specific (and never was), filter
it in util/compareboard/compareboard, we don't need to match those values.
Finally, put "CPU", "Northbridge", "Southbridge", "Super I/O", and
"Devices" sections into the "Chipset" menu, where NB-specific
options will appear if you select a board using a certain NB,
SB-specific options would appear in the "Southbridge" section etc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26 22:42:13 +01:00
|
|
|
# TODO: Can probably be removed once all chipsets have kconfig options for it.
|
2009-10-04 19:15:39 +02:00
|
|
|
config VIDEO_MB
|
|
|
|
|
int
|
Add kconfig menus for most chipset VIDEO_MB values.
VIDEO_MB is a variable that defines how many MB of RAM will be used
for onboard graphics frame buffer. It's northbridge-dependent which
values for CONFIG_MB are valid (but not board-dependent).
This patch adds choices for menuconfig to select the VIDEO_MB value for:
- Intel 82810
- Intel 82830
- VIA CN400
- VIA CN700
Note: CN400 and CN700 are based on the CX700 datasheet, not sure if they're
correct. If somebody has CN400 and CN700 datasheets, please verify.
We drop all per-board VIDEO_MB variables in per-board Kconfig files as
there's a northbridge-specific option/default now (plus the user can override
the value if needed in menuconfig).
As CONFIG_MB is chipset-specific but not board-specific (and never was), filter
it in util/compareboard/compareboard, we don't need to match those values.
Finally, put "CPU", "Northbridge", "Southbridge", "Super I/O", and
"Devices" sections into the "Chipset" menu, where NB-specific
options will appear if you select a board using a certain NB,
SB-specific options would appear in the "Southbridge" section etc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26 22:42:13 +01:00
|
|
|
default 0
|
2009-10-04 19:15:39 +02:00
|
|
|
|
2009-09-22 20:49:08 +02:00
|
|
|
config USE_WATCHDOG_ON_BOOT
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
config VGA
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
Build board-specific VGA code.
|
|
|
|
|
|
|
|
|
|
config GFXUMA
|
|
|
|
|
bool
|
2009-10-26 16:14:07 +01:00
|
|
|
default n
|
2009-09-22 20:49:08 +02:00
|
|
|
help
|
|
|
|
|
Enable Unified Memory Architecture for graphics.
|
|
|
|
|
|
2009-10-15 15:35:47 +02:00
|
|
|
config HAVE_ACPI_TABLES
|
|
|
|
|
bool
|
2009-10-15 19:49:07 +02:00
|
|
|
help
|
|
|
|
|
This variable specifies whether a given board has ACPI table support.
|
|
|
|
|
It is usually set in mainboard/*/Kconfig.
|
|
|
|
|
Whether or not the ACPI tables are actually generated by coreboot
|
|
|
|
|
is configurable by the user via GENERATE_ACPI_TABLES.
|
2009-10-15 15:35:47 +02:00
|
|
|
|
|
|
|
|
config HAVE_MP_TABLE
|
|
|
|
|
bool
|
2009-10-15 19:49:07 +02:00
|
|
|
help
|
|
|
|
|
This variable specifies whether a given board has MP table support.
|
|
|
|
|
It is usually set in mainboard/*/Kconfig.
|
|
|
|
|
Whether or not the MP table is actually generated by coreboot
|
|
|
|
|
is configurable by the user via GENERATE_MP_TABLE.
|
2009-10-15 15:35:47 +02:00
|
|
|
|
|
|
|
|
config HAVE_PIRQ_TABLE
|
|
|
|
|
bool
|
2009-10-15 19:49:07 +02:00
|
|
|
help
|
|
|
|
|
This variable specifies whether a given board has PIRQ table support.
|
|
|
|
|
It is usually set in mainboard/*/Kconfig.
|
|
|
|
|
Whether or not the PIRQ table is actually generated by coreboot
|
|
|
|
|
is configurable by the user via GENERATE_PIRQ_TABLE.
|
2009-10-15 15:35:47 +02:00
|
|
|
|
2012-08-23 09:32:58 +02:00
|
|
|
config MAX_PIRQ_LINKS
|
|
|
|
|
int
|
|
|
|
|
default 4
|
|
|
|
|
help
|
|
|
|
|
This variable specifies the number of PIRQ interrupt links which are
|
|
|
|
|
routable. On most chipsets, this is 4, INTA through INTD. Some
|
|
|
|
|
chipsets offer more than four links, commonly up to INTH. They may
|
|
|
|
|
also have a separate link for ATA or IOAPIC interrupts. When the PIRQ
|
|
|
|
|
table specifies links greater than 4, pirq_route_irqs will not
|
|
|
|
|
function properly, unless this variable is correctly set.
|
|
|
|
|
|
2009-10-26 16:14:07 +01:00
|
|
|
#These Options are here to avoid "undefined" warnings.
|
|
|
|
|
#The actual selection and help texts are in the following menu.
|
|
|
|
|
|
|
|
|
|
config GENERATE_ACPI_TABLES
|
2009-10-15 15:35:47 +02:00
|
|
|
bool
|
2009-10-26 16:14:07 +01:00
|
|
|
default HAVE_ACPI_TABLES
|
2009-10-15 15:35:47 +02:00
|
|
|
|
2009-10-26 16:14:07 +01:00
|
|
|
config GENERATE_MP_TABLE
|
|
|
|
|
bool
|
2012-08-24 23:21:44 +02:00
|
|
|
default HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
|
2009-09-22 20:49:08 +02:00
|
|
|
|
2009-10-26 16:14:07 +01:00
|
|
|
config GENERATE_PIRQ_TABLE
|
2009-09-22 20:49:08 +02:00
|
|
|
bool
|
2009-10-26 16:14:07 +01:00
|
|
|
default HAVE_PIRQ_TABLE
|
|
|
|
|
|
2011-08-14 20:56:34 +02:00
|
|
|
config GENERATE_SMBIOS_TABLES
|
|
|
|
|
bool
|
|
|
|
|
default y
|
|
|
|
|
|
2009-10-26 16:14:07 +01:00
|
|
|
menu "System tables"
|
2009-09-22 20:49:08 +02:00
|
|
|
|
2009-10-15 15:35:47 +02:00
|
|
|
config WRITE_HIGH_TABLES
|
2009-09-22 20:49:08 +02:00
|
|
|
bool "Write 'high' tables to avoid being overwritten in F segment"
|
|
|
|
|
default y
|
|
|
|
|
|
|
|
|
|
config MULTIBOOT
|
2009-10-07 18:15:40 +02:00
|
|
|
bool "Generate Multiboot tables (for GRUB2)"
|
2009-11-09 18:56:47 +01:00
|
|
|
default y
|
2009-09-22 20:49:08 +02:00
|
|
|
|
2009-10-15 15:35:47 +02:00
|
|
|
config GENERATE_ACPI_TABLES
|
|
|
|
|
depends on HAVE_ACPI_TABLES
|
2009-09-22 20:49:08 +02:00
|
|
|
bool "Generate ACPI tables"
|
2009-10-15 15:35:47 +02:00
|
|
|
default y
|
2009-10-15 19:49:07 +02:00
|
|
|
help
|
|
|
|
|
Generate ACPI tables for this board.
|
|
|
|
|
|
|
|
|
|
If unsure, say Y.
|
2009-09-22 20:49:08 +02:00
|
|
|
|
2009-10-15 15:35:47 +02:00
|
|
|
config GENERATE_MP_TABLE
|
2012-08-24 23:21:44 +02:00
|
|
|
depends on HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
|
2009-09-22 20:49:08 +02:00
|
|
|
bool "Generate an MP table"
|
2009-10-15 15:35:47 +02:00
|
|
|
default y
|
2009-10-15 19:49:07 +02:00
|
|
|
help
|
|
|
|
|
Generate an MP table (conforming to the Intel MultiProcessor
|
|
|
|
|
specification 1.4) for this board.
|
|
|
|
|
|
|
|
|
|
If unsure, say Y.
|
2009-09-22 20:49:08 +02:00
|
|
|
|
2009-10-15 15:35:47 +02:00
|
|
|
config GENERATE_PIRQ_TABLE
|
|
|
|
|
depends on HAVE_PIRQ_TABLE
|
2009-09-22 20:49:08 +02:00
|
|
|
bool "Generate a PIRQ table"
|
2009-10-15 15:35:47 +02:00
|
|
|
default y
|
2009-10-15 19:49:07 +02:00
|
|
|
help
|
|
|
|
|
Generate a PIRQ table for this board.
|
|
|
|
|
|
|
|
|
|
If unsure, say Y.
|
2009-09-22 20:49:08 +02:00
|
|
|
|
2011-08-14 20:56:34 +02:00
|
|
|
config GENERATE_SMBIOS_TABLES
|
|
|
|
|
depends on ARCH_X86
|
|
|
|
|
bool "Generate SMBIOS tables"
|
|
|
|
|
default y
|
|
|
|
|
help
|
|
|
|
|
Generate SMBIOS tables for this board.
|
|
|
|
|
|
|
|
|
|
If unsure, say Y.
|
|
|
|
|
|
2009-09-22 20:49:08 +02:00
|
|
|
endmenu
|
|
|
|
|
|
2009-08-12 17:00:51 +02:00
|
|
|
menu "Payload"
|
|
|
|
|
|
|
|
|
|
choice
|
2009-10-07 18:15:40 +02:00
|
|
|
prompt "Add a payload"
|
2010-12-30 18:39:50 +01:00
|
|
|
default PAYLOAD_NONE if !ARCH_X86
|
|
|
|
|
default PAYLOAD_SEABIOS if ARCH_X86
|
2009-08-12 17:00:51 +02:00
|
|
|
|
2009-10-07 18:15:40 +02:00
|
|
|
config PAYLOAD_NONE
|
|
|
|
|
bool "None"
|
|
|
|
|
help
|
|
|
|
|
Select this option if you want to create an "empty" coreboot
|
|
|
|
|
ROM image for a certain mainboard, i.e. a coreboot ROM image
|
|
|
|
|
which does not yet contain a payload.
|
|
|
|
|
|
|
|
|
|
For such an image to be useful, you have to use 'cbfstool'
|
|
|
|
|
to add a payload to the ROM image later.
|
|
|
|
|
|
2009-08-12 17:00:51 +02:00
|
|
|
config PAYLOAD_ELF
|
2009-10-07 18:15:40 +02:00
|
|
|
bool "An ELF executable payload"
|
2009-08-12 17:00:51 +02:00
|
|
|
help
|
|
|
|
|
Select this option if you have a payload image (an ELF file)
|
|
|
|
|
which coreboot should run as soon as the basic hardware
|
|
|
|
|
initialization is completed.
|
|
|
|
|
|
|
|
|
|
You will be able to specify the location and file name of the
|
|
|
|
|
payload image later.
|
|
|
|
|
|
2010-12-30 18:39:50 +01:00
|
|
|
config PAYLOAD_SEABIOS
|
|
|
|
|
bool "SeaBIOS"
|
|
|
|
|
depends on ARCH_X86
|
|
|
|
|
help
|
|
|
|
|
Select this option if you want to build a coreboot image
|
|
|
|
|
with a SeaBIOS payload. If you don't know what this is
|
|
|
|
|
about, just leave it enabled.
|
|
|
|
|
|
|
|
|
|
See http://coreboot.org/Payloads for more information.
|
|
|
|
|
|
2011-04-15 05:34:05 +02:00
|
|
|
config PAYLOAD_FILO
|
|
|
|
|
bool "FILO"
|
|
|
|
|
help
|
|
|
|
|
Select this option if you want to build a coreboot image
|
|
|
|
|
with a FILO payload. If you don't know what this is
|
|
|
|
|
about, just leave it enabled.
|
|
|
|
|
|
|
|
|
|
See http://coreboot.org/Payloads for more information.
|
|
|
|
|
|
2010-12-30 18:39:50 +01:00
|
|
|
endchoice
|
|
|
|
|
|
|
|
|
|
choice
|
|
|
|
|
prompt "SeaBIOS version"
|
|
|
|
|
default SEABIOS_STABLE
|
|
|
|
|
depends on PAYLOAD_SEABIOS
|
|
|
|
|
|
|
|
|
|
config SEABIOS_STABLE
|
2012-10-16 02:25:07 +02:00
|
|
|
bool "1.7.1"
|
2010-12-30 18:39:50 +01:00
|
|
|
help
|
|
|
|
|
Stable SeaBIOS version
|
|
|
|
|
config SEABIOS_MASTER
|
|
|
|
|
bool "master"
|
|
|
|
|
help
|
|
|
|
|
Newest SeaBIOS version
|
2009-08-12 17:00:51 +02:00
|
|
|
endchoice
|
|
|
|
|
|
2011-04-15 05:34:05 +02:00
|
|
|
choice
|
|
|
|
|
prompt "FILO version"
|
|
|
|
|
default FILO_STABLE
|
|
|
|
|
depends on PAYLOAD_FILO
|
|
|
|
|
|
|
|
|
|
config FILO_STABLE
|
|
|
|
|
bool "0.6.0"
|
|
|
|
|
help
|
|
|
|
|
Stable FILO version
|
|
|
|
|
config FILO_MASTER
|
|
|
|
|
bool "HEAD"
|
|
|
|
|
help
|
|
|
|
|
Newest FILO version
|
|
|
|
|
endchoice
|
|
|
|
|
|
2010-12-19 22:20:14 +01:00
|
|
|
config PAYLOAD_FILE
|
2009-08-17 16:47:32 +02:00
|
|
|
string "Payload path and filename"
|
2009-08-12 17:00:51 +02:00
|
|
|
depends on PAYLOAD_ELF
|
|
|
|
|
default "payload.elf"
|
|
|
|
|
help
|
2009-08-25 02:53:22 +02:00
|
|
|
The path and filename of the ELF executable file to use as payload.
|
2009-08-12 17:00:51 +02:00
|
|
|
|
2010-12-30 18:39:50 +01:00
|
|
|
config PAYLOAD_FILE
|
|
|
|
|
depends on PAYLOAD_SEABIOS
|
2012-01-21 19:34:22 +01:00
|
|
|
default "$(obj)/seabios/out/bios.bin.elf"
|
2010-12-30 18:39:50 +01:00
|
|
|
|
2011-04-15 05:34:05 +02:00
|
|
|
config PAYLOAD_FILE
|
|
|
|
|
depends on PAYLOAD_FILO
|
|
|
|
|
default "payloads/external/FILO/filo/build/filo.elf"
|
|
|
|
|
|
2009-10-07 18:15:40 +02:00
|
|
|
# TODO: Defined if no payload? Breaks build?
|
|
|
|
|
config COMPRESSED_PAYLOAD_LZMA
|
|
|
|
|
bool "Use LZMA compression for payloads"
|
|
|
|
|
default y
|
2011-04-15 05:34:05 +02:00
|
|
|
depends on PAYLOAD_ELF || PAYLOAD_SEABIOS || PAYLOAD_FILO
|
2009-10-07 18:15:40 +02:00
|
|
|
help
|
|
|
|
|
In order to reduce the size payloads take up in the ROM chip
|
|
|
|
|
coreboot can compress them using the LZMA algorithm.
|
|
|
|
|
|
2009-10-16 21:12:49 +02:00
|
|
|
config COMPRESSED_PAYLOAD_NRV2B
|
2009-10-17 05:00:04 +02:00
|
|
|
bool
|
2009-10-16 21:12:49 +02:00
|
|
|
default n
|
|
|
|
|
|
2009-09-17 18:21:31 +02:00
|
|
|
endmenu
|
|
|
|
|
|
2009-10-07 18:15:40 +02:00
|
|
|
menu "Debugging"
|
|
|
|
|
|
|
|
|
|
# TODO: Better help text and detailed instructions.
|
2009-08-12 17:00:51 +02:00
|
|
|
config GDB_STUB
|
2009-08-25 02:53:22 +02:00
|
|
|
bool "GDB debugging support"
|
2012-03-25 20:51:16 +02:00
|
|
|
default n
|
2009-08-12 17:00:51 +02:00
|
|
|
help
|
2009-08-25 02:53:22 +02:00
|
|
|
If enabled, you will be able to set breakpoints for gdb debugging.
|
2010-12-11 21:33:41 +01:00
|
|
|
See src/arch/x86/lib/c_start.S for details.
|
2009-08-12 17:00:51 +02:00
|
|
|
|
2012-06-22 15:56:37 +02:00
|
|
|
config GDB_WAIT
|
|
|
|
|
bool "Wait for a GDB connection"
|
|
|
|
|
default n
|
|
|
|
|
depends on GDB_STUB
|
|
|
|
|
help
|
|
|
|
|
If enabled, coreboot will wait for a GDB connection.
|
|
|
|
|
|
2012-05-03 01:33:18 +02:00
|
|
|
config DEBUG_CBFS
|
|
|
|
|
bool "Output verbose CBFS debug messages"
|
|
|
|
|
default n
|
|
|
|
|
depends on TPM
|
|
|
|
|
help
|
|
|
|
|
This option enables additional CBFS related debug messages.
|
|
|
|
|
|
2010-08-26 14:46:02 +02:00
|
|
|
config HAVE_DEBUG_RAM_SETUP
|
|
|
|
|
def_bool n
|
|
|
|
|
|
2010-03-05 11:03:50 +01:00
|
|
|
config DEBUG_RAM_SETUP
|
|
|
|
|
bool "Output verbose RAM init debug messages"
|
|
|
|
|
default n
|
2010-08-26 14:46:02 +02:00
|
|
|
depends on HAVE_DEBUG_RAM_SETUP
|
2010-03-05 11:03:50 +01:00
|
|
|
help
|
|
|
|
|
This option enables additional RAM init related debug messages.
|
|
|
|
|
It is recommended to enable this when debugging issues on your
|
|
|
|
|
board which might be RAM init related.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2010-10-01 16:50:12 +02:00
|
|
|
config HAVE_DEBUG_CAR
|
|
|
|
|
def_bool n
|
|
|
|
|
|
2010-11-10 03:00:32 +01:00
|
|
|
config DEBUG_CAR
|
|
|
|
|
def_bool n
|
|
|
|
|
depends on HAVE_DEBUG_CAR
|
|
|
|
|
|
|
|
|
|
if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
|
2010-11-10 01:14:32 +01:00
|
|
|
# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
|
|
|
|
|
# printk(BIOS_DEBUG, ...) calls.
|
2010-10-01 16:50:12 +02:00
|
|
|
config DEBUG_CAR
|
|
|
|
|
bool "Output verbose Cache-as-RAM debug messages"
|
|
|
|
|
default n
|
2010-11-10 03:00:32 +01:00
|
|
|
depends on HAVE_DEBUG_CAR
|
2010-10-01 16:50:12 +02:00
|
|
|
help
|
|
|
|
|
This option enables additional CAR related debug messages.
|
2010-11-10 03:00:32 +01:00
|
|
|
endif
|
2010-10-01 16:50:12 +02:00
|
|
|
|
2010-06-01 21:25:31 +02:00
|
|
|
config DEBUG_PIRQ
|
|
|
|
|
bool "Check PIRQ table consistency"
|
|
|
|
|
default n
|
|
|
|
|
depends on GENERATE_PIRQ_TABLE
|
|
|
|
|
help
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2010-08-26 14:46:02 +02:00
|
|
|
config HAVE_DEBUG_SMBUS
|
|
|
|
|
def_bool n
|
|
|
|
|
|
2010-03-05 11:03:50 +01:00
|
|
|
config DEBUG_SMBUS
|
|
|
|
|
bool "Output verbose SMBus debug messages"
|
|
|
|
|
default n
|
2010-08-26 14:46:02 +02:00
|
|
|
depends on HAVE_DEBUG_SMBUS
|
2010-03-05 11:03:50 +01:00
|
|
|
help
|
|
|
|
|
This option enables additional SMBus (and SPD) debug messages.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config DEBUG_SMI
|
|
|
|
|
bool "Output verbose SMI debug messages"
|
|
|
|
|
default n
|
|
|
|
|
depends on HAVE_SMI_HANDLER
|
|
|
|
|
help
|
|
|
|
|
This option enables additional SMI related debug messages.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2010-08-01 17:41:14 +02:00
|
|
|
config DEBUG_SMM_RELOCATION
|
|
|
|
|
bool "Debug SMM relocation code"
|
|
|
|
|
default n
|
|
|
|
|
depends on HAVE_SMI_HANDLER
|
|
|
|
|
help
|
|
|
|
|
This option enables additional SMM handler relocation related
|
|
|
|
|
debug messages.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2010-11-10 01:14:32 +01:00
|
|
|
# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
|
|
|
|
|
# printk(BIOS_DEBUG, ...) calls.
|
|
|
|
|
config DEBUG_MALLOC
|
2012-11-14 02:00:01 +01:00
|
|
|
prompt "Output verbose malloc debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
|
|
|
|
|
bool
|
2010-11-10 01:14:32 +01:00
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
This option enables additional malloc related debug messages.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
2011-07-01 23:44:39 +02:00
|
|
|
|
|
|
|
|
# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
|
|
|
|
|
# printk(BIOS_DEBUG, ...) calls.
|
|
|
|
|
config DEBUG_ACPI
|
2012-11-14 02:00:01 +01:00
|
|
|
prompt "Output verbose ACPI debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
|
|
|
|
|
bool
|
2011-07-01 23:44:39 +02:00
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
This option enables additional ACPI related debug messages.
|
|
|
|
|
|
|
|
|
|
Note: This option will slightly increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
2010-11-10 01:14:32 +01:00
|
|
|
|
|
|
|
|
# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
|
|
|
|
|
# printk(BIOS_DEBUG, ...) calls.
|
2010-09-08 00:30:15 +02:00
|
|
|
config REALMODE_DEBUG
|
2012-11-14 02:00:01 +01:00
|
|
|
prompt "Enable debug messages for option ROM execution" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
|
|
|
|
|
bool
|
2010-09-08 00:30:15 +02:00
|
|
|
default n
|
2010-11-10 03:00:32 +01:00
|
|
|
depends on PCI_OPTION_ROM_RUN_REALMODE
|
2010-09-08 00:30:15 +02:00
|
|
|
help
|
|
|
|
|
This option enables additional x86emu related debug messages.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the time to emulate a ROM.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2010-03-05 11:03:50 +01:00
|
|
|
config X86EMU_DEBUG
|
|
|
|
|
bool "Output verbose x86emu debug messages"
|
|
|
|
|
default n
|
|
|
|
|
depends on PCI_OPTION_ROM_RUN_YABEL
|
|
|
|
|
help
|
|
|
|
|
This option enables additional x86emu related debug messages.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_JMP
|
|
|
|
|
bool "Trace JMP/RETF"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print information about JMP and RETF opcodes from x86emu.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_TRACE
|
|
|
|
|
bool "Trace all opcodes"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print _all_ opcodes that are executed by x86emu.
|
2010-04-27 08:56:47 +02:00
|
|
|
|
2010-03-05 11:03:50 +01:00
|
|
|
WARNING: This will produce a LOT of output and take a long time.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_PNP
|
|
|
|
|
bool "Log Plug&Play accesses"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print Plug And Play accesses made by option ROMs.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_DISK
|
|
|
|
|
bool "Log Disk I/O"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print Disk I/O related messages.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_PMM
|
|
|
|
|
bool "Log PMM"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print messages related to POST Memory Manager (PMM).
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_VBE
|
|
|
|
|
bool "Debug VESA BIOS Extensions"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print messages related to VESA BIOS Extension (VBE) functions.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_INT10
|
|
|
|
|
bool "Redirect INT10 output to console"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Let INT10 (i.e. character output) calls print messages to debug output.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_INTERRUPTS
|
|
|
|
|
bool "Log intXX calls"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print messages related to interrupt handling.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_CHECK_VMEM_ACCESS
|
|
|
|
|
bool "Log special memory accesses"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print messages related to accesses to certain areas of the virtual
|
|
|
|
|
memory (e.g. BDA (BIOS Data Area) or interrupt vectors)
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_MEM
|
|
|
|
|
bool "Log all memory accesses"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print memory accesses made by option ROM.
|
|
|
|
|
Note: This also includes accesses to fetch instructions.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_IO
|
|
|
|
|
bool "Log IO accesses"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print I/O accesses made by option ROM.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2011-11-17 21:50:54 +01:00
|
|
|
config DEBUG_TPM
|
|
|
|
|
bool "Output verbose TPM debug messages"
|
|
|
|
|
default n
|
|
|
|
|
depends on TPM
|
|
|
|
|
help
|
|
|
|
|
This option enables additional TPM related debug messages.
|
|
|
|
|
|
2012-05-10 20:27:32 +02:00
|
|
|
config DEBUG_SPI_FLASH
|
|
|
|
|
bool "Output verbose SPI flash debug messages"
|
|
|
|
|
default n
|
|
|
|
|
depends on SPI_FLASH
|
|
|
|
|
help
|
|
|
|
|
This option enables additional SPI flash related debug messages.
|
|
|
|
|
|
2012-04-04 00:07:22 +02:00
|
|
|
if SOUTHBRIDGE_INTEL_BD82X6X && DEFAULT_CONSOLE_LOGLEVEL_8
|
|
|
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# Only visible with the right southbridge and loglevel.
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config DEBUG_INTEL_ME
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bool "Verbose logging for Intel Management Engine"
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|
default n
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|
help
|
|
|
|
|
Enable verbose logging for Intel Management Engine driver that
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|
is present on Intel 6-series chipsets.
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endif
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|
2010-03-13 23:07:15 +01:00
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config LLSHELL
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|
bool "Built-in low-level shell"
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default n
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|
|
help
|
|
|
|
|
If enabled, you will have a low level shell to examine your machine.
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|
|
|
|
Put llshell() in your (romstage) code to start the shell.
|
2010-12-11 21:33:41 +01:00
|
|
|
See src/arch/x86/llshell/llshell.inc for details.
|
2010-03-13 23:07:15 +01:00
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|
2011-09-02 23:23:41 +02:00
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|
config TRACE
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|
bool "Trace function calls"
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default n
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|
|
help
|
|
|
|
|
If enabled, every function will print information to console once
|
|
|
|
|
the function is entered. The syntax is ~0xaaaabbbb(0xccccdddd)
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|
|
|
|
the 0xaaaabbbb is the actual function and 0xccccdddd is EIP
|
|
|
|
|
of calling function. Please note some printk releated functions
|
|
|
|
|
are omitted from trace to have good looking console dumps.
|
2009-10-07 18:15:40 +02:00
|
|
|
endmenu
|
|
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|
|
|
2009-10-26 16:14:07 +01:00
|
|
|
# These probably belong somewhere else, but they are needed somewhere.
|
|
|
|
|
config AP_CODE_IN_CAR
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|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
2010-10-08 01:02:06 +02:00
|
|
|
config RAMINIT_SYSINFO
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
2009-10-26 16:14:07 +01:00
|
|
|
config ENABLE_APIC_EXT_ID
|
|
|
|
|
bool
|
|
|
|
|
default n
|
2009-11-12 17:38:03 +01:00
|
|
|
|
|
|
|
|
config WARNINGS_ARE_ERRORS
|
|
|
|
|
bool
|
2010-07-08 18:41:05 +02:00
|
|
|
default y
|
2009-11-27 17:55:13 +01:00
|
|
|
|
2010-10-13 08:23:02 +02:00
|
|
|
# The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE,
|
|
|
|
|
# POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are
|
|
|
|
|
# mutually exclusive. One of these options must be selected in the
|
|
|
|
|
# mainboard Kconfig if the chipset supports enabling and disabling of
|
|
|
|
|
# the power button. Chipset code uses the ENABLE_POWER_BUTTON option set
|
|
|
|
|
# in mainboard/Kconfig to know if the button should be enabled or not.
|
|
|
|
|
|
|
|
|
|
config POWER_BUTTON_DEFAULT_ENABLE
|
|
|
|
|
def_bool n
|
|
|
|
|
help
|
|
|
|
|
Select when the board has a power button which can optionally be
|
|
|
|
|
disabled by the user.
|
|
|
|
|
|
|
|
|
|
config POWER_BUTTON_DEFAULT_DISABLE
|
|
|
|
|
def_bool n
|
|
|
|
|
help
|
|
|
|
|
Select when the board has a power button which can optionally be
|
|
|
|
|
enabled by the user, e.g. when the board ships with a jumper over
|
|
|
|
|
the power switch contacts.
|
|
|
|
|
|
|
|
|
|
config POWER_BUTTON_FORCE_ENABLE
|
|
|
|
|
def_bool n
|
|
|
|
|
help
|
|
|
|
|
Select when the board requires that the power button is always
|
|
|
|
|
enabled.
|
|
|
|
|
|
|
|
|
|
config POWER_BUTTON_FORCE_DISABLE
|
|
|
|
|
def_bool n
|
|
|
|
|
help
|
|
|
|
|
Select when the board requires that the power button is always
|
|
|
|
|
disabled, e.g. when it has been hardwired to ground.
|
|
|
|
|
|
|
|
|
|
config POWER_BUTTON_IS_OPTIONAL
|
|
|
|
|
bool
|
|
|
|
|
default y if POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE
|
|
|
|
|
default n if !(POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE)
|
|
|
|
|
help
|
|
|
|
|
Internal option that controls ENABLE_POWER_BUTTON visibility.
|
|
|
|
|
|
2012-03-30 01:01:51 +02:00
|
|
|
source src/vendorcode/Kconfig
|