Commit Graph

17125 Commits

Author SHA1 Message Date
Stefan Reinauer ea1a5fef4d buildgcc: Update LLVM to 3.7.1
Not much testing, update mostly so we can test with the
latest scan-build.

Change-Id: I50d28b7e0dfd31f9ae565c8515d5ab1760ca4c62
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13516
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-01-31 22:37:51 +01:00
Stefan Reinauer 27522ad375 buildgcc: Rename armv7-a-eabi compiler to arm-eabi
The compiler really supports a whole line of ARM CPUs, not just
ARMv7a:
arm-eabi-gcc: note: valid arguments to '-march=' are: armv2 armv2a
   armv3 armv3m armv4 armv4t armv5 armv5e armv5t armv5te armv6 armv6-m
   armv6j armv6k armv6s-m armv6t2 armv6z armv6zk armv7 armv7-a armv7-m
   armv7-r armv7e-m armv7ve armv8-a armv8-a+crc iwmmxt iwmmxt2 native
So let's reflect this in the cross compiler name.

Change-Id: I717760d80954655b2de9ae019b813d81e9a75762
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13515
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-01-31 22:37:35 +01:00
Stefan Reinauer eaa014676e vendorcode/intel: remove unused apple specific assembler macros
Since this code is pulled in through commonlib, it will break compilation
of cbfstool on OSX.

Change-Id: I342bfa7e755aa540c4563bb5cd8cccacee39d188
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13525
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-31 22:37:06 +01:00
Lee Leahy e0918bbc68 drivers/intel/fsp1_1: Fix spelling error in API and copyright
Change granluarity to granularity.
Change wacbmem_entryanty to warranty.
Update copyright dates.

TEST=None

Change-Id: Ib7775cb33616751760919a5850777dc6f77a6be9
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13528
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-31 20:51:29 +01:00
Vladimir Serbinenko 2387220c1b h8/battery: Fix ASL warning.
Change-Id: Idf74e400efa3fea8eb74f372e4f261ab6567db8a
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13513
Tested-by: build bot (Jenkins)
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
2016-01-31 14:41:01 +01:00
Vladimir Serbinenko 8b73cee9e5 stout: Fix VGA PCIIDs.
Change-Id: I7dcde170d0f59ea9886342c0d2c09b70b9d0d84d
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13537
Tested-by: build bot (Jenkins)
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
2016-01-31 14:39:06 +01:00
Martin Roth b5400ad412 kconfig_lint: Add readme document
The readme describes the operation and usage of kconfig_lint.
It also lists all the notes, warnings, and errors that kconfig_lint
looks for.

Change-Id: I873f394ff93fce42cd9638cbbad6134f1aef3a6a
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13464
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-30 17:29:40 +01:00
Martin Roth 08cf90f860 kconfig_lint: add comments and whitespace fixes.
No functional changes.

Change-Id: I40284b68ddda7e19741c5306a8c74761c00e4b35
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13463
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-30 17:29:26 +01:00
Martin Roth ab2d777360 kconfig_lint: Skip temp files when looking for unused Kconfig files.
Don't warn on Kconfig.orig and Kconfig~ files when trying to verify
that all the Kconfig files in the coreboot source tree are being loaded.

Change-Id: Ie7babe60b29735e5ccc5f93f4e42ad82dfb47044
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13462
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-30 17:29:04 +01:00
Martin Roth b58d349ca9 kconfig_lint: Update prompt structure
- The prompts were not getting incremented, so each prompt for a symbol
would overwrite the previous.
- Record the menu each prompt is in.

Change-Id: Ia282a30344d5e135f4f2027be9aff0e49a4e5edb
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13461
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-30 17:28:44 +01:00
Martin Roth 08ee1cfafc kconfig_lint: Add warning if tristate type is used in coreboot
Although there's no reason we COULDN'T use tristate types, we haven't
up to this point.  If there's a good reason to use them in the future,
this check can be removed.

Change-Id: I5f1903341f522bc957e394bc0fd288ba1adab431
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13460
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-30 17:28:19 +01:00
Martin Roth 819e67242f kconfig_lint: merge 'git grep' and 'grep' exclude dir and files
The code had originally been using standard grep to look through the
coreboot tree for Kconfig symbols.  When this was switched to git grep,
the --exclude-dir options didn't work, and nothing was added to exclude
the directories that shouldn't be searched for symbols.  This resulted
in invalid warnings as it searched directories that had Kconfig symbols
for other projects.

This merges the exclusion list for both the regular and git versions
of grep for consistent behavior.

Change-Id: I7fed8b9fa827cb14f7373e7b774acc56e43cb6ff
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13459
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-30 17:27:30 +01:00
Martin Roth 572a856b97 kconfig_lint: Don't look at IS_ENABLED() text in comments.
This fixes at least one kconfig_lint warning.

Change-Id: I35edf57e90315a8372aaf3b41e923cd8dad7386a
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13458
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-30 17:27:07 +01:00
Martin Roth 6bfbf1c66f kconfig_lint: Exclude some Kconfig symbols from unused symbol checks
The configuration that coreboot uses for setting selected symbols
typically involves a structure like this:
config BLEH_SPECIFIC_OPTIONS
def_bool y
select SYMBOL

This leads to an an extra kconfig symbol BLEH_SPECIFIC_OPTIONS
that is never referenced by anything else, generating a warning.

Since this is currently the construct that coreboot uses, filter it
out of the warnings for now.

Change-Id: I85a95e4c4e8469870c7f219f2a92955819845573
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13457
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-30 17:26:34 +01:00
Martin Roth 63ea4930e4 kconfig_lint: merge 'git grep' and 'grep' exclude dir and files
The code had originally been using standard grep to look through the
coreboot tree for Kconfig symbols.  When this was switched to git grep,
the --exclude-dir options didn't work, and nothing was added to exclude
the directories that shouldn't be searched for symbols.  This resulted
in invalid warnings as it searched directories that had Kconfig symbols
for other projects.

This merges the exclusion list for both the regular and git versions
of grep for consistent behavior.

Change-Id: I69a1e0b30fecca152e02a511c82248b6091b3d8b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13456
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-30 17:26:03 +01:00
Martin Roth 721ee01bb0 lint: Add a check for the executable bit being set on source code
Change-Id: Ia51bd0fa742b2cb17f638c15d669ad1a7f65fefd
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13433
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2016-01-30 03:23:44 +01:00
Alexandru Gagniuc 7e86cd4bb2 soc/intel: Add skeleton infrastructure for Apollolake SOC
This is the very very minimum needed to compile the code.

Change-Id: I7f9e5f564181071591a4640019f59f91a4c456c6
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com>
Reviewed-on: https://review.coreboot.org/13297
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-01-30 03:12:16 +01:00
Alexandru Gagniuc 6be6c8f282 arch/x86: Implement minimal bootblock for C_ENVIRONMENT_BOTOBLOCK
Some newer x86 systems can boot from non-memory-mapped boot media
(e.g. EMMC). The bootblock may be backed by small amounts of SRAM, or
other memory, similar to how most ARM chipsets work. In such cases, we
may not have enough code space for romstage very early on. This means
that CAR setup and early boot media (e.g. SPI, EMMC) drivers need to
be implemented within the limited amount memory of storage available.
Since the reset vector has to be contained in this early code memory,
the bootblock is the best place to implement loading of other stages.

Implement a bootblock which does the minimal initialization, up to,
and including switch to protected mode. This then transfers control
to platform-specific code. No stack is needed, and control is
transferred via a "jmp" such that no stack operations are involved.

Change-Id: I009b42b9a707cf11a74493bd4d8c189dc09b8ace
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: https://review.coreboot.org/13485
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-01-30 03:11:46 +01:00
Alexandru Gagniuc f8e491339f arch/x86: Rename bootblock.S to bootblock_romcc.S
bootblock.S was used strictly for setting up the system so that the
assembly generated by ROMCC could be executed. Since the
infrastructure now exists to run a bootblock wihtout ROMCC, rename
this file accordingly. this is done to prevent any future confusion.

Change-Id: Icbf5804b66b9517f9ceb352bed86978dcf92228f
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: https://review.coreboot.org/11784
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-01-30 03:11:12 +01:00
Vladimir Serbinenko 3141eac900 Revert "northbridge/intel/sandybridge: Fix random raminit failures"
It break x230 access to channel 1.

This reverts commit 9f1fbb9a30.

Change-Id: I8a3b13d17729f25cea3460ac2f87bca3c193d388
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13512
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2016-01-29 20:45:09 +01:00
Patrick Georgi 1bf5e64096 build system: allow modifying cbfstool options for files-in-regions
By implementing a more complex options-for-region function, special
needs for certain files in certain regions can be dealt with.

Change-Id: I2e1e08d5357b717011c41675f76908bf2319f91d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13505
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
2016-01-29 17:20:08 +01:00
Patrick Georgi efe7ff0f81 build system: Unwind multi-region cbfstool add commands
Add files to fmap regions one-by-one, so we can modify options
per-file-per-region.

Change-Id: Ic3ff5a4e563796c9fdd5705236aef37c883abf5e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13504
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-29 17:19:35 +01:00
Patrick Georgi ddc30767dc build system: deduplicate users of cbfs-add-cmd
When adding the cbfstool remove requirement of the UPDATE_IMAGE path to
cbfs-add-cmd, prebuil[dt]-files become identical in both cases.

Change-Id: I80faaf1c83368b9dd00a9f247bf89e6d596be996
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13503
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-29 17:19:16 +01:00
Patrick Georgi 60fad89091 build system: deduplicate use of cbfs-autogen-attributes
Also drop the second argument to cbfs-add-cmd because it's not needed
anymore.

Change-Id: Ie01d73f6b2aff09caccc397f72d6d8065624aebe
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13502
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-29 17:18:59 +01:00
Patrick Georgi 35a2bcaa21 build system: deduplicate the addition of alignment/base arguments
Change-Id: I951606333d19cd6bf655294b8b3097884b6ac9e6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13501
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-29 17:18:40 +01:00
Patrick Georgi 93d53677da build system: pass $(file) explicitly
And not in the global context.

Change-Id: Ife7394b1343663456c24316df6a07d883adb9ee9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13500
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-29 17:18:28 +01:00
Patrick Georgi 172f886586 build system: separate cbfstool add invocations into separate commands
They used to be chained into a single make shell invocation but now
they're individual commands, which makes them easier to manage.

Change-Id: I22394fd31989d5180790818153f466c0e7ebbedd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13499
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-29 17:18:16 +01:00
Patrick Georgi 4ba65aacae build system: reformat cbfs-add-cmd
Change-Id: Iccf2c0ac62d410fd541d7aa244b9989b92584c13
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13498
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-29 17:18:04 +01:00
Timothy Pearson 40e1fac56a southbridge/amd/sb700: Add CMOS option to disable legacy USB support
Change-Id: I136c259136ce66a0c319a965ae0ee27f66dce1b3
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13155
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-29 17:04:32 +01:00
Iru Cai e10d07e336 mainboard/cubieboard: use bootblock_mainboard_early_init
since commit f1e321001d, the UART init
should be in bootblock_mainboard_early_init() which runs before
console init. (see src/lib/bootblock.c)

Change-Id: Ib00afdd6e81e7689fbd743c8a5f547d424896d71
Reviewed-on: https://review.coreboot.org/13448
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2016-01-29 17:03:52 +01:00
Jean Lucas 6d2ca02101 google/peppy/Kconfig: Move select MAINBOARD_DO_NATIVE_VGA_INIT
Move the default select of "Use native graphics initialization" for
Peppy to the ChromeOS section as SeaBIOS (default payload) requires a
vBIOS and takes twice as long to load with this option enabled. For the
same reasons, this option shouldn't be enabled by default (def_bool y).

Change-Id: I1f2163e0a1e4bf8e5041dad150bdf7de804fb4db
Signed-off-by: Jean Lucas <jean@4ray.co>
Reviewed-on: https://review.coreboot.org/13493
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-29 17:02:26 +01:00
Hannah Williams 5166827c57 soc/braswell: Fix Global NVS base address
TEST=Boot to OS
Signed-off-by: Hannah Williams <hannah.williams@intel.com>

Change-Id: I9b43eb4f6f7af62a8a0bbe7bfa08feee1eaca24e
Reviewed-on: https://review.coreboot.org/13506
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-29 16:58:19 +01:00
Martin Roth 3e3d969e6f src/: Chmod 644 all .c, .h, .asl, .inc, .cb, .hex, & Kconfig files
Some trivial cleanup.

Change-Id: I866efc4939b5e036ef02d1acb7b8bb8335671914
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13427
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-01-29 16:57:11 +01:00
Martin Roth b2cc1299af board_status/getrevision.sh: get rid of colons in dir names
Gnu make won't build in directories that have a colon in their name.

When the makefile expands a variable containing a dirctory name that
has colons in it, it seems to interpret that as a makefile target, and
fails the build.

Many other characters also confuse the makefiles, including spaces,
ampersand symbols, dollar signs, etc.

I've started including scripts into the board-status directories to
do the build of the rom that was tested, and this is preventing them
from working without renaming the directory before doing the build.

Change-Id: I9dd8e4027be21363015cd8df9918610e206afce2
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13490
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-01-29 16:56:31 +01:00
Subrata Banik fbdc719414 intel/skylake: Implement native Cache-as-RAM (CAR)
Now coreboot should do BIOS CAR setup along with NEM
mode setup.

This patch also provides a mechanism to use 16MB code caching
benefit although LLC still limited to 1M/1.5M based
on SOC LLC limit.
Here with unlimited cache line gets replaced. Now we could use
unlimited cache size along with well defined data size

[pg: updated to current upstream #defines]

BUG=chrome-os-partner:48412
BRANCH=glados
TEST=Builds and Boots on FAB4 SKU2/3.

Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Signed-off-by: pchandri <preetham.chandrian@intel.com>
Signed-off-by: Dhaval Sharma <dhaval.v.sharma@intel.com>

Change-Id: I96a9cf3a6e41cae9619c683dca28ad31dcaa2536
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2ec51f15c874ad2f1f4fad52fa8deced7b27a24b
Original-Change-Id: Id62c15799d98bc27b5e558adfa7c7b3468aa153a
Original-Reviewed-on: https://chromium-review.googlesource.com/320855
Original-Commit-Ready: Subrata Banik <subrata.banik@intel.com>
Original-Tested-by: Subrata Banik <subrata.banik@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/13138
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-29 16:56:01 +01:00
Patrick Georgi dcc3ecc940 arch/arm64: Override bl31 timestamp with coreboot build timestamp
If coreboot's build process is reproducible (eg. using the latest git
timestamp as source), bl31 is, too.

This requires an arm-trusted-firmware side merge first (in progress) and
an update of our reference commit for the submodule, but it also doesn't
hurt anything because it merely sets a variable that currently goes
unused.

Change-Id: If139538a2fab5b3a70c67f4625aa2596532308f7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13497
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2016-01-29 16:37:02 +01:00
Timothy Pearson 988ee17fd2 superio/winbond/w83667hg-a: Add support for W83667HG-A
The KGPE-D16 and KCMA-D8 use a Winbond W83667HG-A SuperIO.  While
the Nuvoton NCT5572D is effectively the same core, and a close
enough match to get things working initially, the W83667HG-A
has a different LDN mapping and several extra features that
require a separate support driver.

Clone the Nuvoton NCT5572D and modify according to the W83667HG-A
datasheet, version 1.4.

Change-Id: I707ba2e40a22d41cd813003d84a82cb20304f55b
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13156
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2016-01-29 00:49:29 +01:00
Timothy Pearson 8274accde8 southbridge/amd/sb700: Add missing DMA setup step from AMD RRG
Change-Id: I412a0e5f2e0686b10a295dd7c0e9b537dc1a0940
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13154
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
2016-01-29 00:43:43 +01:00
Timothy Pearson 2ba84cd7de mainboard/asus/kgpe-d16: Use stock PS/2 ACPI ASL file
Change-Id: Iad724e9e1d3e64e2af3f74fed9dec30aa34e2af5
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13153
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
2016-01-29 00:43:20 +01:00
Timothy Pearson cfea0bb44e mainboard/asus/kgpe-d16: Enable ASUS MIO audio option
The KGPE-D16 supports an optional MIO audio card, which connects
to the on-board HDA interface of the SP5100.

Enable the HDA interface for use with the MIO card.

Change-Id: Idfe069f4bce7b94a7460bc7fcdd378eb57e51fda
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13152
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
2016-01-29 00:43:08 +01:00
Timothy Pearson 4c9c2f0d0d mainboard/asus/kgpe-d16: Move memory test before IMD setup
Change-Id: Ic6fbf6688e4c2adc85e4eb9fa17e79d29dda58c0
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13151
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-29 00:42:42 +01:00
Timothy Pearson 8e9106db20 nb/amdmct/mct_ddr3: Enable mainboard voltage set
The existing code used an incorrect macro name to check for mainboard
DRAM voltage set support, and as a result no voltages were actually
set.  Furthermore, the existing code did not contain a centralized
voltage assumption for boards that did not have a DIMM voltage set
implementation.

Use the correct macro name to test for boards with voltage set
implementation, and provide a basic fallback to 1.5V operation
for boards without a voltage set implementation.

Change-Id: I638c65fe013a8e600694d8cbedf6a10b33b0ef95
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13150
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-29 00:42:30 +01:00
Timothy Pearson 71f864191f cpu/amd/fam10h-fam15h: Correctly create APIC ID on single node systems
The existing code generated an incorrect boot APIC ID from node and
core number for single node packages, leading to a boot failure when
the second node was installed.

Properly generate the boot APIC ID from node and core number.

Change-Id: I7a00e216a6841c527b0a016fa07befb42162414a
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13149
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-29 00:42:21 +01:00
Damien Zammit 9253ce60c4 mb/gigabyte/ga-g41m-es2l: Remove PMBASE settings and commented code.
Fixed incorrect comment regarding port 80 LPC route.

Change-Id: Ifbb73753d5a0737418b869085f2329a02504e5dc
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/13466
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2016-01-29 00:29:30 +01:00
Damien Zammit c70966cd26 mb/gigabyte/ga-g41m-es2l: Remove copy-pasted cstates
Change-Id: I5b6edbd97d4e6ed8b03f2f319a338022647e26ea
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/13465
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2016-01-29 00:28:34 +01:00
Damien Zammit c4d317f107 mb/gigabyte/ga-g41m-es2l: Move MMCONF base address to 0xe0000000
Change-Id: I3873d92069cc1d113a8092d609d1768ff45cbd45
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/13129
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
2016-01-29 00:28:02 +01:00
Damien Zammit 5680fafb4d nb/intel/x4x: Move to early cbmem
Previously with errors in the ram init, early cbmem was disabled.
Now that the ram is working correctly, set as early cbmem platform
and update all (1) boards to use it.

Tested on GA-G41M-ES2L

Change-Id: I5925c28821537f0e326b4f5a2ac39778e4724a3c
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/13131
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2016-01-29 00:27:09 +01:00
Damien Zammit 216fc50411 nb/intel/x4x: Cleanup gma.c
Tidy up the code and move vga_textmode_init() later

Change-Id: I49967e7197416c955ae6c8775eac7d1a60c92d1c
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/13128
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2016-01-29 00:25:59 +01:00
Damien Zammit d63115daa8 nb/intel/x4x: Tidy up raminit and fix msbpos() function
- Fix bug with msbpos, it was not returning the correct result
  due to typo in logic, and unsigned value needed to be negative.
- Add reclaim above 4GiB
- Fix to ME related registers near the end of raminit

Change-Id: I04acd0593a457437ee4a42e14b287b2b17a160af
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/13127
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2016-01-29 00:22:48 +01:00
Damien Zammit fe9876a763 nb/intel/x4x: Tidy up northbridge
- Add device enable macros
- Set the PMBASE correctly through southbridge device

Change-Id: I1b8cc3de96b1ecaf01e31bad8fba1fada8671c2d
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/13126
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2016-01-29 00:18:58 +01:00