Commit Graph

161 Commits

Author SHA1 Message Date
Gabe Black 1025f3afc8 Add an implementation for the memchr library function
Change-Id: Icded479d246f7cce8a3d2154c69f75178fa513e1
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/708
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Mathias Krause <minipli@googlemail.com>
2012-03-09 20:00:53 +01:00
Patrick Georgi c5fc7db355 Move C labels to start-of-line
Also mark the corresponding lint test stable.

Change-Id: Ib7c9ed88c5254bf56e68c01cdbd5ab91cd7bfc2f
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/772
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-03-07 17:48:03 +01:00
Patrick Georgi 472efa6041 Remove whitespace.
Fix issues reported by new lint test.

Change-Id: I077a829cb4a855cbb3b71b6eb5c66b2068be6def
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/646
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-17 19:04:31 +01:00
Kyösti Mälkki 9dd3ef165a Don't loop infinitely long on serial comm failures
If serial uart (8250/16x50) takes abnormally long to respond, give
up on logging to serial console and instead let the system boot.

Also reference bit in LSR register with correct name.

Change-Id: I3796efc3e8690425f04a130af4bc99541b64d335
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/611
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-02-07 20:37:20 +01:00
Sven Schnelle 3ad8c54c01 lib: add ram_check_nodie
The current implementation calls die() if memory checking fails.
This isn't always what we want: one might want to print error registers,
or do some other error handling. Introduce ram_check_nodie() for that
reason. It returns 0 if ram check succeeded, otherwise 1.

Change-Id: Ib9a9279120755cf63b5b3ba5e0646492c3c29ac2
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/532
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-01-12 13:26:29 +01:00
Florian Zumbiehl 2d4fecec51 don't scan beyond end of CBFS
Change-Id: I66e535f77e513dbfa5fc906ecf288193af78ae62
Signed-off-by: Florian Zumbiehl <florz@florz.de>
Reviewed-on: http://review.coreboot.org/369
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-11-02 10:49:24 +01:00
Stefan Reinauer 5ff7c13e85 remove trailing whitespace
Change-Id: Ib91889a374515d36a2b12b53aeb12b6ea6e22732
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/364
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-11-01 19:07:45 +01:00
Sven Schnelle 20fc631ad2 Fix usb debug dongle support
- move enable_usbdebug() declaration to usbdebug.h
- reinitialize debug driver in ramstage, as copying the data
  structure from romstage doesn't work right now. This way of copying
  data from romstage to ramstage is really board/cpu specific, and is
  likely to break often. So don't do it.

Change-Id: I394678ded6679c1803e29eb691b926182bdcab68
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/355
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-31 04:06:10 +01:00
Kyösti Mälkki 481814d1ab Clear improper use of CONFIG_CACHE_AS_RAM
Choice between printk/print_ is related to CAR, but really
depends whether we compiled with GCC or ROMCC.

Change-Id: I9fe831a215736462e8b3f4b96ffe231133ecf79b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/347
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-28 22:13:50 +02:00
Stefan Reinauer 02e75b2b67 Use ntohll where appropriate.
also clean out a local copy of ntohl in yabel.

Change-Id: Iffe85a53c9ea25abeb3ac663870eb7eb4874a704
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/288
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-10-21 14:14:32 +02:00
Stefan Reinauer c1efb90384 refactor vesa mode setting code and bootsplash code
- adds possibility to set a vesa mode without showing a bootsplash
- make bootsplash / mode setting code available in real mode.

Change-Id: I0045c9d75757657f4ce531889593102ea1e39ce5
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/256
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-10-13 20:00:50 +02:00
Tobias Diedrich 4e22a3bc58 Add acpi_get_sleep_type() to i82371eb and P2B _PTS/_WAK methods
Build fix for src/arch/i386/boot/acpi.c if !CONFIG_SMP
Also check for acpi_slp_type 2 in acpi_is_wakeup, since S2
uses the same acpi wakeup vector as S3.
Add _PTS/_WAK methods to turn off/on the CPU/case fans and blink
the power LED while sleeping.
acpi_get_sleep_type() is in a seperate file i82371eb_wakeup.c because
it is used in both romstage and ramstage after patch 3/3, whereas
i82371eb_early_pm.c is used only in romstage.
I used the name acpi_get_sleep_type instead of  acpi_is_wakeup_early
because I think acpi_is_wakeup_early is a bit misleading as a name since it
doesn't return a boolean value.

Other chipsets so far only ever set acpi_slp_type to 0 and 3, so the
added check for acpi_slp_type == 2 (resume from S2) should not
change behaviour of other boards:
northbridge/intel/i945/northbridge.c:256:extern u8 acpi_slp_type;
northbridge/intel/i945/northbridge.c:263: acpi_slp_type=0;
northbridge/intel/i945/northbridge.c:267: acpi_slp_type=3;
northbridge/intel/i945/northbridge.c:271: acpi_slp_type=0;
southbridge/intel/i82801gx/i82801gx_lpc.c:171:extern u8 acpi_slp_type;
southbridge/via/vt8237r/vt8237r_lpc.c:149:extern u8 acpi_slp_type;
southbridge/via/vt8237r/vt8237r_lpc.c:238:  acpi_slp_type = ((tmp & (7 << 10)) >> 10) == 1 ? 3 : 0 ;
southbridge/via/vt8237r/vt8237r_lpc.c:239:  printk(BIOS_DEBUG, "SLP_TYP type was %x %x\n", tmp, acpi_slp_type);

Change-Id: I13feff0b8f49aa988e5467cdbef02981f0a6be8a
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/188
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-09-12 15:56:12 +02:00
Rudolf Marek 7f0e93060e Add support for the tracing infastructure in coreboot.
The compiler is forced to emmit special functions on every
entry/exit of the function. Add a compile time option
to support it. Function entries will be printed in
the console. The CONFIG_TRACE has more documentation.

Patch for userspace tools will follow.

Change-Id: I2cbeb3f104892b034c8756f86ed05bf71187c3f3
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Reviewed-on: http://review.coreboot.org/178
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-09-07 01:26:47 +02:00
Sven Schnelle 164bcfdd1b Add automatic SMBIOS table generation
Change-Id: I0ae16dda8969638a8f70fe1d2e29e992aef3a834
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/152
Tested-by: build bot (Jenkins)
2011-08-26 20:08:52 +02:00
Sven Schnelle d819853f85 export get_cbfs_header()
Change-Id: I4b6afcee3d0d169e03165a7fb48cfaef2e8253e2
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/157
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-08-18 11:34:53 +02:00
Patrick Georgi b88351537b split CBFS support into shared core and extended functions
The core is data structures and basic file finding capabilities,
while option ROM handling, and loading stages and payloads is
"extended".

The core is rewritten to be BSD-l (its header already was), so
can be copied to libpayload verbatim.
It's also more robust in finding files in corrupted images, eg.
after partial erase or update.

Change-Id: Ic6923debf8bdf3c67c75746d3b31f3addab3dd74
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/114
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-08-04 08:10:54 +02:00
Kevin O'Connor a68555f48d Do full flush on uart8250 only at end of printk.
The previous code does a full flush of the uart after every character.
Unfortunately, this can cause transmission delays on some serial
ports.

This patch changes the code so that it does a flush at the end of
every printk instead of at the end of every character.  This reduces
the time it takes to transmit serial messages (up to 9% on my Asrock
e350m1 board).  It also makes the transmission time more consistent
which is important when performing timing tests via serial
transmissions.

Change-Id: I6b28488b905da68c6d68d7c517cc743cde567d70
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Reviewed-on: http://review.coreboot.org/90
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
Reviewed-by: Sven Schnelle <svens@stackframe.org>
2011-07-12 11:36:20 +02:00
Sven Schnelle 4297a9a101 X60: trigger save cmos on volume/brightness change
Change-Id: I020e06bc311c4e4327c9d3cf2c379dc8fe070a7a
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/25
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-06-15 08:51:18 +02:00
Patrick Georgi b251753b4f Change read_option() to a macro that wraps some API uglyness
Simplify
read_option(CMOS_VSTART_foo, CMOS_VLEN_foo, somedefault)
to
read_option(foo, somedefault)

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6565 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-10 21:53:13 +00:00
Stefan Reinauer 4885daadb3 Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an
example.

This newer version reflects the recent changes to further simplify the console
code and partly gets rid of some hacks in the previous version.

Signed-off-by: Stefan Reinauer <reinauer@google.com>
Acked-by: Peter Stuge <peter@stuge.se>                                                                                                                                          



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6544 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-26 23:47:04 +00:00
Rudolf Marek b721287580 Fix of fix copy and paste errors in ne2k.c (r6512 by stepan)
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Rudolf Marek <r.marek@assembler.cz>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6541 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-22 22:26:04 +00:00
Stefan Reinauer f5ce87d10c fix typo ttys0_index -> b_index
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6540 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-22 02:32:03 +00:00
Stefan Reinauer f349d55beb Get rid of all but one (I/O mapped) UART init functions.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6539 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-22 02:17:26 +00:00
Stefan Reinauer 6aca1e8b26 The UART divider should be calculated based on the base frequency
and baudrate, not hardcoded in addition to that.

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6538 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-22 01:45:11 +00:00
Stefan Reinauer d4814bd41c more ifdef -> if fixes
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6536 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-21 20:45:45 +00:00
Stefan Reinauer 685ee37a12 drop excessive newline in uart8250.c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6533 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-20 21:14:05 +00:00
Stefan Reinauer b297b4901a drop dead uart init code.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6523 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-20 01:08:25 +00:00
Stefan Reinauer 261f842c1c fix copy and paste errors in ne2k.c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6512 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-18 02:26:56 +00:00
Stefan Reinauer 24ef134b37 drop half an uart8250 implementation from smiutil and use the common code
for that instead. This also allows using non-uart8250 consoles for smi
debugging.

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6501 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-14 22:28:00 +00:00
Stefan Reinauer 16ce01b0d8 This patch gets usbdebug console working in romstage.
- actually hook up usbdebug in printk/print_ for romstage
- make usbdebug.c more similar to the Linux kernel version it was
  originally derived from.
- increase retries and timing for usbdebug init (at least one chipset
  seems to need this)
- src/pc80/usbdebug_serial.c is not needed
- some small console cleanups

Signed-off-by: Stefan Reinauer <reinauer@google.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-28 08:05:54 +00:00
Stefan Reinauer da712f3f45 uart_init is only used in romstage.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6245 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-05 02:40:53 +00:00
Stefan Reinauer 85b0fa1ace drop one more version of doing serial uart output differently.
coreboot made it kind of complicated to print a character on serial. Not quite
as complicated as UEFI, but too much for a good design. Fix it.

Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6191 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-17 00:08:21 +00:00
Rudolf Marek 475916ddbf Compile cbmem.c instead of including it in romstage,
and do that only if resume is done.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6174 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-13 20:02:23 +00:00
Rudolf Marek c4369536da Following patch adds support for suspend/resume functions. I had to change the get_cbmem_toc because macro magic did not work well.
The writes to NVRAM are not used in asrock board (k8 pre rev f) but they should work when used with am2 boards. In fact maybe the suspend will work on mahogany or others ;) - with some  simple patch which follows for asrock.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz> 
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6173 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-13 19:59:13 +00:00
Rudolf Marek 97be27ebba We hardcode highmemory size in every northbridge! This is bad, and especially if suspend to ram is involved. Let the default be taken from cbmem.h which also handles the suspend logic.
Abuild tested. Please check all changes if I did not make any wrong while converting this to bytes.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz> 
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6171 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-13 19:50:25 +00:00
Rudolf Marek bcaea142f3 1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_ACPI_RESUME == 1 getting rid of ugly define in romstage.c
2) the patch implements get_cbmem_toc in chipset specific way if defined.
On Intel targets it should be unchanged. On K8T890 the the cbmem_toc is read from NVRAM. Why you ask? Because we cannot do it as on intel, because the framebuffer might be there making it hard to look for it in memory (and remember we need it so early that everying is uncached)

3) The patch removes hardcoded limits for suspend/resume save area (it was 1MB) on intel. Now it computes right numbers itself.

4) it impelements saving the memory during CAR to reserved range in sane way. First the sysinfo area (CAR data) is copied, then the rest after car is disabled (cached copy is used). I changed bit also the the copy of CAR area is now done uncached for target which I feel is more right.

I think I did not change the Intel suspend/resume behaviour but best would be if someone can test it. Please note this patch was unfinished on my drive since ages and it would be very nice to get it in to prevent bit rotten it again.
Now I feel it is done good way and should not break anything. I did a test with abuild and it seems fine.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz> 
Acked-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6117 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-22 22:00:52 +00:00
Peter Stuge 5015f79857 Ensure that config options hidden by r6054 have defaults, and fix MALLOCDBG()
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-10 02:00:32 +00:00
Uwe Hermann a953f371dd Debugging facility improvements.
- Hook up malloc() debug code via CONFIG_DEBUG_MALLOC. Only show it in
   menuconfig if at least DEBUG or SPEW are selected as loglevel, as this
   code does additional printk(BIOS_DEBUG, ...) calls which would otherwise
   not be visible anyway.

 - Similarly, make DEBUG_CAR and REALMODE_DEBUG only visible if thr DEBUG or
   SPEW loglevel is selected.

 - Get rid of a custom "debug" macro, use printk() as usual.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-10 00:14:32 +00:00
Jonathan Kollasch e5b7507882 Remove duplicate line from pci_ids.h.
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Jonathan Kollasch <jakllsch@kollasch.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5920 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-07 23:02:06 +00:00
Patrick Georgi d083595350 Remove lib/ramtest.c-include from all CAR boards.
Remove many more .c-includes from i945 based boards.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5910 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-05 09:07:10 +00:00
Myles Watson d3f620299c Fix make warnings:
Makefile:261: warning: overriding commands for target `coreboot-builds/a-trend_atc-6220/lib/lzma.ramstage.o'
Makefile:261: warning: ignoring old commands for target `coreboot-builds/a-trend_atc-6220/lib/lzma.ramstage.o'

lzma.c is already included unconditionally in the same file.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5900 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-01 15:23:41 +00:00
Patrick Georgi 8463dd9db0 Rename build system variables to be more intuitive, and
at the same time let the user specify sources instead
of object files:
- objs becomes ramstage-srcs
- initobjs becomes romstage-srcs
- driver becomes driver-srcs
- smmobj becomes smm-srcs

The user servicable parts are named accordingly:
ramstage-y, romstage-y, driver-y, smm-y

Also, the object file names are properly renamed now, using
.ramstage.o, .romstage.o, .driver.o, .smm.o suffixes consistently.

Remove stubbed out via/epia-m700 dsdt/ssdt files - they didn't
easily fit in the build system and aren't useful anyway.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coreystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-30 16:55:02 +00:00
Stefan Reinauer d6b4f1cd0a Fix some wrong capitalizations, reformat comments, fix a typo.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-23 18:29:40 +00:00
Uwe Hermann 06694a8952 USB Debug Port related license header fixes (trivial).
- Add missing license headers, or missing (C) lines to various files.
   (most are from AMD / Yinghai Lu, based on svn logs)
 
 - src/include/ehci.h was taken from the Linux kernel. Updating it to
   the latest version from git HEAD while I'm at it (build-tested with
   one board). It also sports some new EHCI 1.1 addendum #defines which
   we may or may not need.
   
   This new file also already has a proper GPL header.
 
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5828 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-23 18:16:46 +00:00
Uwe Hermann a34a0b1876 Fix a compiler warning in src/lib/usbdebug.c (trivial).
The 'delay' variable shadows the global 'delay()' function, yielding
this compiler warning/error:

src/pc80/../lib/usbdebug.c: In function `ehci_reset_port':
src/pc80/../lib/usbdebug.c:281: error: declaration of `delay' shadows a global declaration
src/lib/delay.c:9: error: shadowed declaration is here

This fixes the issue by renaming the 'delay' variable to 'delay_ms'.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5826 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-22 23:42:32 +00:00
Stefan Reinauer 704b59662d We call this cache as ram everywhere, so let's call it the same in Kconfig
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5756 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-30 17:53:13 +00:00
Myles Watson 127e976ec2 Remove warnings from USB debug console code.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5683 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-04 19:29:11 +00:00
Stefan Reinauer 8c4f31b3b5 Drop the USE_PRINTK_IN_CAR option. It's a bogus decision to make for any user /
board porter: printk should always be available in CAR mode.

Also drop CONFIG_USE_INIT, it's only been selected on one ASROCK board
but it's not been used there. Very odd.

There is one usage of CONFIG_USE_INIT which was always off in 
src/cpu/intel/car/cache_as_ram.inc and we have to figure out what to do with
those few lines.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5682 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-03 15:42:29 +00:00
Rudolf Marek 4aa93ccd33 Add support for the console over Ethernet (through PCI NE2000).
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Cristian Magherusan-Stanciu <cristi.magherusan@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5666 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-16 20:02:09 +00:00
Stefan Reinauer 7e00a44b77 also rename the config option.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5588 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-25 17:09:05 +00:00