Commit Graph

156 Commits

Author SHA1 Message Date
Greg Watson 3bb83b8a00 static device names start with static_
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1013 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 21:29:49 +00:00
Greg Watson 6ba9ff837b add clean to Makefile
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1012 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 18:52:17 +00:00
Greg Watson 6430c011f4 get CONFIGURE right
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1011 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 18:51:01 +00:00
Greg Watson 23e107f184 fixed defines
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1010 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 18:50:06 +00:00
Greg Watson 2910a2b545 static devices
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1009 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 18:20:17 +00:00
Greg Watson de085393ed *** empty log message ***
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1008 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 18:14:20 +00:00
Greg Watson 252d3ff1f6 new register format
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1007 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 18:13:19 +00:00
Ronald G. Minnich 3874d40ad6 Fix the generation of .o from .S
The object rules now have four members, this is getting KLUDGY!

[object, source, type (i.e. suffix), base]


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 03:11:40 +00:00
Ronald G. Minnich 99d0d7b300 getting HDAMA to build.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1005 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 01:45:47 +00:00
Ronald G. Minnich ffc161e59a updates for hdama and other things.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1004 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 01:42:29 +00:00
Ronald G. Minnich 4dc7b80151 updated for new code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1003 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 01:41:55 +00:00
Ronald G. Minnich fd0adfe86c This config.lb now works with the new config tool and builds a working image
which boots linux as a payload.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1002 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 01:37:06 +00:00
Eric Biederman 860ad373ef - First pass at code for generic link width and size determination
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@999 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 23:30:29 +00:00
Eric Biederman 2c018fba95 - First pass at s2880 support.
- SMP cleanups (remove SMP only use CONFIG_SMP)
- Minor tweaks to romcc to keep it from taking forever compiling
- failover fixes
- Get a good implementation of k8_cpufixup and sizeram for the opteron


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 20:13:45 +00:00
Greg Watson 6d4512cdf9 added payload
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 17:28:35 +00:00
Greg Watson 634a99110c fix crt0 includes ordering
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@996 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 16:51:40 +00:00
Ronald G. Minnich 9a0989b941 typo fixed.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@995 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 16:22:17 +00:00
Greg Watson 1b0e79704f new chip stuff
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@994 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 15:12:38 +00:00
Greg Watson 2b02b63c54 new chip configure
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 14:00:53 +00:00
Stefan Reinauer 73a9cf4ccb * update quartet target to latest SMP changes.
* remove dead code from coherent_ht.c
* add ldtstop code for link speed changes


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@991 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 13:05:56 +00:00
Greg Watson 8275bad6f6 more chip stuff
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 04:20:08 +00:00
Greg Watson 54b3d233ed more chip stuff
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@989 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 03:38:42 +00:00
Greg Watson d0580343b6 chip stuff
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@988 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-20 23:28:01 +00:00
Eric Biederman 9b4336cf41 - Major cleanup of the bootpath
- Changes to allow more code to be compiled both ways
- Working SMP support


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-19 04:28:22 +00:00
Greg Watson fe4414587a tidy up
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@986 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-19 04:19:48 +00:00
Greg Watson c361a6b218 a few changes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@985 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-19 04:07:07 +00:00
Greg Watson b2e67cdd2c new config format
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@984 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-18 17:17:52 +00:00
Greg Watson 6ae46145e6 Allow options in mainboard configuration file
Moved payload into romimage
More flexible romimage declaration


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@983 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-18 17:05:10 +00:00
Greg Watson ce72e7ee21 fix problems with options, more functionality
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@981 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-18 01:06:15 +00:00
Stefan Reinauer f3961e0491 add AMD Quartet target
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@980 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 22:53:27 +00:00
Stefan Reinauer 438a3e423e moved generate_row from coherent_ht.c to board specific auto.c files
due to different routing defaults of different boards.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 22:51:30 +00:00
Greg Watson 07d72dcfa2 added romimage support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@978 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 22:25:53 +00:00
Greg Watson 16743b89fb new config format
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@977 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 22:11:58 +00:00
Greg Watson 375505f5cc dont export sandpoint options
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@976 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 22:10:11 +00:00
Greg Watson a8d2240e6a sick of typing python command
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@975 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 17:50:11 +00:00
Greg Watson 062d540139 sandpoint options
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@974 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 13:14:07 +00:00
Eric Biederman b03b33697d - Update Config so we now have the proper number of cpus
- Remove some debugging code from auto.c
- Update coeherent_ht.c so we get the proper broadcast routes.
- Fix the dram probing code.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@973 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 06:34:30 +00:00
Eric Biederman 2ec0020b3c - Get the correct routing tables entries for the hdama's onboard nics
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@972 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 05:16:46 +00:00
Ronald G. Minnich 5289938f06 Config.lb for this new part
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@971 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 04:35:19 +00:00
Eric Biederman 387a8db88e - Remove excess line from pci_device.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@970 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 04:10:42 +00:00
Eric Biederman d520759338 - Remove $Id: from crt0.S.lb
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@969 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 03:28:00 +00:00
Eric Biederman 4086d16ba2 - Implement an enable method for pci devices.
- Add initial support for the amd8131
- Update the mptable to something possible
- hdama/Config add the amd8131 southbridge


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@968 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 03:26:03 +00:00
Eric Biederman 5fb929e6e3 - pci_device.c fixes for generic pci bridges to zero the unused portion of bridge resources
- coherent_ht.c remove dead idle loop.
- raminit.c Enable a 64MB mmio window just below 4GB


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 02:15:46 +00:00
Stefan Reinauer 9b45b04d23 fix some glitches in cht code: always enable routing on node7, plus do masking right when setting cpucnt/nodecnt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@966 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-16 15:23:57 +00:00
Eric Biederman 91a8ce7d80 - ldscripb.lb remove another $Id: line..
- romcc_io.h Add include guards.
- hdama/Config nothing really but I have been moving the setting back and forth between 1 and 2 cpus
- auto.c Changed the enabled debugging comments.  This almost works with 2 cpus
- coherent_ht.c First pass at getting this right.  It can now find 2 cpus and place them
  in some semblance of a working state.
- raminit.c Fix problems with 4GB of ram. Disable some of the debugging code.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@965 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-16 07:04:58 +00:00
Eric Biederman 61b29a9b72 - Commit a binutils safe version of reset16.inc
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@964 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-16 01:58:18 +00:00
Eric Biederman ae948f78e6 - Compile fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@963 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-14 20:40:38 +00:00
Greg Watson 50086df616 new config files
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@962 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-14 19:02:29 +00:00
Greg Watson 8052f4d5da new init format
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@961 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-14 18:03:07 +00:00
Greg Watson 109959d6b1 new config rules
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@960 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-14 18:00:10 +00:00