9a5fc849fd
mb/lenovo/g505s: Remove unused <stdlib.h>
...
Change-Id: I6af1d44f9a05c153b6a355318a39adc9a3d6c0c9
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33901
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 06:54:31 +00:00
88f5c7178e
src: Remove unused 'include <arch/cpu.h>'
...
Change-Id: Iaa236f07aed52ccb8c4839047894a14a9446a109
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36080
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-12-19 05:58:50 +00:00
0420e50b6b
src/arch: Remove unused <stdlib.h>
...
Change-Id: I79f065703b5249ca9630b06de7142bc52675076e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32820
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 05:57:07 +00:00
608fbf8110
src/soc/intel: Remove unused <stdlib.h>
...
Change-Id: I71a5a6c3748d5a3910970bfb1ec3d7ecd3184cfd
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33686
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 05:41:08 +00:00
d51ee90f12
src/soc/samsung: Remove unused <stdlib.h>
...
Change-Id: I6a933295de7c41d62e6a95f955c098b49ea17f08
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33689
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 05:39:09 +00:00
8cf28dbf93
soc/{amd,cavium,mediatek,sifive}: Remove unused <stdlib.h>
...
Change-Id: I83322e246fe81b97188be17a3fdda16d36df0678
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33688
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 05:38:43 +00:00
38d2540674
src/southbridge: Remove unused <stdlib.h>
...
Change-Id: I5728b44fdd680b21e951397a2390e24f9171ac34
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32829
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 05:33:23 +00:00
dc987fecce
src/northbridge: Remove unused <stdlib.h>
...
Change-Id: I7a214196b05d3af06c8cd742a6154b0627a0d82f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33685
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 05:33:02 +00:00
b12c2761f4
src/{drivers,device,ec}: Remove unused <stdlib.h>
...
Change-Id: I05422ee4b0aa5c02525ef0b4eccb4dc3ecf871e8
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32822
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 05:25:56 +00:00
94b503094f
src/security: Remove unused <stdlib.h>
...
Change-Id: I0b5c375baf7911ebced2f8c43a88aae014c877ad
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33694
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 05:24:07 +00:00
dda17fa222
src: Use '#include <smp/node.h>' when appropriate
...
Change-Id: Icdd6b49751763ef0edd4c57e855cc1d042dc6d4d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36373
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-12-19 05:23:25 +00:00
88f107012a
soc/qualcomm/sdm845: Remove unused 'include <timestamp.h>'
...
Change-Id: I9b91184ee1daf4dd40f17984ef2a30756e845906
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35123
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2019-12-19 05:18:51 +00:00
4b463c71c0
mb/*/{BiosCallOuts,mainboard,romstage}.c: Remove unused <device/pci_{def,ops}.h>
...
Change-Id: I4dcdcb734e20830ac97d4a826de61017afc6ee67
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37688
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-12-19 04:36:23 +00:00
aa57187f82
mb/*/*/early_init.c: Remove unused <device/pci_{def,ops}.h>
...
Change-Id: I4cd9d22d2105c270a3d1e8a0be40b594c7c8b226
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37687
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 04:30:29 +00:00
e5476db4aa
mb/{msi,pcengines}: Remove unused <stdlib.h>
...
Change-Id: I282d02d58a5740369371a6f0bbdf7e900e3edc56
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33895
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-12-19 04:27:50 +00:00
4540a990a5
src/mainboard/amd: Remove unused <stdlib.h>
...
Change-Id: I61982309a4110f4f40193190e91224e909b575a9
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33888
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-12-19 04:25:20 +00:00
b85fe66e39
mb/{asrock,asus}: Remove unused <stdlib.h>
...
Change-Id: I14d3579f232b1dcc95b4e0653520686965dbe727
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33889
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-12-19 04:24:46 +00:00
7104cdb375
mb/{cavium,opencellular,roda,scaleway,ti}: Remove unused <stdlib.h>
...
Change-Id: Iad616e98feaebc6d5ec058fbf438ac2002a6b934
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33903
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 04:23:48 +00:00
45f05a13ed
mb/{hp,intel}: Remove unused <stdlib.h>
...
Change-Id: Ib6151ac245870a198afb71909a36a0840480d567
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33906
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-12-19 04:23:23 +00:00
98b0ae6561
mb/{gizmosphere,google}: Remove unused <stdlib.h>
...
Change-Id: If99c8ea1aa437f261e8ab3c8a164d01be8bc58e9
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33893
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-12-19 04:22:57 +00:00
20a329718e
mb/biostar: Remove unused <stdlib.h>
...
Change-Id: I03d1af0858952972c92b83375a55dbda87e69f8a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33891
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-12-19 04:13:19 +00:00
3f870446a6
src/arch/arm: Remove unused 'include <stdint.h>'
...
Change-Id: I35f3559d68866a734666b3a18038bdae628703c8
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37501
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 04:10:12 +00:00
cbea47c744
src/soc/qualcomm: Remove unused <stdlib.h>
...
Change-Id: I0bb44636f9ce6a9f96f5909926b586d0a6cedd9e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37383
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 04:07:13 +00:00
8eeff1e0f4
src/soc/nvidia: Remove unused <stdlib.h>
...
Change-Id: I404d149cd1052fa0aef233bd0e0867524c738477
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37382
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 04:06:52 +00:00
43d5f7e8ea
src/soc/rockchip: Remove unused <stdlib.h>
...
Change-Id: Ifdfd37a59273c3647802bc7cb9774e61f90fe441
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37381
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 04:06:24 +00:00
c00d46353c
src: Remove unused include <device/smbus_def.h>
...
Change-Id: Idba48b2182d38dd4945044c79c393c3fd514d720
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35988
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 03:56:04 +00:00
3c24a40d53
src: Remove unneeded 'include <delay.h>'
...
Change-Id: Ibf91c35aa389a91116463616a778212bb386756e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34230
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 03:38:20 +00:00
add0b4712d
src: Remove unused 'include <halt.h>'
...
Change-Id: Ic25022bdba15219f79cfe172dc2512c3e18bca70
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35124
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 03:35:01 +00:00
494b031eb7
arch/x86: Drop uses of ROMCC_BOOTBLOCK
...
Change-Id: Ia0405fdd448cb31b3c6ca3b3d76e49e9f430bf74
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37339
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2019-12-19 03:26:27 +00:00
1cb9cd5798
Drop ROMCC code and header guards
...
Change-Id: I730f80afd8aad250f26534435aec24bea75a849c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37334
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2019-12-19 03:25:05 +00:00
4f66cb9b28
src: Add missing include <types.h>
...
Change-Id: Iabe55bfbc8e047c0791c21d162767081a181b6c5
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37411
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 03:19:05 +00:00
3917904878
vendorcode/cavium/bdk/libbdk-hal/bdk-qlm.c: Add missing <stdlib.h>
...
Change-Id: I70029700bfb297ac06561056da730731a2ca1e8b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33682
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 03:17:51 +00:00
c184e65ed9
vendorcode/cavium/bdk/libbdk-hal/device: Add missing <stdlib.h>
...
Change-Id: I64876a2b6cffdabf3e365fc07017adb14f086ecc
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37380
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 03:17:29 +00:00
025cb700a1
vendorcode/cavium/bdk/libbdk-hal: Add missing <stdlib.h>
...
Change-Id: Id52603c525cce1bead423d188e23f6efd50511a9
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37377
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 03:17:10 +00:00
6dc2fda469
Revert "include/cpu/x86: Add STM Support"
...
This reverts commit 297b6b862ahttps://review.coreboot.org/c/coreboot/+/37096
Reviewed-by: ron minnich <rminnich@gmail.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-18 18:16:03 +00:00
1a8dbfc899
cpu/x86/mp_init: Fix typo
...
Change-Id: Iee9cd3dc51937774b990bc6f9e00bb82e0132e76
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37811
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-18 16:29:15 +00:00
eb34d8bf18
src: Remove unused 'include <bootblock_common.h>'
...
Change-Id: I9eedae837634beb5a545d97fdf9c1810faba5138
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37271
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-18 15:48:22 +00:00
f0b79daeba
src: Remove unused 'include <pc80/mc146818rtc.h>'
...
Change-Id: I72d7b83ef8c7f9b5b4b4376839279eff9b0a5f8f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37484
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-18 15:45:02 +00:00
85d44f4a5e
vboot: remove 2lib headers from Makefile
...
Only headers from firmware/lib should be imported.
As far as I can tell, nothing imports 2lib headers
directly anymore, so we can get rid of this CFLAG.
BUG=b:124141368, chromium:968464
TEST=make clean && make test-abuild
BRANCH=none
Change-Id: Ie5f3fe1d0180113b332e57ed07d4cfe563e7ecf2
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37786
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2019-12-18 09:47:40 +00:00
26060bc7c8
configs: add config.google_kevin_secdata_mock
...
This patch adds a BOARD_GOOGLE_KEVIN variant config that enables
CONFIG_VBOOT_MOCK_SECDATA. This is to ensure that Jenkins will build the
MOCK_SECDATA-specific code at least once, to be sure we don't
accidentally break it during refactoring.
Change-Id: Ib0ffaccdf4601d6bfb889ae289d1d7df18bed1fd
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37773
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Joel Kitching <kitching@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-18 06:31:39 +00:00
413a742ad9
vboot: Fix MOCK_SECDATA for new naming scheme
...
CB:37655 updated all secdata_xxx to secdata_firmware_xxx, but forgot the
code that's only compiled when MOCK_SECDATA is set. This patch fixes it.
Change-Id: Icf12fe405d7ce46345ccbdcb76f6aa1b56ed0194
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37772
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Joel Kitching <kitching@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-18 06:31:30 +00:00
297b6b862a
include/cpu/x86: Add STM Support
...
Addtions to include/cpu/x86 include for STM support.
Change-Id: I2b8e68b2928aefc7996b6a9560c52f71c7c0e1d0
Signed-off-by: Eugene D. Myers <edmyers@tycho.nsa.gov>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33985
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: ron minnich <rminnich@gmail.com>
2019-12-18 00:33:30 +00:00
7a1b60b694
mb/emulation/qemu-q35: Drop unused romcc-related Kconfig
...
Change-Id: Ib4adbd3f6e850ced1cb93e47ce4f45249dc032c5
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37338
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-12-17 18:14:14 +00:00
9612a3c32a
cpu/intel: Remove ROMCC header guards and code
...
Intel's platforms use a GCC compiled bootblock.
Change-Id: I779d7115fee75df9356873e9cc66d43280821812
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37758
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-12-17 18:13:38 +00:00
555efe4792
soc/intel/skylake: Change SA_PCIEX_LENGTH to 256MB
...
Skylake soc code sets the length of the PCIe configuration space to 64
MB while the specification allows up to 256 MB. Linux reports "acpi
PNP0A08:00: [Firmware Info]: MMCONFIG for domain 0000 [bos 00-3f] only
partially covers this bridge".
Remove "select PCIEX_LENGTH_64MB" from Kconfig so the default 256MB will
be used and the size can be reduced on the mainboard level when required.
BUG=N/A
TEST=tested on facebook monolith
Tested is by booting Linux 4.15 and analyzing the coreboot and Linux
dmesg to make sure the memory range is reported correctly and doesn't
create an overlap.
Change-Id: I8a06b9fba5ad561d8595292a73136091ab532faa
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37704
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-17 13:17:08 +00:00
f4b9ec6784
soc/intel/skylake: Add irq 11 to the LNK* _PRS
...
The _PRS for the LNK* items don't contain irq 11. So this is not
supposed to be used.
Add irq 11 to the list as there is no reason not to allow this.
BUG=N/A
TEST=tested on facebook monolith
Change-Id: I634d0ea8506a5e93359c652f74131231f5c13b02
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37690
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-17 13:16:21 +00:00
542919f370
drivers/analogix: Add anx7625 MIPI DSI/DPI to DP bridge driver
...
The ANX7625 is an ultra-low power 4K Mobile HD Transmitter designed for
portable devices. It converts MIPI DSI/DPI to DisplayPort 1.3 4K.
BRANCH=none
BUG=b:140132295
TEST=emerge-jacuzzi coreboot
Change-Id: I02ef29798b0257632e0750f09a4390b3d0226367
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35623
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2019-12-17 13:15:47 +00:00
ee8f969e1e
mb/msi/ms7721: Switch away from ROMCC_BOOTBLOCK
...
Renze Nicolai tested it on hardware: boots into Linux without problems.
Change-Id: I17e09c366ae0c9c99d5c65dd1f00672697a7c709
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37737
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-17 13:15:19 +00:00
b5ba8b6d1a
mb/intel/icelake_rvp: Remove baseboard gpio configuration support
...
Remove baseboard gpio.c and rely on variant override.
Change-Id: I4657b1aa2c81a990b750e163e948b8495d8b97c7
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37512
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-17 13:14:56 +00:00
0f9858f5a1
soc/intel/apollolake: add support for extracting LBP2 from IFWI
...
Add support for automatic extraction of the Second Logical Boot
Partition from the supplied IFWI binary.
Change-Id: Ia2a9ca233bddb8e9fb4e980f0ae5e6fcf3fc757c
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37681
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-17 13:14:40 +00:00
Elyes HAOUAS