Commit Graph

11986 Commits

Author SHA1 Message Date
Kyösti Mälkki 99c4955338 TPM: Fix i2c driver dependency
Change-Id: I59545ef734dff41ba55dcddd541c54b17b0855bb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7914
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-23 04:13:32 +01:00
Julius Werner 6af43804c5 libpayload: usb: Try to avoid reusing device addresses
We recently changed the USB stack to detach devices aggressively that we
don't intend to use. This alone is not really a problem, but it
exarcerbates the fact that our device detachment itself is not very
good. We destroy any local info about the device, but we don't properly
disable the offending port. The device keeps thinking that it's active,
and if we later try to reuse that device address for another device
things become confused.

The real fix would be to properly disable all ports that we don't intend
to use. Unfortunately, this isn't really possible in our current
device/hub polymorphism structure, and I don't want to hack a new
disable_port() callback into usbdev_t that really doesn't belong there.
We will only be able to fix this cleanly after we ported all root hubs
to the generic_hub interface.

Until then, an easy workaround is to just avoid reusing addresses as
long as possible. This is firmware, so the chance that we'll ever run
through 127 devices is really small in practice. Even if we ever fix the
underlying issue, it's probably a smart precaution to keep.

BRANCH=nyan,rambi
BUG=chrome-os-partner:28328
TEST=Boot from a hub that has an "unknown" device in an earlier port
than the stick you want to boot from, make sure you can still boot.

Original-Change-Id: I9b522dd8cbcd441e8c3b8781fcecd2effa0f23ee
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/197420
Original-Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit 28b48aa69b55a983226edf2ea616f33cd4b959e2)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Id4c5c92e75d6b5a7e8f0ee3e396c69c4efd13176
Reviewed-on: http://review.coreboot.org/7881
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-22 21:44:43 +01:00
Julius Werner 2fe505bd9a libpayload: console: Allow output drivers to print whole strings at once
The console output driver framework in libpayload is currently built on
the putchar primitive, meaning that every driver's function gets called
one character at a time. This becomes an issue when we add drivers that
could output multiple characters at a time, but have a high constant
overhead per invocation (such as the planned GDB stub, which needs to
wrap a special frame around output strings and wait for an
acknowledgement from the server).

This patch adds a new 'write' function pointer to the
console_output_driver structure as an alternative to 'putchar'. Output
drivers need to provide at least one of the two ('write' is preferred if
available). The CBMEM console driver is ported as a proof of concept
(since it's our most performace-critical driver and should in theory
benefit the most from less function pointer invocations, although it's
probably still negligible compared to the big sprawling mess that is
printf()).

Even with this fix, the problem remains that printf() was written with
the putchar primitive in mind. Even though normal text already contains
an optimization to allow multiple characters at a time, almost all
formatting directives cause their output (including things like
padding whitespace) to be putchar()ed one character at a time.
Therefore, this patch reworks parts of the output code (especially
number printing) to all but remove that inefficiency (directives still
invoke an extra write() call, but at least not one per character). Since
I'm touching printf() core code anyway, I also tried to salvage what I
could from that weird, broken "return negative on error" code path (not
that any of our current output drivers can trigger it anyway).

A final consequence of this patch is that the responsibility to prepend
line feeds with carriage returns is moved into the output driver
implementations. Doing this only makes sense for drivers with explicit
cursor position control (i.e. serial or video), and things like the
CBMEM console that appears like a normal file to the system really have
no business containing carriage returns (we don't want people to
accidentally associate us with Windows, now, do we?).

BUG=chrome-os-partner:18390
TEST=Made sure video and CBMEM console still look good, tried printf()
with as many weird edge-case strings as I could find and compared serial
output as well as sprintf() return value.

Original-Change-Id: Ie05ae489332a0103461620f5348774b6d4afd91a
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/196384
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit ab1ef0c07736fe1aa3e0baaf02d258731e6856c0)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I78f5aedf6d0c3665924995cdab691ee0162de404
Reviewed-on: http://review.coreboot.org/7880
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-22 21:44:37 +01:00
Alexandru Gagniuc 6d5657d620 hp/pavilion_m6_1035dx: Enable IOMMU
Change-Id: Ia14490c9074d35b7dde99e38b4ee169d4e4589a4
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7678
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-12-22 16:33:29 +01:00
Edward O'Callaghan afe6a69b33 amd/agesa/f15/Proc/Common/S3SaveState.c: Sync with f15tn
Change-Id: If46079c1affc7d74767c4215467fd6754b24f20c
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7576
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
2014-12-22 11:11:17 +01:00
Alexandru Gagniuc 09915c1dd9 lib/edid.c: Fix mismatch between format string and variable type
Use 'd' instead of 'hhd' when printing absolute year of manufacture. This
is the correct type in this case, as the result is autoatically promoted
to int.

Change-Id: Ice4155bb1a04f206ae55c45c260089d6971b77d1
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7885
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-22 06:20:18 +01:00
Alexandru Gagniuc 16472743ef 3dparty: Update to latest commit in blobs repository
'blobs' now contains updates which allow binary AGESA to build with clang.
Pull those in, in anticipation of re-enabling -Werror on clang builds.

Change-Id: I734de0b93ebc1e78781f1d5f48e280badc3cf8b3
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7884
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-22 06:19:28 +01:00
Kyösti Mälkki e4db49730e AGESA: Use common agesawrapper
Callout FCH_OEM_CONFIG is made during AMD_INIT_RESET, so it was required
to provide GetBiosCallOut here too.

Change-Id: I0eab858677d14536293385ca37daab3e538132e6
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7826
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20 07:28:12 +01:00
Kyösti Mälkki 296696d697 AGESA fam15tn fam15rl fam16kb: Add OemInitMid()
Change-Id: Icbad42168ec3afb7780c0c2ddc17aa405e08d693
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7825
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20 07:27:15 +01:00
Kyösti Mälkki 6e74b2cbac AGESA: Add OemCustomize hooks structure
We should potentially provide an OEM platform hook to manipulate parameters
around any entry point to AGESA. Use structure for such ops to avoid weak
functions and lots of empty function stubs.

Change-Id: I99bf7de8a1e2f183399d2216520a45d0c24fd64c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7824
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20 07:26:01 +01:00
Kyösti Mälkki 1ef67e166a AGESA: Ignore error in OemCustomizeInitEarly()
It does not really matter if we continue or return after a failed
assertion, system configuration is invalid anyway.

Change-Id: I5ba47ee3fd6c5ff97b9229f8bfc9db08873b08ca
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7823
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20 07:25:27 +01:00
Kyösti Mälkki 94e796aae6 AGESA fam15: Unify agesawrapper
Disable TSC output for now.

Change-Id: I078b4f0170aaf0ada58e464cf609c234204f8196
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7822
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20 07:24:41 +01:00
Kyösti Mälkki 25c27359d1 AGESA: Common laterunaptask()
Change-Id: I580f975aa987a333074de3d63744ad5f9008377d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7821
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20 07:24:29 +01:00
Kyösti Mälkki 94dd14f035 AGESA: Common agesawrapper_amdinitlate()
Change-Id: I3d532989559ffd7fd0f63e15c2c60bcfe5ec9101
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7820
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20 07:24:00 +01:00
Kyösti Mälkki 83f0139478 AGESA fam15: Ignore AmdCreateStruct() errors
Change-Id: I1b7c95e08d74784e0f144cd5836d46bda64a3596
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7819
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20 07:19:15 +01:00
Kyösti Mälkki 7cfc70b19b AGESA: Use memset() on agesawrappers
Change-Id: Icc8da62c6d1644e16f7db6c634796ad597c755c6
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7818
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20 07:19:03 +01:00
Kyösti Mälkki 33205f0739 AGESA fam12 fam14: Use lowercase void in agesawrappers
Change-Id: I1755796049c2c3f2090cd6a4b4e28a71b807c7c1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7817
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20 07:18:46 +01:00
Kyösti Mälkki 4a08e15086 AGESA fam14: Add amd_initenv()
Not part of wrapper to AGESA, but workaround for enable_resources().
Also remove remains of comments in non-fam14 wrappers.

Change-Id: I2526821ca283feb6a506b602b86f817f8b03b341
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7816
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20 07:18:35 +01:00
Kyösti Mälkki 48518f0d60 AGESA: Add amd_initcpuio() and amd_initmmio()
These are not wrappers for AGESA as they do not enter vendorcode at all.
We expect most of the added fixme.c file to be written without use of AMDLIB.h
and parts relocated as northbridge enable_resources().

Change-Id: Iba6d59e2a7672349208e9a65fcd2cb1094ab7d50
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7815
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20 07:18:00 +01:00
Kyösti Mälkki 5b7e54306a amd/torpedo: Drop unused code in agesawrapper
Change-Id: I4c7fdfb64689cc8ba7e00bd7966d5c5857baf7c3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7814
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20 07:17:48 +01:00
Kyösti Mälkki 24e31e28c4 AGESA fam14: Increase MMCONF region
Increase to max 64 buses, as there are no benefits of limit 16.

NOTE: It appears there is no matching (early) programming of the
region to non-posted MMIO.

Change-Id: I664789f7bd90992840e5817555cd3621c2d1e86c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7813
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20 07:17:40 +01:00
Kyösti Mälkki af87020f0a AGESA fam12: Fix MMCONF region
MMIO for non-posted region used hard-coded setting for 64 buses
while MSR programming was for 256 buses.

Change-Id: I690237dd459f7b7b4da68ae55ae9d22b79e5f255
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7812
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-12-20 07:17:32 +01:00
David Hendricks 3787d5b36a qemu-armv7: Trivial style fixes
Minor style fixes to avoid future bikeshedding.
- Opening brace for functions go on their own lines.
- use fixed-length types where appropriate.

BUG=none
BRANCH=none
TEST=it compiles
Signed-off-by: David Hendricks <dhendrix@chromium.org>

Original-Change-Id: If9855d32c8ed1f5977937806c8c4cce65dd7d450
Original-Reviewed-on: https://chromium-review.googlesource.com/196955
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Commit-Queue: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
(cherry picked from commit e2bfeed18636af6b532e2e8f118de22a658fe41b)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Conflicts:
	src/mainboard/emulation/qemu-armv7/uart.c

Change-Id: I8e09db53534802262168e65ec4cd47b96386490a
Reviewed-on: http://review.coreboot.org/7867
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-12-19 23:47:39 +01:00
Hung-Te Lin 86bd91a69a nyan*: Clear VDDIO_SDMMC3 to reset SD card reader.
When across warm reset, if VDD_3V3_SD_CARD gets power-cycled but VDDIO_SDMMC3
does not, we will get ~1.5V leakage on VDD. To fix that, we reset VDDIO_SDMMC3
to 0 along with VDD_3V3_SD_CARD in Coreboot.  Payloads must turn on VDDIO_SDMMC3
explicitly before accessing SD card.

Note the warnings of "VDD_SDMMC must set early" in comment seems only happens on
U-Boot and can be removed.

BUG=chrome-os-partner:27053
BRNACH=nyan
TEST=Ctrl-U to boot from SD card, login and type "reboot", then Ctrl-U to boot
     again. Without this patch, system will fail in loading kernel.

Original-Change-Id: I7f85995317d18587d514ea3afcff3bfea0a33e93
Original-Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/196961
Original-Reviewed-by: Gabe Black <gabeblack@chromium.org>
Original-Tested-by: Andrew Bresticker <abrestic@chromium.org>
(cherry picked from commit 2cfdb78d9dc229a3c06f19bbe137d59d923908a4)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ie7d814e0424478c35a56fbc959437ee6a555684a
Reviewed-on: http://review.coreboot.org/7866
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-12-19 23:47:07 +01:00
Hung-Te Lin 6a16f697d8 nyan*: Disable SD card reader power gpio.
When warm booting, SD card reader on Tegra 124 needs to be reset by setting
power GPIO to zero. Since we don't really access SD card in Coreboot, set it to
zero and let payloads enable power when they need to access SD cards.

CQ-DEPEND=CL:196783
BRANCH=nyan
BUG=chrome-os-partner:27053
TEST=emerge-nyan coreboot depthcharge chromeos-bootimage
     # With related changes in depthcharge, boots SD card successfully.

Original-Change-Id: I2d368eb9480c978e9e343648b58a729028c94622
Original-Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/196774
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: Andrew Bresticker <abrestic@chromium.org>
(cherry picked from commit 62bb7d04dff1a87474a8557f144b24e6b7d006ae)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I3429535d0d032f9db89d8e70a525a6281102537a
Reviewed-on: http://review.coreboot.org/7865
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-12-19 23:47:00 +01:00
Jimmy Zhang 75f701799a nyan*: Add fast link training functions
Some panels (including those on Big DVT) cannot work fine without link training
before sending the video signals, especially multi-lane Full HD panels. We need
to use the fast link training functions from kernel to support them.

BRANCH=Nyan
BUG=chrome-os-partner:28128, chrome-os-partner:28129
TEST=tested on nyan, nyan_big dvt.
     Vince verified on Full HD panels.

Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>

Original-Change-Id: Ifde8daf0ebdc6fb407610d3563f3311b2a72dbc4
Original-Reviewed-on: https://chromium-review.googlesource.com/196162
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Original-Commit-Queue: Hung-Te Lin <hungte@chromium.org>
Original-Tested-by: Hung-Te Lin <hungte@chromium.org>
(cherry picked from commit 992132ff3431fc7abba10cc8e910e36d4f3a3f7a)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I5ed091ae7a872fd674ab21f9f80267052fcd24b1
Reviewed-on: http://review.coreboot.org/7864
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-12-19 23:46:50 +01:00
Kyösti Mälkki 8548a4888a AGESA: Remove redundant redeclaration
Change-Id: I9172769c314850b384abbddf0200d5833e2a8b26
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7811
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-19 22:36:59 +01:00
Kyösti Mälkki 483bed33a9 AGESA: Only fam14 sets Ontario APU IDs
Change-Id: I3d249a1234599e3820e4ad9b852bbb03a89dd49a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7810
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-19 22:36:36 +01:00
Edward O'Callaghan 569bd3ff60 cpu/armltd/cortex-a9: Remove stub func dead code
Change-Id: Ia8246e2bdf346883072a924d8808f14f48d44bb3
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7351
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2014-12-19 22:32:13 +01:00
Alexandru Gagniuc 6c90f3334e util: Remove 'getpir' and 'mptable' tools
They create output in an obsolete form, are not actively maintained,
and the quality of the output is not better than randomly copy
pasting from other boards. These tools are no longer of any practical
value. remove them.

Change-Id: I49d7c5c86b908e08a3d79a06f5cb5b28cea1c806
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5158
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-19 21:15:18 +01:00
Paul Menzel cc47d9dcf8 libpayload: hexdump: Use `p` as conversion specifier for pointers
Change-Id: Ie5c279ef90bd9ed5e2624bf852dcff1f06531a13
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/4767
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-12-19 21:15:05 +01:00
Paul Menzel 9d3e131461 intel/i945: Use define for `BSM`
Change-Id: Ia58d8b410a145f27f0b267c115714580c366e063
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/5929
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2014-12-19 21:14:52 +01:00
Paul Menzel ccf53af8a9 libpayload/libc/hexdump.c: Take `const void *memory` as argument
`*memory` is not changed in `hexdump()` and just read so make it
`const`.

Change-Id: I9504d25ab5c785f05c39c9a4f48c21f68659a829
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/5403
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2014-12-19 21:07:22 +01:00
Kyösti Mälkki 3165c46f45 intel/truxton: Add dummy cache-as-ram region
Board has no chance of working without a cache_as_ram.inc, but without
a specified CAR region we also break builds.

Change-Id: I98e9db38c5e0a7bf4a1b8d2f8a693cc8d0c773b9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7863
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-12-19 19:48:40 +01:00
Kyösti Mälkki 36b93653e1 gigabyte/ga-b75m-d3h: Drop redundant EARLY_CBMEM_INIT
It is implied by DYNAMIC_CBMEM.

Change-Id: I6859c4950ce568fb76c7604e9e994031a3d94d78
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7857
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-12-19 19:48:01 +01:00
Alexander Couzens 69b4e3f857 beaglebone: use new arm bootblock infrastructure
8b685398 change config flags for cpu and mainboard
bootblock initialization.
Tested on beaglebone black.

Change-Id: Ifac4a18a2e380c3472f51aaa7cc7842b01a2553e
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/7190
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-12-19 19:37:37 +01:00
Alexander Couzens 8c53b751f5 arm/ti/am335x: use new arm bootblock infrastructure
commit 8b685398 (ARM: Overhaul the ARM Makefile.)
changes config flags for cpu and mainboard bootblock initialization.
Tested on beaglebone black.

Change-Id: I70cbe3abad8443c5dc71c8ba76a35973a5284477
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/7189
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-12-19 19:37:14 +01:00
Kyösti Mälkki 450335918c AMD amdfam10: Drop EXT_CONF_SUPPORT
Only used for AMD K8 siemens/sitemp_g1p1 with southbridge rs690.

Change-Id: Ie98a77ce190b1bd35996c7f25da0a0fe9819c9c3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7809
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-19 19:28:11 +01:00
Kyösti Mälkki ac7402dc11 AGESA fam12 fam14: Drop EXT_CONF_SUPPORT
Only used on non-AGESA board siemens/sitemp_g1p1 and already dropped
from other AGESA families.

Change-Id: Ifa726d38216c8b684af06af26b701daa99c42e8c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7808
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-19 19:28:00 +01:00
Kyösti Mälkki 2fa088be40 AMD binaryPI: Drop EXT_CONF_SUPPORT
Change-Id: I2ec08df2eb8e65bc759de9917894df9d0c8b1995
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7807
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-19 19:27:50 +01:00
Tobias Diedrich 992066a427 spd_cache debug: Log invalid CRC checksum
"SPD has a invalid or zero-valued CRC" is not a very useful message,
so show the actual and expected values.

Change-Id: I31a1cdacc82240c699627769d490b94f5d378e86
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Reviewed-on: http://review.coreboot.org/7393
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-12-19 19:26:15 +01:00
Edward O'Callaghan bf3a3f2040 mainboard: Strip out some dead includes
Change-Id: I0079fa089ba863c6e447bcee3440a7e0ba0f2372
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7429
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Tested-by: build bot (Jenkins)
2014-12-19 19:19:53 +01:00
Patrick Georgi 5839635add build system: allow defining alignment for cbfs-files
Just set $(filename)-align to the desired alignment,
and the build system will figure it out using
cbfstool locate.

Change-Id: I44369d947888041c21ff51ae49f9aacf510918a0
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7728
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh@gmx.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-12-19 19:02:57 +01:00
Felix Held 5eabe25a69 util/superiotool: change displayed name of chip id 0xc333 (nct6776)
nct6776f and nct6776d are just two package variants containing the same die

Change-Id: I4d319fa0e791e66ad04857dede2fdfc8e42dd45a
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/7806
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2014-12-19 19:01:47 +01:00
Felix Held 4a699d12c5 util/superiotool: fix default values for nct6776 (rev. c)
change default values according to the datasheet in revision 1.2

Change-Id: Iec1d55dd7b906a7a41940f3f8e42413922883efd
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/7805
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2014-12-19 19:01:27 +01:00
Scott Duplichan f2c9837e6f ifdtool: Add O_BINARY to open flags for Windows compatibility
Windows requires O_BINARY when opening a binary file. Otherwise
\n characters get expanded to \r\n and <ctrl>z is treated as
end of file. For compatibility with non-Windows hosts, the patch
defines O_BINARY if it is not already defined.

Change-Id: I04cd609b644b1edbe9104153b43b9996811ffd38
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-on: http://review.coreboot.org/7789
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-19 18:55:48 +01:00
Scott Duplichan e1a4dc803a arm_boot_tools: Add 'b' to fopen flags for Windows compatibility
Windows requires the 'b' (binary) flag when using fopen to open a
binary file. Otherwise \n characters get expanded to \r\n and <ctrl>z
is treated as end of file.

Change-Id: I3b85e4f9a8f7749801a39154881fe2eedd33f9b8
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-on: http://review.coreboot.org/7790
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-19 18:55:34 +01:00
Bruce Griffith 5e2053ea82 AMD 00730F01: Change Makefile to use BLOB sizes for packing
The new AMD PSP and SMU BLOBs currently have fixed sizes in the
southbridge Makefile.  Future PSP and SMU updates may require more
space and thereby cause the make to fail with cryptic error messages.
Change the makefile to compute CBFS locations and the corresponding
PSP pointer table entry values based on the actual file sizes.

Additionally, the FWM directory has expanded to 4096 bytes.  The
Avalon makefile is modified to zero-pad the FWM directory using
the "dd" system command.

There is dead code in the makefile to allow hardware validated boot
ROMs, but the option is hard-coded to be disabled.  Remove the HVB
dead code.

Change-Id: I4705cede8ed001a71bb4f49598444255c9609d52
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-on: http://review.coreboot.org/7726
Reviewed-by: Marshall Dawson <marshall.dawson@se-eng.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-12-19 18:44:24 +01:00
Martin Roth d630c133e3 southbridge/amd/cimx/sbX00/early.c: Update grammar in comments
Along with the spelling fixes, it was requested that I correct this
comment.  Updating "LocateImage() take minutes" to
"LocateImage() takes minutes" everywhere that comment occurs.

Change-Id: I28cd47476cb42ba3e404e064695a7fd97d581834
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7848
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-12-19 18:44:09 +01:00
Martin Roth 270e300e12 fsp_baytrail: Initialize LPC pads in bootblock for port 80
Port 80h codes were coming out of bootblock and romstage scrambled, or
were not coming out at all.  Initializing the LPC signal pads as LPC
fixes that issue.

Change-Id: I16943513f2eb6fe8fa58766aaa82dac182440c34
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7802
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh@gmx.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-12-19 18:43:08 +01:00