Matt Delco 54e9894353 soc/intel: fix eist enabling ... There was a bug like this for skylake that seems to have been copied to other SoCs. Signed-off-by: Matt Delco <delco@chromium.org> Change-Id: Ib4651eda46a064dfb59797ac8e1cb8c38bb8e38c Reviewed-on: https://review.coreboot.org/c/coreboot/+/39411 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2020-03-10 20:29:10 +00:00
..
acpi	src: capitalize 'PCIe'	2020-03-04 15:43:30 +00:00
bootblock	soc/intel/{cnl,icl,skl,tgl}/bootblock: Update text for DMI PCR 2774	2020-02-17 15:30:58 +00:00
include/soc	intel/soc: skl,apl,cnl,icl,tgl: add INTRUDER relevant registers	2020-03-07 20:32:46 +00:00
nhlt
romstage	soc/intel/skylake: Rename pch_init() code	2019-12-26 10:44:00 +00:00
acpi.c	soc/intel/{apl,cnl,icl,skl,tgl}: Make above 4GB MMIO resource proper	2020-01-10 08:40:57 +00:00
chip.c	{drivers,soc}/intel/fsp2_0: Move chipset specific logo handling to SoC	2019-12-19 17:49:38 +00:00
chip.h	src: capitalize 'PCIe'	2020-03-04 15:43:30 +00:00
cpu.c	soc/intel: fix eist enabling	2020-03-10 20:29:10 +00:00
elog.c	soc/intel/skylake/elog: fix BUG: pch_log_rp_wake_source requests hidden	2020-03-04 13:26:46 +00:00
finalize.c	src/soc/intel: Remove unused <stdlib.h>	2019-12-19 05:41:08 +00:00
gpio.c
graphics.c
gspi.c
i2c.c
irq.c
Kconfig	soc/intel/cpu: Select NO_FIXED_XIP_ROM_SIZE	2020-03-04 16:20:28 +00:00
lockdown.c	treewide: capitalize 'BIOS'	2020-02-17 20:11:24 +00:00
lpc.c
Makefile.inc	soc/intel/skylake: Add option to control microcode update inclusion	2019-12-06 15:14:15 +00:00
me.c	soc/intel/{common, skl, cnl, apl}: Move print_me_fw_version() to CSE lib	2020-03-02 11:38:18 +00:00
p2sb.c
pmc.c
pmutil.c	soc/intel: Add get_pmbase	2020-02-04 18:54:01 +00:00
reset.c	soc/intel/{cnl,icl,skl,tgl,common}: Make changes to send_heci_reset_req_message()	2020-02-09 19:20:44 +00:00
sd.c
smihandler.c	soc/intel/common/block: Move smihandler common functions into common code	2020-02-25 10:12:19 +00:00
smmrelocate.c	src: Use '#include <smp/node.h>' when appropriate	2019-12-19 05:23:25 +00:00
spi.c
systemagent.c
uart.c
vr_config.c	soc/intel/skylake/vr_config: Use lookup table by default	2019-12-25 09:40:00 +00:00
xhci.c