coreboot-kgpe-d16/src/soc/amd/picasso
Felix Held 916cd50edc soc/amd/*/bootblock,early_fch: rework i2c_scl_pins configuration
drive_scl in soc/amd/common/block/i2c/i2c.c writes the raw GPIO MMIO
configuration register and drives it as output, so don't initially
configure the GPIO as input with no pull up/down. This is a preparation
to use the common AMD GPIO access functions instead of the raw register
accesses, since the gpio_set function only sets the output value, but
doesn't reconfigure the direction. Using gpio_output there instead would
reconfigure the direction as well, but would result in doubling the
number of MMIO accesses, so just configure the GPIOs correctly right
away to avoid that.

TEST=The waveform on the SCL pin of I2C3 on a barla/careena Chromebook
looks exactly the same as before during the reset_i2c_peripherals call.
This was probed at the SCL pad of the unpopulated I2C level shifter on
the side that is connected to the SoC.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8e94afe0c755a02abcc722d5094e220d8781f8f5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56807
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-09-08 00:14:17 +00:00
..
acpi soc/amd/picasso/acpi/sb_fch: use AOAC offset defines 2021-06-16 16:38:15 +00:00
include/soc soc/amd/*/include/soc/gpio: remove GPIO_2_EVENT 2021-08-31 15:27:03 +00:00
psp_verstage soc/amd/cezanne: enable crypto in psp_verstage 2021-07-21 16:53:17 +00:00
acpi.c acpi: Fill fadt->century based on Kconfig 2021-08-19 18:16:04 +00:00
agesa_acpi.c soc/amd/picasso: Move IVRS generation code to common 2021-08-05 15:54:47 +00:00
aoac.c soc/amd/picasso: factor out AOAC offset defines 2021-06-16 16:38:07 +00:00
bootblock.c
chip.c soc/amd/common/block/i2c: Move SoC agnostic parts into common 2021-03-22 03:40:42 +00:00
chip.h soc/amd/*/chip.h: Correct PSPP Enum Value 2021-07-24 19:49:45 +00:00
chipset.cb soc/amd/picasso: introduce and use devicetree aliases for UART0-3 2021-06-17 14:21:58 +00:00
config.c
cpu.c soc/amd: move check_mca prototype to soc/amd/common/blocks/include 2021-07-14 21:58:59 +00:00
data_fabric.c cpu/x86/lapic: Replace LOCAL_APIC_ADDR references 2021-06-11 07:11:43 +00:00
early_fch.c soc/amd/*/bootblock,early_fch: rework i2c_scl_pins configuration 2021-09-08 00:14:17 +00:00
fch.c soc/amd/picasso/fch: change sb prefix of sb_clk_output_48Mhz to fch 2021-07-23 18:03:15 +00:00
fsp_m_params.c soc/amd/picasso: add devicetree setting for PSPP policy 2021-05-27 16:43:15 +00:00
fsp_s_params.c soc/amd/cezanne,picasso: rename fsp_params.c to fsp_s_params.c 2021-03-29 19:52:01 +00:00
fw.cfg
gpio.c soc/amd: remove special GPIO_2 override soc_gpio_hook 2021-04-08 16:47:27 +00:00
graphics.c
i2c.c trivial: Fix the tab and rearrange the lines 2021-03-22 03:41:25 +00:00
Kconfig soc/amd/picasso: select ADD_FSP_BINARIES if USE_AMD_BLOBS is selected 2021-09-04 18:32:53 +00:00
Makefile.inc soc/amd/picasso/makefile: order source files alphabetically 2021-07-20 13:33:37 +00:00
mca.c soc/amd/*/mca: factor out common MCA/MCAX check & print functionality 2021-07-15 17:03:30 +00:00
pcie_gpp.c soc/amd/{common,picasso}: Use common PCIE_GPP_DRIVER driver 2021-05-12 00:46:27 +00:00
reset.c soc/amd/picasso: remove warm reset flag code 2021-06-02 15:27:26 +00:00
romstage.c soc/amd/cezanne: Move APOB update into ramstage 2021-07-14 17:54:36 +00:00
root_complex.c soc/amd: factor out acpigen_write_alib_dptc to common code 2021-05-13 00:58:26 +00:00
sata.c
smihandler.c soc/amd/picasso/smihandler: sort includes alphabetically 2021-03-10 00:31:38 +00:00
smu.c
soc_util.c soc/amd/picasso/soc_util.c: Fix typo in macro name 2021-03-19 11:22:32 +00:00
uart.c soc/amd/picasso: factor out AOAC offset defines 2021-06-16 16:38:07 +00:00
xhci.c