Create the wyvern variant of the puff reference board by copying
the template files to a new directory named for the variant.
(Auto-Generated by create_coreboot_variant.sh version 4.1.1).
BUG=b:158269582
BRANCH=None
TEST=util/abuild/abuild -p none -t google/hatch -x -a
make sure the build includes GOOGLE_WYVERN
Signed-off-by: Paul Fagerburg <pfagerburg@google.com>
Change-Id: Id7a090058d2926707495387f7e90b3b8ed83dac7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42551
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Create the faffy variant of the puff reference board by copying
the template files to a new directory named for the variant.
(Auto-Generated by create_coreboot_variant.sh version 4.1.1).
V.2: Manually modified to keep Kconfig sorted.
BUG=b:157448038
BRANCH=None
TEST=util/abuild/abuild -p none -t google/hatch -x -a
make sure the build includes GOOGLE_FAFFY
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Change-Id: I5f14c2d6144ce3c2e48488ca81f31b3c04dc5fb9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42717
Reviewed-by: Sam McNally <sammc@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
All hatch and puff variants use 16MiB SPI flash except the legacy ones
which used 32MiB flash. Kconfig.name is updated to select
BOARD_ROMSIZE_KB_32768 only for the legacy variants and
BOARD_GOOGLE_HATCH_COMMON selects BOARD_ROMSIZE_KB_16384 by default if
BOARD_ROMSIZE_KB_32768 is not selected.
TEST=Verified using abuild --timeless that all hatch variants generate
the same coreboot.rom image with and without this change.
Change-Id: I708506182966936ea38562db8b0325470e34c908
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41662
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
VBOOT_EC_EFS is for EFS1 and EFS1 is deprecated. Puff uses EFS2
and its variants should follow.
BUG=b:157372086
BRANCH=none
TEST=emerge-puff coreboot
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I581f137b506a96df45e5bed21833856bb4f6aaa3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41806
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sam McNally <sammc@google.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
mb/google/hatch supports two different reference platforms - Hatch and
Puff. This change adds Kconfigs BOARD_GOOGLE_BASEBOARD_PUFF in
addition to BOARD_GOOGLE_BASEBOARD_HATCH to better organize the
Kconfig selections and reduce redundancy. In addition to this, a new
config BOARD_GOOGLE_HATCH_COMMON is added that selects all the common
configs for both baseboards.
TEST=Verified using abuild --timeless option that all hatch variants
generate the same coreboot.rom image with and without this change.
Change-Id: I46f8b2ed924c10228fa55e5168bf4fe6b41ec36c
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41660
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This change enables max98390 audio codec on nightfury.
BUG=b:149443429
BRANCH=firmware-hatch-12672.B
TEST=Built and checked audio function on nightfury
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com>
Change-Id: Ic9678583370cf5e41c87e35ba12f86572708fada
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41127
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Originally variants make use of a 32MB chip whereas now they
use a 16MB SPI flash. Allow for the coordination of dealing
with the transition between phases.
V.2: Leave Puff alone at the moment due to the complexity of
coordination.
BUG=b:153682192
BRANCH=none
TEST=none
Change-Id: Ic336168ea1a0055c30f718f5540209d2cf69d029
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40897
Reviewed-by: Sam McNally <sammc@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Romstage is now where software sync is performed for chromebooks.
EFS2 has been ported to romstage from Depthcharge. Puff should
follow.
This patch enables CONFIG_EARLY_EC_SYNC and disables
CONFIG_VBOOT_EC_EFS. EFS2 will be done in romstage.
BUG=b:147298634, chromium:1045217
BRANCH=none
TEST=Verify software sync succeeds on Puff.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I8d7c25f8281496c7adb282f5d4e0fc192d746e3e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40390
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
In some cases Hatch variants are not laptop form-factors such
as Puff. Ensure that the base configuration does not assume
the form factor and allow variants to elect their intended
use-case.
Note that the issue is that early ec sync needs to be
disabled for EFS2 to function correctly, see commit 6daa8c3ba5
from the FIXME line. The relationship is that desktops do not
have a battery.
BUG=b:152951181
BRANCH=none
TEST=none
Change-Id: I15dc9efa51e9d61297868df287879dfb62909e33
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40252
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Shelley Chen <shchen@google.com>
Reviewed-by: Daniel Kurtz <djkurtz@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Create the sushi variant of the hatch reference
board by copying the template files to a new directory named
for the variant.
(Auto-Generated by create_coreboot_variant.sh version 3.0.0).
BUG=None
BRANCH=None
TEST=util/abuild/abuild -p none -t google/hatch -x -a
make sure the build includes GOOGLE_SUSHI
Signed-off-by: Paul Fagerburg <pfagerburg@google.com>
Change-Id: Ie900d09ff55e695527eafe68a5a75cd4a0b6d340
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39892
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
If the ChromeOS EC uses EC early firmware selection (EFS), the AP vboot
build must also enable EC EFS. Puff EC uses EFS, so enable it in the AP
vboot build.
BUG=b:150742950
TEST=Puff can boot with EC EFS with hardware write protect enabled
BRANCH=none
Signed-off-by: Sam McNally <sammc@chromium.org>
Change-Id: I0877000b7d277106436831f2d69775c25299da9e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39273
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Puff uses the smbus to access the SPD of memory DIMMs.
It will short the SPD reading time if enabling SPD_READ_BY_WORD.
BUG=b:149360051
BRANCH=None
TEST=build puff and boot up OS
ran cbmem -t | grep FspMemoryInit
Without this patch:
950:calling FspMemoryInit 643,199 (257,588)
With this patch:
950:calling FspMemoryInit 477,714 (154,612)
Signed-off-by: Jamie Chen <jamie.chen@intel.com>
Change-Id: I161e8eb386ab604b16746f0deeecc3d6c9063c3a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38848
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
All variants of hatch are using Comet Lake and so the selection can be
done in Kconfig without requiring each variant to do the same.
Change-Id: Ief34296334ede5ba0f5f13381e92427ccc440707
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35562
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This is based on the hatch variant
BUG=b:138879565
TEST=FW_NAME="akemi" emerge-hatch coreboot depthcharge intel-cmlfsp
chromeos-bootimage look for image-akemi.*.bin generated under the
/build/hatch/firmware/
Change-Id: I1a868839e2c598f8052d37c99713bc58b21e887c
Signed-off-by: Peichao Wang <peichao.wang@bitland.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33824
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Create the Kindred variant of Hatch by taking a copy of the Hatch files
as placeholders. Kindred-specific changes will happen in future CLs.
BUG=b:133181366
BRANCH=NONE
TEST=util/abuild/abuild -p none -t google/hatch -x -a
make sure the build includes GOOGLE_KINDRED
Change-Id: I09ad3da0505d599fc3797d7fa24b4dc170dcd18b
Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32936
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Add a fmd file for 16MiB fmap, so that we can support
both 16MiB / 32MiB SPI flash ROM chips.
BUG=b:129464811
TEST=build hatch firmware image with 16MiB fmap and
verify fmap is updated by 'fuility dump_fmap'
Change-Id: Ifc0103c7fd0d99439f40a31d23422401a6dce826
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32219
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Adding Kohaku as a variant of hatch.
BUG=b:129706980
BRANCH=NONE
TEST=./util/abuild/abuild -p none -t google/hatch -x -a
make sure HATCH_KOHAKU is built as well.
Change-Id: I5b451f421f6d353005e6b73eac180dcec2e8b0c0
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32161
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Adding Hatch_whl as a variant of hatch. This is a snapshot of the WHL
version of hatch so that we can rebuild the bios images for Hatch with
WHL SoC.
BUG=b:127310803
BRANCH=NONE
TEST=./util/abuild/abuild -p none -t google/hatch -x -a
make sure HATCH_WHL is built as well.
Change-Id: I24510fa226878582a61f1846f0b56a2c65204a92
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31824
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Creating skeleton files and directories in mainboard for the new Hatch
board. This is to facilitate development for different parties
involved.
BUG=None
BRANCH=None
TEST=./util/abuild/abuild -p none -t google/hatch -x -a
Change-Id: I5fc60c178f83034abe5d846d0f4169072b66f448
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/30169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
