coreboot-kgpe-d16/src/soc/intel/apollolake
Aaron Durbin 87579aee69 soc/intel/apollolake: add LPDDR4 sku selection support
Instead of having all the mainboards put similar logic
into their own code provide common mechanism for memory
SKU selection. A function, meminit_lpddr4_by_sku(), is
added that selects the proper configuration based on the
SKU id and configuration passed in. LPDDR4 speed as well
as DRAM device density configuration is associated for
each logical channel per SKU id.

BUG=chrome-os-partner:54949
BRANCH=None
TEST=Built and used on reef for memory config.

Change-Id: Ifc6a734040bb61a58bc3d4c128a6420a71245c6c
Signed-off-by: Aaron Durbin <adurbin@chromuim.org>
Reviewed-on: https://review.coreboot.org/15559
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-07-07 20:44:54 +02:00
..
acpi soc/intel/apollolake: Add NHLT table region to ACPI global nvs 2016-06-28 22:56:22 +02:00
bootblock soc/intel/apollolake: Implement global reset handling 2016-06-24 20:33:48 +02:00
include/soc soc/intel/apollolake: add LPDDR4 sku selection support 2016-07-07 20:44:54 +02:00
acpi.c soc/apollolake: Populate fields in FADT to enable\disable SCI 2016-06-28 15:56:47 +02:00
car.c soc/intel/apollolake: Flush L1D to L2 only if loaded segment is in CAR 2016-04-22 17:27:34 +02:00
chip.c soc/apollolake: Allow enable/disable of LPSS S0ix from devicetree 2016-07-02 03:33:52 +02:00
chip.h soc/apollolake: Allow enable/disable of LPSS S0ix from devicetree 2016-07-02 03:33:52 +02:00
cpu.c soc/apollolake: SOC specific SMM code 2016-05-25 19:09:21 +02:00
dsp.c soc/intel/apollolake: Add Audio DSP device 2016-07-02 03:23:12 +02:00
exit_car.S soc/intel/apollolake: utilize postcar phase/stage 2016-03-23 14:24:44 +01:00
gpio.c soc/intel/apollolake: make internal pulls weak for gpio inputs 2016-07-07 20:44:43 +02:00
graphics.c soc/intel/apollolake: Take advantage of common opregion code 2016-05-18 07:03:44 +02:00
i2c.c soc/intel/apollolake: Add support for LPSS I2C driver 2016-07-02 01:18:22 +02:00
i2c_early.c soc/intel/apollolake: Add support for LPSS I2C driver 2016-07-02 01:18:22 +02:00
Kconfig soc/intel/apollolake: Add function to translate gpio_t into ACPI pin 2016-07-02 01:19:35 +02:00
lpc.c soc/intel/apollolake: enable RTC 2016-05-26 23:52:25 +02:00
lpc_lib.c soc/apollolake/lpc_lib: Make cros compile pass 2016-05-19 03:47:08 +02:00
Makefile.inc soc/intel/apollolake: Add Audio DSP device 2016-07-02 03:23:12 +02:00
meminit.c soc/intel/apollolake: add LPDDR4 sku selection support 2016-07-07 20:44:54 +02:00
memmap.c soc/apollolake/memmap: Switch to SIMPLE_DEVICE API 2016-05-26 23:46:25 +02:00
mmap_boot.c region: Add writeat and eraseat support 2016-06-24 20:48:12 +02:00
nhlt.c soc/intel/apollolake: add initial NHLT support 2016-07-01 03:21:09 +02:00
northbridge.c soc/intel/apollolake: fix incorrect bdsm -> tolud memory resources 2016-05-06 16:50:27 +02:00
p2sb.c soc/intel/apollolake: handle p2sb quirks 2016-07-02 03:22:32 +02:00
pmc.c soc/intel/apollolake: Add GPE routing code 2016-07-02 03:30:28 +02:00
pmutil.c soc/apollolake: Expose a function to read pmc bar 2016-06-30 16:15:53 +02:00
reset.c soc/intel/apollolake: Add utility functions for global reset 2016-06-24 20:30:45 +02:00
romstage.c soc/intel/apollolake: Let CSE know Ring Buffer Protocol is not needed 2016-07-02 03:27:12 +02:00
smi.c soc/apollolake: SOC specific SMM code 2016-05-25 19:09:21 +02:00
smihandler.c soc/intel/apollolake: provide fake PM1 SMI status bit 2016-06-12 12:52:28 +02:00
spi.c intel/apollolake: Enable prefetching and caching for BIOS reads 2016-06-23 23:11:35 +02:00
tsc_freq.c soc/intel: Update license headers 2016-04-14 16:54:33 +02:00
uart.c soc/apollolake/uart.c: Do not NOOP .set_resources() and friends 2016-05-12 04:01:58 +02:00
uart_early.c drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00