Subrata Banik 9e3ba212f3 soc/intel/cannonlake: Add option to select FSP_CAR ... This patch provides an option for non-chrome devices to make use of FSP-T for performing cache-as-ram initialization. Majority of IOTG users are using FSP-T for CAR implementation and aren't able to select FSP_CAR Kconfig from SoC without conflicting with existing CAR config. TEST=Ensure that both the Chrome platform and non Chrome OS platform can select either CAR implementation based on Kconfig options FSP_CAR or CAR_NEM_ENHANCED. By default Chrome platform choose CAR_NEM_ENHANCED Kconfig and non Chrome platforms choose FSP_CAR by default. Change-Id: If565b649fe1c2abdbcf0a740c15db7253c084ae7 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/23161 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2018-01-17 02:04:44 +00:00
..
acpi	src/soc/intel/cannonlake: Add _PRW for CNVi	2017-12-13 20:56:25 +00:00
bootblock	soc/intel/cannonlake: Program DMI PCR settings	2018-01-16 19:40:00 +00:00
include/soc	soc/intel/cannonlake: Remove redundent CNL CPUID macros	2018-01-09 09:55:23 +00:00
romstage	soc/intel/cannonlake: Program DMI PCR settings	2018-01-16 19:40:00 +00:00
acpi.c	soc/intel/cannonlake: Add support for C state and P state	2017-10-26 15:55:37 +00:00
cbmem.c
chip.c	soc/intel/cannonlake: Add support for C state and P state	2017-10-26 15:55:37 +00:00
chip.h	soc/intel/cannonlake: Correct PMC/GPIO routing information	2018-01-05 20:44:15 +00:00
cnl_lpddr4_init.c	soc/intel/cannonlake: provide LPDDR4 memory init	2018-01-07 18:45:46 +00:00
cpu.c	soc/intel/common: Add missing SoC common function into SMM library	2017-12-22 01:41:30 +00:00
finalize.c	soc/intel/cannonlake: Add finalize function	2017-10-18 17:52:11 +00:00
gpio.c	soc/intel/cannonlake: Correct PMC/GPIO routing information	2018-01-05 20:44:15 +00:00
graphics.c	soc/intel/cannonlake: Initialize DDI-A lane in Normal mode	2018-01-08 19:14:13 +00:00
gspi.c	soc/intel/{cannonlake,skylake}: Add _soc_ prefix in spi soc routine	2017-11-11 18:19:31 +00:00
i2c.c	ic2/designware: Move Intel i2c logic to shared driver	2017-12-22 16:39:42 +00:00
Kconfig	soc/intel/cannonlake: Add option to select FSP_CAR	2018-01-17 02:04:44 +00:00
lockdown.c	soc/intel/cannonlake: Add finalize function	2017-10-18 17:52:11 +00:00
lpc.c	soc/intel/cannonlake: Program DMI PCR settings	2018-01-16 19:40:00 +00:00
Makefile.inc	soc/intel/cannonlake: Program DMI PCR settings	2018-01-16 19:40:00 +00:00
memmap.c	soc/intel/cannonlake: Use EBDA structure to store soc reserve memory size	2017-10-19 17:36:16 +00:00
pmc.c	soc/intel/cannonlake: Implement pmc_soc_restore_power_failure as per EDS	2017-12-21 04:19:46 +00:00
pmutil.c	soc/intel/cannonlake: Initialize PMC controller	2017-12-02 03:20:15 +00:00
reset.c	soc/intel: Treat time-out as failure in HECI	2017-12-22 16:54:36 +00:00
sd.c	soc/intel/cannonlake: Use SCS common code	2017-11-01 17:42:30 +00:00
smihandler.c	soc/intel/{apollolake, cannonlake, common, skylake}: Add _soc_ prefix in weak function	2017-12-23 05:23:09 +00:00
smmrelocate.c	soc/intel/cannonlake: Fill the SMI usage	2017-10-03 20:23:41 +00:00
spi.c	soc/intel/cannonlake: Make use of Intel SPI common block	2017-11-11 18:19:58 +00:00
systemagent.c	soc/intel/cannonlake: Initialize PMC controller	2017-12-02 03:20:15 +00:00
uart.c	soc/intel/cannonlake: Fix UART2 serial log broken issue	2017-12-14 18:39:01 +00:00
vr_config.c	soc/intel/cannonlake: Init UPD params based on config	2017-08-25 18:24:33 +00:00