Lijian Zhao d5d89c8a55 soc/intel/cannonlake: Fix pcie clock number ... Cannonlake PCH LP have total 6 pcie clocks and Cannonlake PCH H have total 16 pcie clocks. It is different with pcie root port numbers. BUG=CID 1381814 TEST=Build and boot up fine on sarien platform. Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Change-Id: I909b5b584c596e6fe878ffe24d9cabc53c4576ed Reviewed-on: https://review.coreboot.org/c/coreboot/+/32672 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: John Zhao <john.zhao@intel.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>		2019-05-09 18:05:00 +00:00
..
acpi	soc/intel/cannonlake/acpi: Add board level s0ix call back	2019-05-06 10:34:35 +00:00
bootblock	soc/intel/cannonlake: Add report for iGD 0x3ea1	2019-04-19 01:40:45 +00:00
include/soc	soc/intel: Add GPI interrupt config register offset info	2019-04-29 12:18:27 +00:00
romstage	soc/{amd,intel}/chip: Use local include for chip.h	2019-04-26 16:49:13 +00:00
acpi.c	soc/{amd,intel}/chip: Use local include for chip.h	2019-04-26 16:49:13 +00:00
cbmem.c	src: Use tabs for indentation	2018-10-08 09:46:16 +00:00
chip.c	soc/{amd,intel}/chip: Use local include for chip.h	2019-04-26 16:49:13 +00:00
chip.h	soc/intel/cannonlake: Fix pcie clock number	2019-05-09 18:05:00 +00:00
cnl_memcfg_init.c	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	2019-03-08 08:33:24 +00:00
cpu.c	soc/{amd,intel}/chip: Use local include for chip.h	2019-04-26 16:49:13 +00:00
elog.c	soc/intel/cannonlake: Fix GEN_PMCON bit checks	2019-03-15 19:52:30 +00:00
finalize.c	soc/{amd,intel}/chip: Use local include for chip.h	2019-04-26 16:49:13 +00:00
fsp_params.c	mb/google/sarien: Disable S5 wake on LAN by default	2019-05-01 20:07:48 +00:00
gpio.c	soc/intel: Add GPI interrupt config register offset info	2019-04-29 12:18:27 +00:00
gpio_cnp_h.c	soc/intel: Add GPI interrupt config register offset info	2019-04-29 12:18:27 +00:00
graphics.c	src: Drop unused 'include <arch/acpigen.h>'	2019-03-12 07:27:28 +00:00
gspi.c	soc/intel/common/block: Move gspi common functions into block/gspi	2018-06-06 06:25:50 +00:00
i2c.c	soc/intel/common/block: Move i2c common functions into block/i2c	2018-06-06 06:26:11 +00:00
Kconfig	soc/intel/cannonlake: Fix pcie clock number	2019-05-09 18:05:00 +00:00
lockdown.c	device/mmio.h: Add include file for MMIO ops	2019-03-04 15:57:39 +00:00
lpc.c	src: Use include <delay.h> when appropriate	2019-04-06 16:09:12 +00:00
Makefile.inc	soc/intel/cannonlake: Implement soc side VMX support	2019-04-16 14:37:53 +00:00
memmap.c	soc/{amd,intel}/chip: Use local include for chip.h	2019-04-26 16:49:13 +00:00
nhlt.c	src: Remove unneeded include <console/console.h>	2018-11-16 09:50:29 +00:00
p2sb.c	soc/intel/common/block: Move p2sb common functions into block/p2sb	2018-06-28 08:35:29 +00:00
pmc.c	soc/{amd,intel}/chip: Use local include for chip.h	2019-04-26 16:49:13 +00:00
pmutil.c	src: Use #include <timer.h> when appropriate	2019-04-06 16:02:49 +00:00
reset.c	src: Use #include <timer.h> when appropriate	2019-04-06 16:02:49 +00:00
sd.c
smihandler.c	soc/{amd,intel}/chip: Use local include for chip.h	2019-04-26 16:49:13 +00:00
smmrelocate.c	device/pci: Fix PCI accessor headers	2019-03-01 20:32:15 +00:00
spi.c	soc/intel/common/block: Move gspi common functions into block/gspi	2018-06-06 06:25:50 +00:00
systemagent.c	soc/intel/cnl: Generate DMAR ACPI table	2019-04-18 10:15:55 +00:00
uart.c	src: include <assert.h> when appropriate	2019-04-23 10:01:36 +00:00
vr_config.c	soc/intel/cannonlake: Define VR settings	2019-02-15 16:23:28 +00:00