Commit Graph

21782 Commits

Author SHA1 Message Date
Nico Huber c587b971dd soc/intel/skylake: Set generic I/O decode ranges early
Move the generic I/O decode range setup before the console init.

TEST=Run on kontron/bsl6 which requires 0xa80/0xa81 decoded to
     initialize serial ports. Serial console works from boot-
     block on.

Change-Id: I9829f188c80eb73f6cd91b0c22e1c07da5745ad6
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20478
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-07-11 11:34:44 +00:00
Kyösti Mälkki 7104fe2618 binaryPI: Define AGESA blob in CBFS as Kconfig string
Change-Id: I0f78cb275ecad732f81c609564a0640f03d2559e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/19983
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2017-07-11 06:50:47 +00:00
Kyösti Mälkki bf2d219996 binaryPI boards: Drop unused header
We remove this particular header file already while remaining
of include fixes is longterm and pending work.

Change-Id: I869d426c1344290a00e2df60e07e9a4a3ae26887
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/19950
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-07-11 06:50:19 +00:00
Patrick Georgi 8f2cdad882 crossgcc: Prefer gnatgcc over gcc if available
For distros that package and version gnat independently from gcc (such
as Ubuntu), try to build with gnatgcc first.
This fixes the issue of gcc -print-prog-name=gnat1 failing because gcc
is of a different version.

Change-Id: Icec6d1fba8855e88ac91d47842dcb7f6b9d35461
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/20517
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-07-11 06:08:16 +00:00
Ryan Salsamendi 5d09d48050 drivers/intel/gma: Fix undefined behavior
Fix undefined behavior found by clang's -Wshift-sign-overflow, find,
and source inspection. Left shifting an int where the right operand is
>= the width of the type is undefined. Add UL suffix since it's safe
for unsigned types.

Change-Id: I5240a19647c8ad59f64925f3e1c199446a886d2d
Signed-off-by: Ryan Salsamendi <rsalsamendi@hotmail.com>
Reviewed-on: https://review.coreboot.org/20466
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-07-10 18:15:26 +00:00
Ryan Salsamendi 3f2fe18965 southbridge/intel/lynxpoint: Fix undefined behavior
Fix undefined behavior found by clang's -Wshift-sign-overflow, grep,
and source inspection. Left shifting an int where the right operand is
>= the width of the type is undefined. Add UL suffix since it's safe
for unsigned types.

Change-Id: I10db2566199200ceb3068721cfb35eadb2be1f68
Signed-off-by: Ryan Salsamendi <rsalsamendi@hotmail.com>
Reviewed-on: https://review.coreboot.org/20464
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-07-10 18:15:11 +00:00
Matt DeVillier 2fdf895867 google/chell: remove non-existent touchscreen
Chell doesn't have a touchscreen, so remove the driver
definition from devicetree.  Leave the PCI device function 0
enabled since disabling results in the touchpad (function 1)
being disabled as well.

Change-Id: I32619b7618bc0cdd99fa54fdda9bf2b5c1bb79a4
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/20498
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-07-10 18:08:09 +00:00
Pratik Prajapati a04aa3d566 sgx: Move SGX code to intel/common/block
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX controls building. The SGX feature
is still enabled from devicetree.cb. As of now this SGX init supports
only KBL (SKL not tested). Support of SGX for new SOCs would be added
incrementally in this common code base.

Change-Id: I0fbba364b7342e686a2287ea1a910ef9a4eed595
Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/20173
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-07-10 17:16:26 +00:00
Kyösti Mälkki 8c94e14a0c amd/gardenia: Fix includes after platform change to soc/
Change-Id: I63c6febf8ba953a642fd7b04a555a4c6704abc79
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20496
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-07-08 23:18:07 +00:00
Martin Kepplinger 9460a986e1 soc/amd/stoneyridge/northbridge.c: remove unnecessary null check
Checking for NULL here doesn't help here. We *rely* on cdb_dev to exist
directly before this check. Coverity had found this:

*** CID 1376664:  Null pointer dereferences  (REVERSE_INULL)
/src/soc/amd/stoneyridge/northbridge.c: 666 in cpu_bus_scan()
660     	  * this silicon. It is an SOC and can't have  >= 16 APICs, but
661     	  * we will start numbering at 0x10. We also know there is only
662     	  * on physical node (module in AMD speak).
663     	  */
664
665     	lapicid_start = 0x10; /* Get this from devicetree? see comment above. */

CID 1376664:  Null pointer dereferences  (REVERSE_INULL)
Null-checking "cdb_dev" suggests that it may be null, but it has already been
dereferenced on all paths leading to the check.

666     	enable_node = cdb_dev && cdb_dev->enabled;
667     	cpu_bus = dev->link_list;
668
669     	for (j = 0; j <= siblings; j++ ) {
670     		apic_id = lapicid_start + j;
671     		printk(BIOS_SPEW, "lapicid_start 0x%x, node 0x%x,  core 0x%x,  apicid=0x%x\n",

Change-Id: Ic6a53df8b8d1596ad0eb1d8f0fa200cccf9509cf
Signed-off-by: Martin Kepplinger <martink@posteo.de>
Reviewed-on: https://review.coreboot.org/20415
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-07-08 19:07:18 +00:00
Matt DeVillier 99acf27d3f samsung/lumpy: change HDA codec SSID to fix Windows
With the existing SSID, the driver loaded by Windows results
in the headphone jack and internal mic being non-functional.
With the new SSID, the a functional driver is loaded and
everything works correctly.  Linux works correctly with
either SSID so the change has no impact there.

New SSID extracted from Windows drivers (.inf).

Change-Id: I4195d00d6b18dcd0039747d9883cdf8e1a76f461
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/20485
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-07-08 19:06:30 +00:00
Matt DeVillier aa95af6bf0 ec/mec1308: Fix fan control ACPI
Returing FSL# for _STA causes Windows to BSOD. Re-work _STA to instead
return 0/1 based on FLVL, using google/beltino as a model.

Also correct serialization type for  _CRS.

Change-Id: Ibf3af15bab3590f7c1c4401e1978dbcf2a495216
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/20482
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-07-08 19:06:00 +00:00
Matt DeVillier b3d4abe208 samsung/lumpy: fix comments in hda_verb.c
Fix comments to reflect correct manufacturer/model, SSID.

Change-Id: Ibaa39fbb8081393ef4696c6f2470a546e801f483
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/20481
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-07-08 19:05:40 +00:00
Martin Roth 65822a5222 src/vendorcode: add IS_ENABLED() around Kconfig symbol references
Change-Id: I891cb4f799aaafcf4a0dd91b5533d2f8db7f3d61
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20357
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-07-08 19:03:42 +00:00
Martin Roth 1d721ed08b Makefile: update clean-utils & distclean-utils
Distclean-utils target was missing a backslash at the end to continue on
the next line.

Change-Id: I2bddff342f9c0fcb27e9b40ac94377c60ba5b7fe
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-07-08 19:02:26 +00:00
Martin Roth 96734f1b45 superio/ite/it8716f: Update init_ec
This is a follow-on to the superio IS_ENABLED() patch:
https://review.coreboot.org/#/c/20351/1

Change-Id: I7d070e3964609947959de60e2686dfe59fe77e1c
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20490
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-07-08 19:02:13 +00:00
Martin Roth 77a58b92e8 nb/amd: add IS_ENABLED() around Kconfig symbol references
Some of these can be changed from #if to if(), but that will happen
in a follow-on commmit.

Change-Id: I763cbbc31dcd4cdd128c04793a742ab6daaf5f0c
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20345
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-07-08 19:01:19 +00:00
Martin Roth 3c35ad9053 src/northbridge: add IS_ENABLED() around Kconfig symbol references
Change-Id: I1095944e65bfacd9e878840cc88f8a0a24ecde72
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20347
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-07-07 21:32:27 +00:00
Patrick Rudolph 894977b2cd x86/acpigen: Fix acpigen_write_field
The current code doesn't work for field with size > 0x3f.
Fix that by using the correct syntax, reverse engineered using iasl.

Refactor to reuse existing code.

Tested on GNU Linux 4.9 and iasl.

Change-Id: Iac3600f184e6bd36a2bcb85753110692fbcbe4b6
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/19435
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
2017-07-07 21:09:53 +00:00
Patrick Georgi 4eb84cf878 util/crossgcc: Fix typo
buildgcc was copied to $DEST/share/buildgcc-$VERSION-, missing the
commit id description.

Change-Id: I83d2074b6466b0d99507845dc714a11ab2c58271
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/20487
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-07-07 19:05:44 +00:00
Patrick Rudolph 7ffb329f27 mb/lenovo/*/cmos: Port USB Always On
Port commit f1395d82: "ec/lenovo/h8: Add USB Always On"
to other Thinkpad boards, as it seems to work fine on all
generations.

Change-Id: I6dcbfaae2a444d9a679ecb64a87dc2a59b8fd281
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/20106
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-07-07 17:20:09 +00:00
Patrick Rudolph b21f5d708a ec/lenovo/h8/smm: Support USB always on AC only
Add support for UAO AC only mode.
Needs tests on all platforms.

Change-Id: Ib52aab427ff687b00129024cde65b78060d21e32
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/20450
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-07-07 17:19:09 +00:00
Martin Roth f8574bf4a7 src/superio: add IS_ENABLED() around Kconfig symbol references
Change-Id: Ie9a7127b50db8dc9a2b543843ca4d815afe3d07e
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20351
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-07-07 16:06:49 +00:00
Martin Roth 898a77521d arch/*: Update Kconfig symbol usage
- Update all symbols to use IS_ENABLED()
- Update non-romcc usage to use 'if' instead of '#if' where it
makes sense.

Change-Id: I5a84414d2d1631e35ac91efb67a0d4c1f673bf85
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20005
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-07-07 16:05:16 +00:00
Patrick Georgi 50bda05e46 util/cbfstool: demote FV handling errors to debug
It's rather normal that a few bytes are skipped.

Change-Id: I9371afdbb3ad05de7645bfbf257e4f4bfa2feddb
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/20469
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-07-07 09:01:29 +00:00
Patrick Georgi 8320b9a997 util/cbfstool: demote not-ELF error to debug
It's irritating when adding tianocore payloads - those are not
ELF, but that's deliberate.

Change-Id: I76d9367b28545348f526e5f0b8216f9ff2a3d636
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/20468
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-07-07 09:01:28 +00:00
Ryan Salsamendi b9bc2571be northbridge/intel/haswell: Fix undefined behavior
Fix undefined behavior found by clang's -Wshift-sign-overflow, grep,
and source inspection. Left shifting an int where the right operand is
>= the width of the type is undefined. Add UL suffix since it's safe
for unsigned types.

Change-Id: Id1ed2252ce3ed052730dd10b24c453c34c2ab4ff
Signed-off-by: Ryan Salsamendi <rsalsamendi@hotmail.com>
Reviewed-on: https://review.coreboot.org/20465
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-07-06 20:20:12 +00:00
Ryan Salsamendi 70c27de571 cpu/intel/haswell: Fix undefined behavior
Fix undefined behavior found by clang's -Wshift-sign-overflow. Left
shifting an int where the right operand is >= the width of the type
is undefined. Add UL suffix since it's safe for unsigned types.

Change-Id: Ieacf83d052bf4abfad639ef8e592bd8de17d16e6
Signed-off-by: Ryan Salsamendi <rsalsamendi@hotmail.com>
Reviewed-on: https://review.coreboot.org/20467
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-07-06 20:19:25 +00:00
Elyes HAOUAS 25dbc17a36 smbios: Correct the system enclosure types
Regarding the "System Management BIOS Reference Specification"
Version: 3.1.1, Date: 2017-01-12, Laptop system enclosure is 0x09
and for Notebook it is 0x0a

Change-Id: I5538be0b434eed20d76aef6f26247e46d1225feb
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/20463
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-07-06 08:51:24 +00:00
Elyes HAOUAS ccd233b4bc sb/intel/i82870: Add whitespace around '<<'
Change-Id: Ic8b0e6404a3f90312f7d2d3b6c367b0a1d9ec6e2
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/20460
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-07-06 08:49:44 +00:00
Elyes HAOUAS 9858796a1b sb/intel/ibexpeak: Add whitespace around '<<'
Change-Id: Ib3a69f45b48c19c61b12a992b23dad1693bf5f9e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/20459
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-07-06 08:49:37 +00:00
Elyes HAOUAS a0aea5669b sb/intel/lynxpoint: Add whitespace around '<<'
Change-Id: I1b2a16e8eb70819c72efd50f30a57f3687f31bb5
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/20458
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-07-06 08:49:30 +00:00
Elyes HAOUAS ddb64d33a0 sb/intel/i82801gx: Add whitespace around '<<'
Change-Id: I8ea8fdb031c09aac9ed4a0705c3204f87aadb565
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/20457
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-07-06 08:49:25 +00:00
Martin Roth 43927bae18 mainboard/[m-w]: add IS_ENABLED() around Kconfig symbol references
Change-Id: Ifba3257b0328d0b6ad1bee9bf885683998df5851
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20344
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-07-06 00:20:06 +00:00
Martin Roth 356b519049 mainboard/[g-l]: add IS_ENABLED() around Kconfig symbol references
Change-Id: I1f906c8c465108017bc4d08534653233078ef32d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20343
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-07-06 00:19:56 +00:00
Martin Roth f95911ad37 mainboard/[a-e]: add IS_ENABLED() around Kconfig symbol references
Change-Id: Icca8bac5e67f83dfc5a8f5ef1cb87c6432e0a236
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20342
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-07-06 00:19:48 +00:00
Martin Roth 1bf55b4070 src/lib: add IS_ENABLED() around Kconfig symbol references
Some of these can be changed from #if to if(), but that will happen
in a follow-on commmit.

Change-Id: Idcea3f8b1a4246cb6b29999a84a191a3133e5c78
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20341
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-07-06 00:19:37 +00:00
Lee Leahy 5764cbbf91 soc/intel/quark: Add I2C debugging
Add I2C debugging support:
* Add I2C_DEBUG Kconfig value to enable debugging
* Display I2C segments before the transfer
* Display errors that occur during the transfer
* Display the number of bytes transferred for successful transfers

TEST=Build and run on Galileo Gen2

Change-Id: Ia17be8b4213b13fd6c6a367d081414d0f21fbb0f
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/20422
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
2017-07-03 23:30:50 +00:00
Hannah Williams 12bed18951 soc/intel/apollolake: Use common gpio for apollolake
No regression observed on a APL platform

Change-Id: I0fcc22df5eaec014f3b89755415f051b05aa554a
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/19949
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-07-03 23:29:49 +00:00
Martin Roth 5b2954e62d vendorcode/amd/pi: Update AGESA_CFLAGS
* Split the existing cflags to a second line to stay under 80 characters
* Correctly identify the libagesa "Stage" by adding the __LIBAGESA__
define to the files when they're compiled.  This matches stage
defines such as __BOOTBLOCK__, __ROMSTAGE__, and __RAMSTAGE__. This is
needed to have printk actually show console information on whatever
interface the user has selected, such as the serial port, speaker,
SPI rom, or something else that hasn't been thought of yet.

Change-Id: I2a64414491130275ba06e5bd76e0b01e450174e8
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20423
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-07-03 23:27:59 +00:00
Martin Roth de0acb5583 vendorcode/amd/pi/Lib/amdlib.c: remove StdHeader references
Nothing in the amdlib.c file actually uses the StdHeader structure, so
remove the asserts verifying that it's not null, and remove references
to it from calls.

For now, I've left it in the parameters for the functions for
compatibility, but we might want to remove these at some point as well.

Change-Id: Ib13e9209c8119fdcc3720470aaa9dcdbde6ac388
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20451
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2017-07-03 23:27:16 +00:00
Ryan Salsamendi dab81a4e26 northbridge/intel/haswell: Fix copy paste error
DIMMB's DDR width is in bit 20, not bit 19.

Change-Id: I48866d9243c2a576a02519724429801ae47c5644
Signed-off-by: Ryan Salsamendi <rsalsamendi@hotmail.com>
Reviewed-on: https://review.coreboot.org/20445
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-07-03 17:15:50 +00:00
Ryan Salsamendi 312b23522a cpu/x86/name: Fix undefined behavior
Fixes report found by undefined behavior sanitizer. Dereferencing a
pointer that's not aligned to the size of access is undefined behavior.
Remove unnecessary memset().

Change-Id: I1362a3eb8c97f5c7e848d75f8d1a219968a7ef9e
Signed-off-by: Ryan Salsamendi <rsalsamendi@hotmail.com>
Reviewed-on: https://review.coreboot.org/20452
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-07-03 17:15:28 +00:00
Ryan Salsamendi fa0725dead northbridge/intel/haswell: Fix undefined behavior
Fix reports found by undefined behavior sanitizer. Left shifting an int
where the right operand is >= the width of the type is undefined. Add
UL suffix since it's safe for unsigned types.

Change-Id: If2d34e4f05494c17bf9b9dec113b8f6863214e56
Signed-off-by: Ryan Salsamendi <rsalsamendi@hotmail.com>
Reviewed-on: https://review.coreboot.org/20447
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-07-03 10:33:16 +00:00
Ryan Salsamendi 889ce9c91e southbridge/intel/lynxpoint: Fix undefined behavior
Fixes report found by undefined behavior sanitizer. Dereferencing a
pointer that is not aligned to the size of access is undefined behavior.

Change-Id: Ia3c95e36e8b7f88ed69d5339e299c40934cb87da
Signed-off-by: Ryan Salsamendi <rsalsamendi@hotmail.com>
Reviewed-on: https://review.coreboot.org/20446
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-07-03 10:31:58 +00:00
Martin Kepplinger d9d351d251 soc/intel/quark/spi.c: Explain a read in order to flush buffers
In order for this (seemingly unnecessary) status assignment to stay, let's
explain it in a comment.

Change-Id: I0a364539c37005cfd637b75c8cc23b84e274294d
Signed-off-by: Martin Kepplinger <martink@posteo.de>
Reviewed-on: https://review.coreboot.org/20411
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-07-02 19:30:08 +00:00
Martin Roth e7d0a37501 drivers/spi: add IS_ENABLED() around Kconfig symbol references
Some of these can be changed from #if to if(), but that will happen
in a follow-on commmit.

Change-Id: If80e0c4e1c9911b44853561b03aef1c741255229
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20339
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-07-02 18:56:25 +00:00
Ryan Salsamendi 0d9b360b42 southbridge/intel/lynxpoint: Fix undefined behavior
Fix reports found by undefined behavior sanitizer. Left shifting an int
where the right operand is >= the width of the type is undefined. Add
UL suffix since it's safe for unsigned types.

Change-Id: I755b3c80a8d1b6cb6b6e5f411c6691e5dd17c266
Signed-off-by: Ryan Salsamendi <rsalsamendi@hotmail.com>
Reviewed-on: https://review.coreboot.org/20443
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-07-02 18:54:39 +00:00
Ryan Salsamendi 0c731b512a mainboard/google/slippy: Fix misspelled ifdef guard
Change-Id: Ie8347a3eccce51de3e938d0c3c170e59a9f74716
Signed-off-by: Ryan Salsamendi <rsalsamendi@hotmail.com>
Reviewed-on: https://review.coreboot.org/20442
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-07-02 18:54:30 +00:00
Andrey Petrov ab85e2b816 soc/intel/cannonlake: Add bootblock.c
Change-Id: Ia951a466479b1e98e49895705162a66aece7609b
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/20065
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-07-02 18:51:29 +00:00