Commit Graph

14793 Commits

Author SHA1 Message Date
Ronald G. Minnich 36c00aa39b fix adjustment for sizeram
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-18 22:40:53 +00:00
Ronald G. Minnich 61083dad0f add back in missing line
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2258 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-18 21:34:32 +00:00
Ronald G. Minnich 55e10fe3a4 set up timing
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2257 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-18 21:21:10 +00:00
Ronald G. Minnich 170ce333ca add ram resources
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2256 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-18 20:42:58 +00:00
Ronald G. Minnich df46cb205d added the olpc target and support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2255 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-18 16:36:58 +00:00
Ronald G. Minnich ea9db56d0e add SystemPreInit() and support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2254 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-13 19:44:50 +00:00
Li-Ta Lo d8d8fffa0e minor modification
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2253 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-13 17:00:38 +00:00
Stefan Reinauer cf648c9a99 this was in my queue since 2005/10/26
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2252 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-11 19:23:57 +00:00
Stefan Reinauer fbce0ffb92 small fixes to get Ward Vandewege's Tyan board booting.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2251 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-11 18:36:42 +00:00
Ronald G. Minnich 4b8cf1d30a added chipsetinit function, many defines. addec call to chipsetinit to
northbridge.c
builds fine on lippert


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-10 23:32:23 +00:00
Ronald G. Minnich 45f6c5e3d4 add cpureginit to romcc code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2249 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-10 16:40:19 +00:00
Ronald G. Minnich 526b2c429e clean up gx2def.h a bit.
Add cpureginit.c
added called to cpureginit to model_gx2_init.c


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2248 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-10 16:14:19 +00:00
Stefan Reinauer 5346533656 drop unsupported momentum apache board. Check
http://snapshots.linuxbios.org/stats/abuild-LinuxBIOSv2-2247.log



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2247 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-08 10:04:43 +00:00
Yinghai Lu 2a9fcb79f4 15->11 for device num
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2246 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-07 20:35:39 +00:00
Ronald G. Minnich 4223188335 add support for GLIUInit()
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2245 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-07 16:55:20 +00:00
Ronald G. Minnich 40fedaf6a9 add northbridgeinit, also add new constants.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2244 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 23:35:52 +00:00
Stefan Reinauer 29e2726c4a pseudo fix xe7501devkit
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2243 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 22:50:26 +00:00
Ronald G. Minnich f01f154635 fix constants style
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2242 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 21:45:24 +00:00
Stefan Reinauer 84e4bf69c7 interesting behavior, i thought svn could do moves.
the result should be ok though..

the purpose is dropping the old i82801er southbridge code
and using the ich5r code instead because its the same chip
but the code looks more solid and is used by many more systems.

Some of the old i82801er features have been ported (like hpet enable)



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2241 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 21:40:36 +00:00
Stefan Reinauer 966d0e6d70 break the tree really quick due to svn restrictions, next commit fill fix it
again.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2240 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 21:37:10 +00:00
Ronald G. Minnich 44f72eb3a3 add bug support for 2.1
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2239 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 20:45:10 +00:00
Li-Ta Lo 69085400f1 reformat
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2238 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 20:23:29 +00:00
Li-Ta Lo 5917c62749 more fix for vsm, not working yet
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2237 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 20:19:04 +00:00
Li-Ta Lo 8854d30d6e did I commit the last change?
try to fix 0x10000026


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2235 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03 22:20:05 +00:00
Yinghai Lu 81efd7ab6d comment out reset from MB Config
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2234 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03 21:29:48 +00:00
Yinghai Lu b66f54ac6e comment out reset in MB Config
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2233 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03 21:24:05 +00:00
Yinghai Lu 9a791dffea new cache_as_ram support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03 20:38:34 +00:00
Richard Smith ffb7d8a31a - Adds support for the Advantech eval board. Configuration was produced
on a SOM-DB2301 baseboard with a SOM-2354 cpu module.

- Also does a slight tweak to the ram test code to make it more
obvious when it fails.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2231 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-01 04:10:44 +00:00
Stefan Reinauer 4b539d78ab * https://openbios.org/roundup/linuxbios/issue96 - SST_49LF040B flash support for flashrom
* https://openbios.org/roundup/linuxbios/issue99 - add ICH4-M support to flashrom

both from scott.tsai <AT> arima.com.tw



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2230 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-31 11:36:06 +00:00
Stefan Reinauer 1f64c13381 * support for Winbond W39V040A
* Support for ATI SB400 (RS480 chipset)
* Support for Intel ICH7 (from Scott Tsai, scott.tsai <AT> arima.com.tw)


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2229 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-31 11:26:55 +00:00
Stefan Reinauer c3efd138a7 trying to translate some of this.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2228 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-26 17:13:31 +00:00
Stefan Reinauer 96f8fb5723 make older winbond chips work reliably.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2227 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-23 19:26:40 +00:00
Ronald G. Minnich 1a971bddcf fix bit-twiddling errors on msr
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2226 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-22 17:30:48 +00:00
Ronald G. Minnich 96cb656806 added this file
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2225 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-22 16:25:49 +00:00
Ronald G. Minnich cd6985bce3 vsm can be called now, and then hang.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2224 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-21 23:24:33 +00:00
Ronald G. Minnich 7f809097f8 add vsm support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2223 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-21 15:24:46 +00:00
Ronald G. Minnich e4ad801495 cpubug is fine.
adding vsm support now.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2222 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-21 03:38:53 +00:00
Ronald G. Minnich 316ea53e29 fix conflich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2221 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-20 22:20:09 +00:00
Stefan Reinauer a11e6cfd92 compilation fix for gcc 4.0.2 (SUSE10)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2220 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-20 21:37:54 +00:00
Li-Ta Lo af9484a2a8 resolve conflict
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2219 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-20 21:18:53 +00:00
Ronald G. Minnich db44be9405 added definitions. added cpubug support. added object. Commented out
msr set in northbridge that conflicted with the cpubug support. 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2218 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-20 20:49:34 +00:00
Stefan Reinauer 1293041db0 some more information on the ts series
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2217 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-20 19:02:31 +00:00
Ronald G. Minnich c4ca49bfec add a define
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2216 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-20 17:31:02 +00:00
Stefan Reinauer e2632fdbb9 redo ts5300 auto.c
add ts5300 flag as comment in flashrom utility Makefile


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2215 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-19 22:30:42 +00:00
Stefan Reinauer 3cb4dc9c6b small cleanup attempt in sc520 code. there needs to be some major spring
cleaning


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2214 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-19 17:50:54 +00:00
Stefan Reinauer 677267a82a small ts5300 update, fix endian problem in dummmcr.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2213 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-18 00:10:29 +00:00
Ronald G. Minnich 34407063c2 added initial msr support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2212 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-17 23:03:04 +00:00
Stefan Reinauer dba3f846f0 - sc520 updates. move PAR setup to mainboard auto.c
- some ts5300 code. Let's push this upstream for now.
- fix a typo in device.c


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2211 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-17 22:48:23 +00:00
Stefan Reinauer f4001cd8a7 update dumpmmcr.c utility
another flash chip that doesn't clog the serial line


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2210 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-17 22:35:56 +00:00
Li-Ta Lo 042f0430d3 resolving conflict with Ron's work
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2209 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-17 20:11:38 +00:00