Commit Graph

12230 Commits

Author SHA1 Message Date
Stefan Reinauer cbce4de976 drivers/intel/fsp1_1: Don't hide build related options behind HAVE_FSP_BIN
The right thing to do is to hide them behind PLATFORM_USES_FSP1_1.
The only things that should depend on HAVE_FSP_BIN is the code
that actually adds the file to CBFS, and the path to the file in Kconfig.

Removing the HAVE_FSP_BIN check requires some default values
for two Kconfig variables.

Change-Id: I9b6c3ed0cdfb0e02421d7b98c488a66e39add947
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/12465
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-12-02 18:42:05 +01:00
Patrick Georgi 1cab0125cc build system: Add more files through cbfs-files instead of manual rules
verstage, romstage, and payload can be added through infrastructure now.

Change-Id: Ib9e612ae35fb8c0230175f5b8bca1b129f366f4b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/12549
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-02 17:30:36 +01:00
Martin Roth c7b26c381c lippert/frontronner-af & toucan-af: Fix IASL warnings
Not all the paths through the _OSC method returned a value.  According
to the ACPI spec (5.0 & 6.0), bit 2 needs to be set for an unrecognized
GUID.

Fixes warnings for both platforms:
dsdt.aml 1143:  Method(_OSC,4)
Warning  3115 -          ^ Not all control paths return a value (_OSC)
dsdt.aml 1143:  Method(_OSC,4)
Warning  3107 -          ^ Reserved method must return a value
(Buffer required for _OSC)

Change-Id: Ibaf27c5244b1242b4fc1de474c371f54f930dcb6
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12530
Tested-by: build bot (Jenkins)
Reviewed-by: Jens Rottmann <JRottmann@LiPPERTembedded.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-02 16:10:06 +01:00
Damien Zammit 74d165b18d mainboard/intel/d510mo: Add Intel D510MO mainboard
Board uses Pineview native raminit
Board boots from grub to linux kernel

VGA needs work, currently headless machine

Change-Id: I8e459c6d40e0711fac8fb8cfbf31d9cb2aaab3aa
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/10074
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-02 00:39:03 +01:00
Damien Zammit 149c4c5d01 x86/smm: Initialize SMM on some CPUs one-by-one
We currently race in SMM init on Atom 230 (and potentially
other CPUs). At least on the 230, this leads to a hang on
RSM, likely because both hyperthreads mess around with
SMBASE and other SMM state variables in parallel without
coordination. The same behaviour occurs with Atom D5xx.

Change it so first APs are spun up and sent to sleep, then
BSP initializes SMM, then every CPU, one after another.

Only do this when SERIALIZE_SMM_INITIALIZATION is set.
Set the flag for Atom CPUs.

Change-Id: I1ae864e37546298ea222e81349c27cf774ed251f
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/6311
Tested-by: build bot (Jenkins)
Tested-by: BSI firmware lab <coreboot-labor@bsi.bund.de>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-12-02 00:38:45 +01:00
Damien Zammit 003d15cab4 northbridge/intel/pineview: Add native raminit
Does native ram init for Intel Atom D5xx 8086:a000 northbridge

Tested on Intel D510MO mainboard, board boots linux kernel

- Works fully with both dimms populated (2x2GB), memtest passes 100%
- Almost boots with only one dimm in one of the slots
  (suspect bad memory map with one dimm?)
- Reads garbage with only one dimm in other slot

Change-Id: Ibd22be2a959045e0a83aae2a3a0e877013f80711
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/12501
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-12-02 00:26:45 +01:00
Damien Zammit f7060f1d0f northbridge/intel/pineview: Add remaining boilerplate code for northbridge
This patch does *not* include native raminit

Change-Id: I3fb8146ef7fe2ad27c167ecd2fb0fd629f051cc1
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/12430
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
2015-12-02 00:26:36 +01:00
Timothy Pearson 1a38374535 southbridge/amd/sb700: Fix boot hang when AHCI mode disabled
Existence of requested PCI device was not checked when enabling
IDE mode on the SP5100.  Fix incorrect PCI device ID and check
for device existence before attempting setup.

Change-Id: I726c355571b5c67c9a13995be2352601c03ab1e4
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12572
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-12-01 16:59:41 +01:00
Timothy Pearson 273384638b cpu/amd/fam10h-15h: Enable DFE on Family 15h HT3 links
Decision Feedback Equalization (DFE) is a form of dynamic
link training used to lower the overall error rate within
the coherent fabric.  Enable it on all capable HT links.

Change-Id: I5e719984ddd723f9e375ff1a9d4fa1ef042cf3eb
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12072
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
2015-12-01 16:59:01 +01:00
Timothy Pearson f8549e88e2 cpu/amd/fam10h-15h: Fix link type detection and XCS buffer count setup
The existing code did not properly detect various link attributes
on Family 10h/15h processors.  With the addition of new HT3- and
IOMMU-specific code, proper detection has become critical to avoid
system deadlocks.

Fix and streamline link attribute detection.

Change-Id: If63dd97f070df4aab25a1e1a34df4b1112fff4b1
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12071
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-12-01 16:58:25 +01:00
Timothy Pearson 09830faa8d nb/amd/amdht: Fix XCS buffer count setup on AMD Family 15h CPUs
The existing code re-used the Family 10h XCS buffer setup on
Family 15h CPUs, which set incorrect values leading to random
system lockups.

Use the Family 15h XCS buffer setup shown in the BKDG.

Change-Id: Ie4bc8b3ea6b110bc507beda025de53d828118f55
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12070
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-12-01 16:56:31 +01:00
Timothy Pearson 346fcb2894 cpu/amd/fam10h-15h: Force iolink detect to either 1 or 0
Minor change to be more explicit about the binary state
of the iolink detect variable.

Change-Id: Ifd8f5f1ab28588d100e9e4b1fb0ec2525ad2f552
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12069
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2015-12-01 16:33:03 +01:00
Timothy Pearson 93107bebf6 nb/amd/amdfam10: Fix incorrect channel buffer count configuration
The secondary bus number set code incorrectly overwrote the link
buffer settings in F0x[F4,D4,B4,94].  Constrain the secondary
bus number set to the appropriate bits of the registers.

Change-Id: If70825449f298aa66f7f8b76dbd7367455a6deb1
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12068
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-12-01 16:32:25 +01:00
Timothy Pearson f1436e58d2 mainboard/asus/kgpe-d16: Enable GART by default
Change-Id: I73eb2425bbdb7e329a544d55461877d1dee0d05b
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12067
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-12-01 16:31:47 +01:00
Timothy Pearson 5edc6695f8 nb/amd/mct_ddr3: Add Family 15h tristate enable codes
The Family 15h DRAM initialization did not set up the various
tristate enable codes in the MCT.

Add Family 15h tristate enable setup.  This fixes multiple
DIMMs on a single channel.

Change-Id: I0278656e98461882d0a64519dfde54a6cf28ab0f
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12060
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
2015-12-01 16:31:02 +01:00
Martin Roth d45a3477b7 amd/pi/00630F01: Drop HT3_SUPPORT
The Kconfig symbol CONFIG_HT3_SUPPORT is not implemented.

This mirrors commit c5163ed8 (AMD binaryPI: Drop HT3_SUPPORT)

Change-Id: I2682d3b620e2cee613c7421622a8c79db5ba3a86
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12556
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-12-01 16:28:07 +01:00
Patrick Georgi 6dc8570719 build system: strip quotes from CONFIG_CBFS_PREFIX in a single location
Instead of having to remember to strip the quotes everywhere so that
string comparisons (of which there are a few) match up, do it right at
the beginning.

Fixes building the image with a .config where CONFIG_CBFS_PREFIX
contains quotes.

Change-Id: I4d63341cd9f0bc5e313883ef7b5ca6486190c124
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/12578
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2015-12-01 09:05:07 +01:00
Martin Roth bd88fa0ef6 fsp_baytrail: Remove use of BAYTRAIL_SMM Kconfig symbol
The symbol BAYTRAIL_SMM was never valid (there's no config statment
initializing the symbol), but it was being selected and used
in the code.

Now that SMM is supported in fsp_baytrail, the code it was trying
to switch can be removed, and just set up for SMM.

Change-Id: I0fd4865a951734e728500e7baf593ff7eb556f73
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12553
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Ben Gardner <gardner.ben@gmail.com>
2015-11-30 23:52:51 +01:00
Timothy Pearson 309303884c nb/amd/amdmct/mct_ddr3: Use StopOnError to decrease training time
There is no need to continue testing a DCT configuration after
data errors have already been detected; this just wastes time
during boot.

Change-Id: I979e27c32a3e0b101590fba0de3d7a25d6fc44d2
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12066
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-30 19:39:31 +01:00
Marcin Wojciechowski 9586dc72db mainboard/intel: Add Little Plains
This adds a new mainboard: Little Plains for Intel's atom c2000
It was based on Mohon Peak board with some minor changes
This board is not available as standalone product
It is a managment board for
Intel Ethernet Multi-host Controller FM10000 Series
The FSP package is available from Intel: https://www.intel.com/fsp

Change-Id: I28127a858106ed35d26e235f0c6393c20ed14350
Signed-off-by: Marcin Wojciechowski <marcin.wojciechowski@intel.com>
Reviewed-on: https://review.coreboot.org/12503
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-30 18:00:50 +01:00
Timothy Pearson b4b298c449 mainboard/asus/kgpe-d16: Limit HT speed to 2.6GHz
The CPU <--> CPU HT wiring on this board has only been validated
to 2.6GHz.  While higher frequencies appear to function initially,
and in fact function when only one CPU package is installed, dual
CPU package systems will lock up after around 6 - 12 hours of uptime
due to presumed HT link errors at the higher (>= 2.8GHz) HT clocks.

If applications are not being used that stress the coherent fabric,
then the uptime before hang may be much longer.  Users attempting
to overclock the HT links are advised to "burn in test" the HT links
by running memtester locked to a node with no local memory installed.

Change-Id: I8fae90c67aa0e8b103e9b8906dea50d1e92ea5a9
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12064
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-30 05:29:47 +01:00
Timothy Pearson 16a3a7515a cpu/amd/family_10h-family_15h: Apply missing Family 15h errata fixes
Change-Id: I132874fe5b5a8b9a87422e2f07bff03bc5863ca4
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12065
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins)
2015-11-30 05:21:24 +01:00
Timothy Pearson 01b9f8e4c2 nb/amd/mct_ddr3: Use antiphase to better center DQS window
The BKDG recommends the use of an antiphase window detection
algorithm to ensure that the DQS data eye is properly centered.

TEST: Booted both with DIMMs known to move the data eye into the
prior clock phase and DIMMs known to keep the data eye in the
current clock phase.

Change-Id: I1d85fddd45197ca82dcaa46fe863e64589712d1f
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12059
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-30 05:19:19 +01:00
Martin Roth 323c7db204 bachmann/ot200: Remove DRIVERS_I2C_IDREG Kconfig symbol
As far as I can tell the Kconfig symbol DRIVERS_I2C_IDREG never actually
existed in the coreboot codebase.  I didn't see anything that it might
have been a typo of.

Change-Id: Ib17de670e38e07ab4a4745143c42fa85da1754e1
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12563
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2015-11-30 00:35:38 +01:00
Timothy Pearson 4502df12aa nb/amd/mct_ddr3: Fix odd rank data corruption
The odd rank of each DIMM could experience data corruption due to
incorrect DQS training.  Fix the DQS training algorithm by executing
the relevant portions of the training algorithm on the odd ranks.

Change-Id: Ibc51f5052d5189e45b3d9aa98ca8febbfe13f178
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12058
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-29 19:38:13 +01:00
Timothy Pearson df499b53c3 nb/amd/amdmct/mct_ddr3: Fix a minor RDIMM CS select error
Change-Id: I4cdfeec887813c17edcdee8858222414fb19b72c
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12057
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-29 19:37:08 +01:00
Timothy Pearson 0eb163d5d3 nb/amd/amdmct/mct_ddr3: Ensure channel clock skew is properly set
Also fix incorrect Trfc[0-3] value on Family 15h.

Change-Id: Iafc233984ae1d44fe6a1cb5b109d36397cbd991a
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12055
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-29 19:36:34 +01:00
Patrick Georgi 2ca8b31ff5 x86/smm: don't hide harmless declarations
Hiding them requires #if CONFIG_HAVE_SMI_HANDLER instead of
if (IS_ENABLED(CONFIG_HAVE_SMI_HANDLER))

Change-Id: Ib874cd98e195ad7437d05be1696004b29bf97a66
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: https://review.coreboot.org/12565
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-29 13:06:04 +01:00
Timothy Pearson 8528e39fba nb/amd/amdfam10: Work around sporadic lockups when CC6 enabled
The silicon in control of CC6 appears to contain minor bugs
and / or deviations from the BKDG; through trial and error
it was found that these issues can be worked around by reserving
the entire possible CC6 save region, regardless of currently
installed node count.

Change-Id: If31140651f25f9c524a824b2da552ce3690eae18
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12054
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-28 19:21:18 +01:00
Alexander Couzens 316170e22c baytrail: fix missing brackets around ir_base to fix IRQ routing
The missing brackets caused other registers, including the IO APIC
enable bit (EAN in OIC) to be overwritten. Bug introduced by
bde6d309 (x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer)

Change-Id: I1d5aa2af6d74405a1a125af6221ac0e635a6b693
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: https://review.coreboot.org/12525
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-11-28 19:17:05 +01:00
Martin Roth 3bb9405494 ibase/mb899: Fix IASL warning and remark
- Add an empty Operating Region for the empty _REG method
- Move Named objects out of _CRS Method
- Remove Kconfig default disabling IASL warnings as errors

Fixes these items:
dsdt.aml 1449:  Method (_CRS, 0)
Remark   2120 -           ^ Control Method should be made Serialized
(due to creation of named objects within)
dsdt.aml 1458: Method (_REG, 2)
Warning  3079 -          ^ _REG has no corresponding Operation Region

Change-Id: I801a84468097687c91d6ee3f44cec06243355fac
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12531
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-27 18:10:36 +01:00
Martin Roth dde96fb2f1 soc/intel/common: Fix whitespace in Kconfig
Change leading spaces to tabs.

Change-Id: Ief138f5f68198578ba9dddb8fbdabbd9a0185a21
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12546
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-27 18:07:29 +01:00
Martin Roth 232df8b2d2 kontron/986lcd-m: Fix IASL warning and remark
- Add an empty Operating Region for the empty _REG method
- Serialize _CRS Method
- Remove Kconfig default disabling IASL warnings as errors

Fixes IASL Warning and remark:
dsdt.aml   1451:  Method (_CRS, 0)
Remark   2120 -             ^ Control Method should be made Serialized
(due to creation of named objects within)
dsdt.aml   1460:  Method (_REG, 2)
Warning  3079 -             ^ _REG has no corresponding Operation Region

Change-Id: I4aa59468a89c4013146ab34004476a0968c60707
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12521
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2015-11-27 18:07:09 +01:00
Jonathan A. Kollasch 20d9fb4692 amd/car: don't apply Fam10h/Fam12h Errata 343 fix to Fam0Fh
Fixes early fault problem on Fam0Fh introduced in
Change I8e01a4ab68b463efe02c27f589e0b4b719532eb5,
commit 991f18475c.

Change-Id: Id215d2822b78917939c28f7a922a94e02e5d15bf
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: https://review.coreboot.org/12528
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2015-11-26 23:17:08 +01:00
Timothy Pearson 905507c379 southbridge/amd/sb700: Fix drifting system clock
Change-Id: I1698c9b9b1840d254115821f3c0e76b7211e9056
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12052
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-26 10:46:04 +01:00
Timothy Pearson 56c8ef9a91 southbridge/amd/sr5650: Use correct PCI configuration block offset
Change-Id: I4277d1788d8f9a501399218544aa6d4d11349ccc
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12049
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-11-26 01:09:16 +01:00
Timothy Pearson 259549678b mainboard/asus/kgpe-d16: Add missing IOMMU setup
Change-Id: I9a00bdbcd47804b6d83c0231cd515773d02ff951
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12527
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-26 01:08:25 +01:00
Timothy Pearson eda407f4eb mainboard/asus/kgpe-d16: Add IOMMU nvram configuration option
Change-Id: I45b04e8fbdfc65603e1057f7b0e5a13d073fe348
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12048
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-26 01:07:59 +01:00
Martin Roth 601ea3d40e lenovo t400: Fix IASL warning and remark
If any path in a method returns a value, IASL expects that all paths
within that method will return a value.

Presumably, the ATPX would not need a return value if Arg0 is anything
other than 0, so just return a zero.

- Serialize ATPX method to make IASL happy.  This means that it can
only be used by one thread at a time.

Fixes these issues:
dsdt.aml   2581: Method (ATPX, 2, NotSerialized) {
Remark   2120 -            ^ Control Method should be made Serialized
(due to creation of named objects within)
dsdt.aml 2581: Method (ATPX, 2, NotSerialized) {
Warning  3115 -          ^ Not all control paths return a value (ATPX)

Change-Id: I14aeab0cebe4596e06a17cffc36cc01b953d7191
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12518
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-24 22:42:57 +01:00
Martin Roth c5fb1a2ea8 google/rambi: Fix IASL warnings _CRS must return a value
The Touchpad and Touchscreen _CRS methods do not return an interrupt
value if the I2c busses that the devices are on are not in PCI mode.

Previously they didn't return any value if they weren't in PCI mode.
This patch has them return an empty resource template.

Fixes these warnings:
dsdt.aml 2813: Method (_CRS)
Warning  3115 -          ^ Not all control paths return a value (_CRS)
dsdt.aml 2813: Method (_CRS)
Warning  3107 -          ^ Reserved method must return a value
(Buffer required for _CRS)

dsdt.aml 2832: Method (_CRS)
Warning  3115 -          ^ Not all control paths return a value (_CRS)
dsdt.aml 2832: Method (_CRS)
Warning  3107 -          ^ Reserved method must return a value
(Buffer required for _CRS)

Change-Id: I02a29e56a513ec34a98534fb4a8d51df3b70a522
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12519
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-24 22:41:57 +01:00
Martin Roth 8b954f5790 ec/quanta/ene_kb3940q: Fix ACPI Notice
Affects these mainboards:
- lenovo/g505s
- google/parrot
- hp/pavilion_m6_1035dx

Fixes IASL notice for this specific instance:
dsdt.aml   1952:  Method (_CRS, 0, NotSerialized)
Remark   2120 -             ^ Control Method should be made Serialized
(due to creation of named objects within)

Change-Id: Id297cdea35d43f51887f798a9983629343c2313a
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12513
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-24 22:40:12 +01:00
Martin Roth d26c9d603e iwave/IWRainBowG6: Fix IASL warning and remark
- Add an empty Operating Region for the empty _REG method
- Serialize _CRS Method
- Remove Kconfig default disabling IASL warnings as errors

Fixes IASL Warning:
dsdt.aml   1362:  Method (_REG, 2)
Warning  3079 -             ^ _REG has no corresponding Operation Region

Fixes IASL remark:
dsdt.aml   1353:  Method (_CRS, 0)
Remark   2120 -             ^ Control Method should be made Serialized
(due to creation of named objects within)

Change-Id: Iff01613a6e3238469c1fcb8d74f5e98d18420aaf
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12515
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-24 22:38:24 +01:00
Martin Roth 6149233cce intel/soc/baytrail: Move MCRS ResourceTemplate out of _CRS method
Fixes these remarks:
Object is not referenced (Name is within method [_CRS])

The ACPI compiler is trying to be helpful in letting us know
that we're not using various fields in the MCRS ResourceTemplate
when we define it inside of the _CRS method.  Since we're not
intending to use those objects in the method, it shouldn't be an
issue, but the warning is annoying and can mask real issues.
Moving the creation of the MCRS object to outside of the CRS
method and referencing it from there solves this problem.

Change-Id: I54ab3ad9ed148fdd24e8615d83bc8ae668d1dbff
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12514
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-24 22:37:40 +01:00
Martin Roth 21dbc2fc3c ec/lenovo/h8: Fix IASL warnings
If any path in a method returns a value, IASL expects that all paths
within that method will return a value.

Presumably the MKHP method wouldn't get called unless there were a
pending event, but if no event is found, return a zero.

Fixes IASL warning:
dsdt.aml 1785: Method (MHKP, 0, NotSerialized)
Warning 3115 -           ^ Not all control paths return a value (MHKP)

This was the only IASL warning in most lenovo mainboards.

Change-Id: Id93dcc4a74bd4c18b78f1dde821e7ba0f3444da3
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12517
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-24 22:34:34 +01:00
Martin Roth 56033a9f2d superio/smsc/mec1308: Fix IASL warnings
The SIO device needs to provide an _ADR object with the IO
address as well as the address in the OperationRegion.

ACPI provides two different Resource Descriptor Macros to describe the
I/O areas required for a device.  The FixedIO macro is only valid for
10-bit IO addresses.  Use the IO macro instead.

Thank you to recent IASL that allows for addition in the ASL file.  :)

Fixes these warnings:
dsdt.aml   2276: Device (SIO) {
Warning  3141 -           ^ Missing dependency
(Device object requires a _HID or _ADR in same scope)
dsdt.aml   2390:    FixedIO (0xa00, 0x34)
Warning  3060 -                 ^ Maximum 10-bit ISA address (0x3FF)
dsdt.aml   2394:    FixedIO (0xa00, 0x34)
Warning  3060 -                 ^ Maximum 10-bit ISA address (0x3FF)

Lumpy now compiles its ASL tables with no warnings.  Re-enable
Warnings as errors.

Change-Id: Id26e234eadaa3b966e8f769cb9f9fb7ea64fc9e3
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12520
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-24 22:30:19 +01:00
Ben Gardner e597e63e49 FSP 1.0: Fix CAR issues - broken timestamps and console
FSP 1.0 has a fixed-size temporary cache size and address and the entire
cache is migrated in the FSP FspInitEntry() function.

Previous code expected the symbol _car_data_start to be the same as
CONFIG_DCACHE_RAM_BASE and _car_data_end to be the same as
_preram_cbmem_console.

FSP 1.0 is the only one that migrates _preram_cbmem_console.
Others leave that where it is and extract the early console data in
cbmemc_reinit(). Special handling is needed to handle that.

Commit dd6fa93d broke both assumptions and so broke the timestamp table
and console.

The fix is to use CONFIG_DCACHE_RAM_BASE when calculating the offset and
to use _preram_cbmem_console instead of _car_data_end for the console
check.

Change-Id: I6db109269b3537f7cb1300357c483ff2a745ffa7
Signed-off-by: Ben Gardner <gardner.ben@gmail.com>
Reviewed-on: http://review.coreboot.org/12511
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-24 21:21:43 +01:00
Martin Roth b9434aa853 intel/d945gclf: Fix IASL warning and remark
- Add an empty Operating Region for the empty _REG method
- Serialize _CRS Method
- Remove Kconfig default disabling IASL warnings as errors

dsdt.aml   1445:  Method (_CRS, 0)
Remark   2120 -             ^ Control Method should be made Serialized
(due to creation of named objects within)
dsdt.aml   1454:  Method (_REG, 2)
Warning  3079 -             ^ _REG has no corresponding Operation Region

Change-Id: I2b64609c929af62c2b699762206e5baf58fbdb8b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/12523
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-24 21:05:45 +01:00
Ben Gardner f5fd4c99d5 lib/timestamp.c: only log "Timestamp table full" once
If the timestamp table gets corrupted (separate issue), the
timestamp_sync_cache_to_cbmem() function may add a large number of bogus
timestamp entries.

This causes a flood of "ERROR: Timestamp table full".  With logs going
to a serial console, this renders the system essentially unbootable.

There really isn't a need to log that more than once, so log it when the
last slot in the timestamp table is filled.

Change-Id: I05d131183afceca31f4dac91c5edc95cfb1e443f
Signed-off-by: Ben Gardner <gardner.ben@gmail.com>
Reviewed-on: http://review.coreboot.org/12506
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-24 21:01:25 +01:00
Nico Huber 1ef80141c0 soc/intel/braswell: Drop gfx_read_resources()
Drop the last remnant of vanished CONFIG_MARK_GRAPHICS_MEM_WRCOMB.

Could not build test google/cyan and intel/strago due to lack of UEFI
headers, OMG.

Change-Id: I0b9eac5c040d24bab2b85e9b63042b6aaa9879d9
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: http://review.coreboot.org/12338
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-24 20:59:18 +01:00
Zheng Bao 2286138561 AMD/bettong: Add UART support
The function delay in uart8250mem.c is not enough for hudson. I guess
there are some problems in lapic_timer(). I uploaded a patch to gerrit
to show the way to enable UART feature.
http://review.coreboot.org/#/c/12343/4

Currently the HUDSON_UART is unchecked by default. Select HUDSON_UART to
enable this feature.

The UART is test at BIOS stage.

Since it is not a standart UART device, the windows internal UART driver
doesnt support it. I guess we need a driver to use it on windows.

Change-Id: I4cec833cc2ff8069c82886837f7cbd4483ff11bb
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/11749
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-11-24 20:57:47 +01:00