Commit Graph

238 Commits

Author SHA1 Message Date
Steven J. Magnani 740bb2a8ed Correct transposed arguments in pnp_set_drq().
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2013 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-09-09 20:02:52 +00:00
Yinghai Lu 304f24c2d2 missed cache_as_ram_auto.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1983 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-08 02:56:47 +00:00
Yinghai Lu 13f1c2af8b eric patch
1. x86_setup_mtrr take address bit.
        2. generic ht, pcix, pcie beidge...
        3. scan bus and reset_bus
        4. ht read ctrl to decide if the ht chain
           is ready
        5. Intel e7520 and e7525 support
        6. new ich5r support
        7. intel sb 6300 support.

yhlu patch
	1. split x86_setup_mtrrs to fixed and var
	2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource
	3. in_conherent.c K8_SCAN_PCI_BUS


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-08 02:49:49 +00:00
arch import user (historical) 6ca7636c8f Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51
Creator:  Yinghai Lu <yhlu@tyan.com>

cache_as_ram for AMD and some intel


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06 17:17:25 +00:00
arch import user (historical) dc81118570 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-44
Creator:  Li-Ta Lo <ollie@lanl.gov>

Correct VGA support

Make the VGA support for both VGA and no VGA cases.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1960 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06 17:16:09 +00:00
arch import user (historical) fd0f828412 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-42
Creator:  Li-Ta Lo <ollie@lanl.gov>

missing commit for emulator update

Which one is more stupid? TLA or me?


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1958 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06 17:16:05 +00:00
arch import user (historical) 34120d1b4f Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-39
Creator:  Li-Ta Lo <ollie@lanl.gov>

TLA sucks again

This is the third time I try to commit only the emulator changes.
I hope this patch contains the emulator changes only.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1955 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06 17:15:57 +00:00
arch import user (historical) 1c8cd59f3c Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-38
Creator:  Li-Ta Lo <ollie@lanl.gov>

emulator update

x96emu update from Paulo


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06 17:15:54 +00:00
arch import user (historical) acfaeceffd Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-36
Creator:  Li-Ta Lo <ollie@lanl.gov>

emulator update

Correction to the reduce emulator from Paulo


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1952 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06 17:15:48 +00:00
arch import user (historical) ef03afa405 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-34
Creator:  Yinghai Lu <yhlu@tyan.com>

AMD D0/E0 Opteron new mem mapping support, AMD E Opteron mem hole support,AMD K8 Four Ranks DIMM support


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06 17:15:30 +00:00
arch import user (historical) 98d0d30f6b Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-30
Creator:  Yinghai Lu <yhlu@tyan.com>

Nvidia Ck804 support


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06 17:13:46 +00:00
arch import user (historical) 2305364397 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-10
Creator:  Yinghai Lu <yhlu@tyan.com>

pci_rom.h  smbus device parent device print


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1929 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06 16:49:59 +00:00
Li-Ta Lo 6c4c07d4b3 fixed a bug cause failure on some expensive VGA cards
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1918 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-03-04 22:08:55 +00:00
Yinghai Lu 90b3e09e63 comment out ht_setup_link
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1901 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-26 22:00:20 +00:00
Yinghai Lu b5d9af4105 move apic cluster before pci_domain in MB Config.lb
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1896 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-21 22:02:09 +00:00
Li-Ta Lo d808849a2c removed unused code
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1893 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-19 23:21:00 +00:00
Li-Ta Lo bec039cb93 minor reformat
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1892 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-19 23:19:26 +00:00
Yinghai Lu 26b2922f1c linkb_to_host
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-19 01:21:05 +00:00
Yinghai Lu 54ab3115e3 class code reverse
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-18 03:10:46 +00:00
Yinghai Lu 1f1085b433 linkb_to_host and addon display card override onboard card.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-17 21:37:12 +00:00
Yinghai Lu 9e4faef7db CONFIG_PCI_ROM_RUN
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-14 22:04:49 +00:00
Yinghai Lu 24f542f478 onboard pci_rom second run
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1872 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-14 17:17:55 +00:00
Yinghai Lu bcde1618da onboard pci_rom disable onboard
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-14 05:34:09 +00:00
Yinghai Lu d57e756065 onboard pci_rom finally done
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-14 02:59:24 +00:00
Yinghai Lu c7870ace39 onboard pci_onboard works
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-13 19:14:52 +00:00
Li-Ta Lo d8ad7df700 fixed a logic bug
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1864 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-13 05:51:48 +00:00
Li-Ta Lo bc5399aa6e better embedded ROM support, done blindly
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1863 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-13 05:44:16 +00:00
Li-Ta Lo 75f5b559e6 remove #include chip.h
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1862 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-13 05:21:27 +00:00
Yinghai Lu 77cbb99a57 onboard pci_rom
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-13 03:36:38 +00:00
Li-Ta Lo 515f6c729e works for PCI vga cards too
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-11 22:48:54 +00:00
Li-Ta Lo 51990b350a removed validation code
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1855 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-11 16:35:56 +00:00
Li-Ta Lo 5ce1590355 fixed abs() impelmentation
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1854 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-11 16:33:31 +00:00
Li-Ta Lo 883b8793c9 added PCI expansion ROM support,
works for some ATI and Nvidia AGP cards now.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1851 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-10 23:16:22 +00:00
Li-Ta Lo e8b1c9dbd1 clean up VGA and Expansion ROM support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1831 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-12-27 04:25:41 +00:00
Li-Ta Lo 9a5b4962a7 Allocating resource for Expansion ROM
More correct resource allocation for legacy VGA on K8


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-12-23 21:48:01 +00:00
Li-Ta Lo 3a81285409 allocating resource for legacy VGA frame buffer, it is not 100%
correct but it works anyway.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1811 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-12-03 22:39:34 +00:00
Yinghai Lu 7213d0f513 i2c mux support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1809 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-12-03 03:39:04 +00:00
Li-Ta Lo 0493069aa9 update comment according to the new DOM
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1799 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-25 17:37:19 +00:00
Eric Biederman a9e632c2ac - First stab at getting the ppc ports building and working.
- The sandpointx3+altimus has been consolidated into one directory for now.
- Added support for having different versions of the pci access functions
  on a per bus basis if needed.
  Hopefully I have not broken something inadvertently.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-18 22:38:08 +00:00
Eric Biederman f8a2dddb57 - To reduce confuse rename the parts of linuxbios bios that run from
ram linuxbios_ram instead of linuxbios_c and linuxbios_payload...
- Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86
- ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB.
- Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work.
- Start using romcc's built in preprocessor (This will simplify header compiler checks)
- Add helper functions for examining all of the resources
- Remove debug strings from chip.h
- Add llshell to src/arch/i386/llshell (Sometime later I can try it...)
- Add the ability to catch exceptions on x86
- Add gdb_stub support to x86
- Removed old cpu options
- Added an option so we can detect movnti support
- Remove some duplicate definitions from pci_ids.h
- Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic
- Minor romcc bug fixes


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-30 08:05:41 +00:00
Eric Biederman 6e53f50082 sizeram removal/conversion.
- mem.h and sizeram.h and all includes killed because the are no longer needed.
- linuxbios_table.c updated to directly look at the device tree for occupied memory areas.
- first very incomplete stab a converting the ppc code to work with the dynamic device tree
- Ignore resources before we have read them from devices, (if the device is disabled ignore it's resources).
- First stab at Pentium-M support
- add part/init_timer.h making init_timer conditional until there is a better way of handling it.
- Converted all of the x86 sizeram to northbridge set_resources functions.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1722 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-27 08:53:57 +00:00
Eric Biederman dbec2d4090 - Bump the LinuxBIOS major version
- Rename chip_config chip_operations throughout the tree
- Fix Config.lb on most of the Opteron Ports
- Fix the amd 8000 chipset support for setting the subsystem vendor and device ids
- Add detection of devices that are on the motherboard (i.e. In Config.lb)
- Baby step in getting the resource limit handling correct, Ignore fixed resources
- Only call enable_childrens_resources on devices we know will have children
  For some busses like i2c it is non-sense and we don't want it.
- Set the resource limits for pnp devices resources.
- Improve the resource size detection for pnp devices.
- Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels
- Added a header file to hold the prototype of isa_dma_init
- Fixed most of the superio chips so the should work now, the via superio pci device is the exception.
- The code compiles and runs so it is time for me to go to bed.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21 10:44:08 +00:00
Eric Biederman 7003ba4a88 - First stab at running linuxbios without the old static device tree.
Things are close but not quite there yet.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1681 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16 06:20:29 +00:00
Eric Biederman 448bd635c0 - Finish interrupted merge
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 22:52:15 +00:00
Eric Biederman 03acab694b - Updates for 64bit resource support, handling missing devices and cpus in the config file
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1664 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 21:25:53 +00:00
Eric Biederman b78c1972fe - First pass through with with device tree enhancement merge. Most of the mechanisms should
be in place but don't expect anything to quite work yet.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1662 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 20:54:17 +00:00
Ronald G. Minnich 02fa3b2743 epia-m support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1655 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-06 17:33:54 +00:00
Li-Ta Lo 9ab91f5acb code reformat
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1621 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-08 16:54:20 +00:00
Li-Ta Lo 9220f91f9c minor reformat
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1569 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-24 19:48:13 +00:00
Li-Ta Lo 9da7ff91f5 added AGP support for AMD K8
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1568 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-24 19:04:47 +00:00
Li-Ta Lo 54f05f6c5c use #define macro for pci class ids
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1563 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-14 17:20:29 +00:00
Li-Ta Lo 9f0d0f9669 rename walk_static_devices
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1552 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-10 16:05:16 +00:00
Li-Ta Lo 75337f7500 code reformat, fixed a bug in set/unset logical operation
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1551 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-07 21:56:48 +00:00
Li-Ta Lo fb4c50f695 code reformat, doxidization
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1549 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-07 21:52:47 +00:00
Li-Ta Lo 9782f7538c code refromat, doxidization
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1547 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-05 21:15:42 +00:00
Li-Ta Lo d16753be86 chaged chip_device_path::enable to chip_device_path::enabled,
again, I am the only one who can't speak English.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1544 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-29 20:30:02 +00:00
Li-Ta Lo 69c5a905ed changed dev->enable to dev->enabled. Sorry, I am the only one who can't speak
English in the project.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1543 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-29 20:08:54 +00:00
Li-Ta Lo 5782d273eb check in the current code for IBM/E325, can somebody help to fix it ?
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1538 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-26 17:51:20 +00:00
Li-Ta Lo c6bcedb2c4 yhlu's pnp patch
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1518 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-21 16:57:05 +00:00
Li-Ta Lo e52666931a Doxidization, reformat
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1469 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-23 21:28:05 +00:00
Eric Biederman 5cd81730ec - Moved hlt() to it's own header.
- Reworked pnp superio device support.  Now complete superio support is less than 100 lines.
- Added support for hard coding resource assignments in Config.lb
- Minor bug fixes to romcc
- Initial support for catching the x86 processor BIST error codes.  I've only seen
  this trigger once in production during a very suspcious reset but...
- added raminit_test to test the code paths in raminit.c for the Opteron
- Removed the IORESOURCE_SET bit and added IORESOURCE_ASSIGNED and IORESOURCE_STORED
  so we can tell what we have really done.
- Added generic AGP/IOMMU setting code to x86
- Added an implementation of memmove and removed reserved identifiers from memcpy
- Added minimal support for booting on pre b3 stepping K8 cores
- Moved the checksum on amd8111 boards because our default location was on top of
  extended RTC registers
- On the Hdama added support for enabling i2c hub so we can get at the temperature
  sensors.  Not that i2c bus was implemented well enough to make that useful.
- Redid the Opteron port so we should only need one reset and most of memory initialization
  is done in cpu_fixup.  This is much, much faster.
- Attempted to make the VGA IO region assigment work.  The code seems to work now...
- Redid the error handling in amdk8/raminit.c to distinguish between a bad value
  and a smbus error, and moved memory clearing out to cpufixup.
- Removed CONFIG_KEYBOARD as it was useless.  See pc87360/superio.c for how to
  setup a legacy keyboard properly.
- Reworked the register values for standard hardware, moving the defintions from
  chip.h into the headers of the initialization routines.  This is much saner
  and is actually implemented.
- Made the hdama port an under clockers BIOS.  I debuged so many interesting problems.
- On amd8111_lpc added setup of architectural/legacy hardware
- Enabled PCI error reporting as much as possible.
- Enhanded build_opt_tbl to generate a header of the cmos option locations so
  that romcc compiled code can query the cmos options.
- In romcc gracefully handle function names that degenerate into function pointers
- Bumped the version to 1.1.6 as we are getting closer to 2.0

  TODO finish optimizing the HT links of non dual boards
  TODO make all Opteron board work again
  TODO convert all superio devices to use the new helpers
  TODO convert the via/epia to freebios2 conventions
  TODO cpu fixup/setup by cpu type


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-11 15:01:31 +00:00
David W. Hendricks 854e45292b final merge of YhLu's stuff
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1371 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-02-09 22:47:38 +00:00
Li-Ta Lo db7f47cbbf Change PCI_BRIDGE_CONTROL to PCI_BRIDGE_CTL_VGA
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1324 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-01-08 21:15:49 +00:00
Greg Watson 5965169dad Don't compare low 8 bits, which are revision.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1318 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-12-17 17:39:53 +00:00
Ronald G. Minnich b56ef07600 for tyan. recover from Eric B's error additions to via code :-)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1220 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-15 20:05:11 +00:00
Eric Biederman ad1b35a12b - Minor bugfixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1215 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-14 02:36:51 +00:00
Eric Biederman 83b991afff - O2, enums, and switch statements work in romcc
- Support for compiling romcc on non x86 platforms
  - new romc options -msse and -mmmx for specifying extra registers to use
  - Bug fixes to device the device disable/enable framework and an amd8111 implementation
  - Move the link specification to the chip specification instead of the path
  - Allow specifying devices with internal bridges.
  - Initial via epia support
 - Opteron errata fixes


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-11 06:20:25 +00:00
Ronald G. Minnich cb3f498296 success. It boots as a bproc slave now.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1176 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 18:16:07 +00:00
Ronald G. Minnich 6dd6c68507 IRQ setup for EPIA
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1174 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 00:08:42 +00:00
Ronald G. Minnich 99dcf231f4 The epia now works.
Now to fix the ram ...


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1159 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-30 02:16:47 +00:00
Eric Biederman ff0e8465e8 - Include hypertransport.h in hypertransport.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1101 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-04 03:00:54 +00:00
Eric Biederman 0ac6b41e70 - 1.1.4
Major restructuring of hypertransport handling.
  Major rewerite of superio/NSC/pc87360 as a proof of concept for handling superio resources dynamically
  Updates to hard_reset handling when resetting because of the need to change hypertransport link
    speeds and widths.
    (a) No longer assume the boot is good just because we get to a hard reset point.
    (b) Set a flag to indicate that the BIOS triggered the reset so we don't decrement the
       boot counter.
  Updates to arima/hdama mptable so it tracks the new bus numbers


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-02 17:16:48 +00:00
Eric Biederman e9a271e32c - Major update of the dynamic device tree so it can handle
* subtractive resources
  * merging with the static device tree
  * more device types than just pci
- The piece to watch out for is the new enable_resources method that was needed in all of the drivers


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-02 03:36:25 +00:00
Eric Biederman 30e143a5f0 - Add back in the hard reset code from the freebios1 tree.
This allows generic code to reset the box.
- Update the hypertransport code to automatically calculate link
  widths and freequencies, and to call hard_reset if neecessary for
  the changes to go into effect.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1094 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-01 23:45:32 +00:00
Eric Biederman bbb6d1020f - Fix poor resource allocation estimate.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1066 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-04 19:54:48 +00:00
Greg Watson 7100d67ae8 code was broken
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1017 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 21:34:46 +00:00
Eric Biederman 860ad373ef - First pass at code for generic link width and size determination
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@999 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 23:30:29 +00:00
Eric Biederman 2c018fba95 - First pass at s2880 support.
- SMP cleanups (remove SMP only use CONFIG_SMP)
- Minor tweaks to romcc to keep it from taking forever compiling
- failover fixes
- Get a good implementation of k8_cpufixup and sizeram for the opteron


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 20:13:45 +00:00
Greg Watson 8275bad6f6 more chip stuff
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 04:20:08 +00:00
Greg Watson d0580343b6 chip stuff
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@988 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-20 23:28:01 +00:00
Eric Biederman 387a8db88e - Remove excess line from pci_device.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@970 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 04:10:42 +00:00
Eric Biederman 4086d16ba2 - Implement an enable method for pci devices.
- Add initial support for the amd8131
- Update the mptable to something possible
- hdama/Config add the amd8131 southbridge


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@968 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 03:26:03 +00:00
Eric Biederman 5fb929e6e3 - pci_device.c fixes for generic pci bridges to zero the unused portion of bridge resources
- coherent_ht.c remove dead idle loop.
- raminit.c Enable a 64MB mmio window just below 4GB


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 02:15:46 +00:00
Ronald G. Minnich 99acb49cf7 added config and other test files.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-17 16:51:06 +00:00
Eric Biederman 7a5416af95 - Modify the freebios tree so the pci config space api is mostly in sync between
code that runs without ram and code that runs with ram.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-12 19:23:51 +00:00
Eric Biederman 526855741b - Cleanups on the romcc side including a pci interface that uses
fewer registers, and is easier to hardcode.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-19 19:16:21 +00:00
Eric Biederman 5899fd82aa - Small step forward Linux boots and almost works...
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@795 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-24 06:25:08 +00:00
Eric Biederman 8ca8d7665d - Initial checkin of the freebios2 tree
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22 19:02:15 +00:00