Commit graph

212 commits

Author SHA1 Message Date
Stefan Reinauer
e3315c1fc2 clean up epia targets
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2433 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-24 23:02:26 +00:00
Ronald G. Minnich
2ad85dbc65 Lots of lx fixes. CLeanup mainly. THings now build
Signed-off-by: Ronald G. Minnich


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2430 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-20 16:39:30 +00:00
Ronald G. Minnich
21acfcb0d5 add target
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2427 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-19 17:38:57 +00:00
Ronald G. Minnich
d9560dd88c resize OLPC flash
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2424 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-19 04:03:40 +00:00
Ronald G. Minnich
a3cf8a28e9 Fix the name for buildrom script
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2423 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-19 03:47:35 +00:00
Ronald G. Minnich
830a79eeab add an OLPC target for qemu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2422 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-19 03:43:30 +00:00
Stefan Reinauer
50f84bdea8 run preprocessor on hand-crafted config files in abuild, too
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2418 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-15 23:14:37 +00:00
Carl-Daniel Hailfinger
cba07dd682 additions and mods for lzma.
Signed-off-by: Carl-Daniel Hailfinger
Signed-off-by: Ronald G. Minnich


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2413 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-14 15:12:36 +00:00
Indrek Kruusa
7d9441276f changes for the lx and artecgroup mobo
Signed-off-by: Indrek Kruusa
Approved-by: Ronald G. Minnich


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2412 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 21:59:09 +00:00
ronald g. minnich
5ef4c598fb Fix the irq_tables
signed-off-by: ronald g. minnich


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2403 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 01:14:45 +00:00
ronald g. minnich
cdb89be9e8 mods for qemu, these build
signed-off-by: ronald g. minnich


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2402 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 01:10:08 +00:00
Stefan Reinauer
42fb3164ed Uwe Hermann:
Here's a patch which makes all "option ROM_SIZE" lines use x*y format
which is a lot easier to read and modify, without having to use your
brain or a calculator ;-)

Tested with abuild, no errors.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-06 16:42:51 +00:00
Ronald G. Minnich
1ac1cf527d delete unused device.
set rom to 512k


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-18 19:25:25 +00:00
Richard Smith
e5522c39c0 - revert Config.1M.lb back to PLCC size and add new SPI config file
SPI config file is 1M-128k to allow for EC code


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2374 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-11 08:15:19 +00:00
Ronald G. Minnich
f8519dc8dc build 1024-128k binary as per requests.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2372 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-11 00:08:37 +00:00
Ronald G. Minnich
08af3f535d mods for the ultra40 bringup. This now builds.
amd gx2 north -- don't set anything in the north, it conflicts with vsa
settings. So we have our own pci_set_resources that is essentially a
no-op -- just calls the kids. 

olpc rev_a config -- DISABLE the compressed rom stream. This SHOULD NOT
have been set -- it is untested and caused real trouble. 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2369 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-09 02:21:49 +00:00
Ronald G. Minnich
90e68aef68 initial work on sunw ultra40. It's wrong :-)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2366 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-07 20:02:02 +00:00
Indrek Kruusa
8e3464109e Changelog:
* src/cpu/amd/model_lx/model_lx_init.c
  L2 cache initialization removed (moved to northbridge.c)
* src/include/cpu/amd/lxdef.h 
  more checked values
* src/northbridge/amd/lx/northbridge.c
  L2 cache initialization added
  cpubug() commented out
* src/northbridge/amd/lx/raminit.c
  empty function sdram_set_registers() is in use, don't remove
* src/mainboard/artecgroup/dbe61/Config.lb
  irqmap changes
* src/mainboard/artecgroup/dbe61/irq_tables.c
  tentative changes to irq table (currently not in use)
* src/mainboard/artecgroup/dbe61/mainboard.c
  irq assigned manually to NIC
* src/mainboard/artecgroup/dbe61/Options.lb
  gcc 4.0 is OK
* targets/artecgroup/dbe61/Config.lb
  64K for VSA is OK at moment
 
Signed-off-by: Indrek Kruusa <indrek.kruusa@artecdesign.ee>
Signed-off-by: Andrei Birjukov <andrei.birjukov@artecdesign.ee>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2360 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-03 16:48:18 +00:00
Stefan Reinauer
8ad7c06535 slightly changed C.D. Hailfinger's precompressed rom stream patch
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2359 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-03 16:19:27 +00:00
Richard Smith
924f92faa2 - Add support _framework_ for the Asus p2b.
- New superIO winbond/w83977tf
- Add single memory controller SBbus debug routine
into a file private to the i440bx

This adds support the start of support for an Asus p2b
mainboard.  Current limitations are the same as for the 
Bitworks IMS board.  Reads from the SMbus don't work.

Moving dump_spd_registers() into its own private copy
solves the problem of having to go hack on the version that
included in src/sdram to only do one memory controller.




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2351 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-29 17:40:36 +00:00
Ron Minnich
5e9dc23120 This patch adds support for the AMD LX cpu.
There is one global change to pci_ids.h. The rest are changes for LX. I
ran abuild and it is ok.  Not all artec design changes are included as
some of them would adversely affect other mainboards. Indrek will need
to test.


Signed-off-by: Ron Minnich
Signed-off-by: Indrek Kruusa, indrek.kruusa@artecdesign.ee, artec
design. 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2350 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-28 16:06:16 +00:00
Richard Smith
cb8eab482f add framework for i440bx chipset
add support for NSC pc87351 SuperIO
add Bitworks/IMS manboard config

This is a very basic framework for the i440bx chipset and the 
Bitworks IMS board that uses it.  Most things are 
structure only.

Known issues:
- SMbus reads to the RAM SPD come back
all zero.
- dump_spd_registers() is commented out since it breaks with
the default setting of generic_dump_spd.c where it wants
2 memory controllers.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2347 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-24 04:25:47 +00:00
Ronald G. Minnich
878a6696ba add a 1M target for big roms
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2317 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-11 03:03:56 +00:00
Ronald G. Minnich
fb93749642 changes from AMD for making OLPC video work.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2316 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-10 22:57:15 +00:00
Ronald G. Minnich
890ee09a32 further development of OLPC. Set vsm size to 35k. add PCI IRQ for USB.
Set linuxbios size to 28k. Drop debug level to 8.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-08 14:19:49 +00:00
Ronald G. Minnich
b5fcfdbf89 add DK8HTX support.
VSAs now required to be nrv2 compressed


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2312 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-25 22:08:23 +00:00
Ronald G. Minnich
bad9d105cf cleanup some of the compressed rom stream ugliness -- more to do!
olpc and rumba can now boot linux out of flash. vsa was resized to 64K. 
olpc and rumba now used compressed payload -- thanks stefan!


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2307 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-18 03:07:16 +00:00
Ronald G. Minnich
437f28ece9 Fix an error in the config files.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2302 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-09 05:25:31 +00:00
Ronald G. Minnich
ad97691c40 For a kernel-only OLPC.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2300 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-06 02:35:08 +00:00
Ronald G. Minnich
070a10f759 mods for early printing on OLPC
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2297 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-04 23:05:49 +00:00
Ronald G. Minnich
d3ba4aaa24 Fall back to pre-broken settings and setup for GX2.
We lost a few things, but this is still worth it.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2287 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-02 03:07:11 +00:00
Ronald G. Minnich
3716427e7f we don't need msr_init
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2281 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-27 15:10:55 +00:00
Ronald G. Minnich
ae11b37ea5 no fallback version
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2279 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-25 20:34:52 +00:00
Ronald G. Minnich
df46cb205d added the olpc target and support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2255 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-18 16:36:58 +00:00
Yinghai Lu
9a791dffea new cache_as_ram support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03 20:38:34 +00:00
Richard Smith
ffb7d8a31a - Adds support for the Advantech eval board. Configuration was produced
on a SOM-DB2301 baseboard with a SOM-2354 cpu module.

- Also does a slight tweak to the ram test code to make it more
obvious when it fails.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2231 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-01 04:10:44 +00:00
Ronald G. Minnich
7f809097f8 add vsm support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2223 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-21 15:24:46 +00:00
Stefan Reinauer
3cb4dc9c6b small cleanup attempt in sc520 code. there needs to be some major spring
cleaning


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2214 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-19 17:50:54 +00:00
Stefan Reinauer
677267a82a small ts5300 update, fix endian problem in dummmcr.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2213 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-18 00:10:29 +00:00
Ronald G. Minnich
74f36096ae a few new items and mods for ollie
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2189 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-01 16:11:05 +00:00
Yinghai Lu
afd34e61ac serverworks HT1000/HT2000, bcm5785/5780 support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2176 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-16 17:22:19 +00:00
Ronald G. Minnich
61322d21a0 fix mistake in name
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2173 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-11 22:08:41 +00:00
Ronald G. Minnich
e0aea3bbed lippert frontrunner
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2172 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-11 22:07:44 +00:00
Ronald G. Minnich
b7ac85c30d This is the change so that we can readable ldscript.ld
amd/rumba now builds.




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2169 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-01-28 22:01:56 +00:00
Ronald G. Minnich
2bb216a880 adding preliminary, and almost certainly wrong, rumba support.
This is just a skeleton, basically, and will most likely not even 
compile yet.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2164 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-01-27 23:46:30 +00:00
Ronald G. Minnich
a00719b2f2 add a tinylinux config file
Make the error in buildrom a lot more informative -- how big are the
things that did not fit? it now tells you.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2162 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-01-19 18:11:21 +00:00
Ronald G. Minnich
ce0c9686d9 First, a FATAL error, that blows up your BIOS, should NEVER FAIL to
provide more information. The printk_debug in that failure case is now
a printk_error. 

The msm stuff is for debugging.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2159 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-01-17 21:04:53 +00:00
Stefan Reinauer
a09ab6dc53 get ts5300 compiling, it's mostly a copy of msm586seg
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2130 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-04 17:08:31 +00:00
Stefan Reinauer
0cf46ca215 small update, one comment adjusted, fix epia-m abuild.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2124 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-03 19:07:35 +00:00
Stefan Reinauer
12142ada40 1201_ht_bus0_dev0_fidvid_mb.diff - part 3
issue 41 - fix up motherboard compilation

target configuration files. Who wants to do some major cleanup here some
time? The fixed/relative paths in payloads are nasty.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2122 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-02 23:26:13 +00:00