GNUBoot/coreboot-kgpe-d16
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211 commits

Author SHA1 Message Date
Stefan Reinauer
6ab0fa9fed add k8 processor name handling as required by the k8 revision guide. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2322 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-14 23:22:04 +00:00
Ronald G. Minnich
fd14d4414a remove erroneous cache disable. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2320 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-14 13:56:28 +00:00
Ronald G. Minnich
fb93749642 changes from AMD for making OLPC video work. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2316 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-10 22:57:15 +00:00
Ronald G. Minnich
890ee09a32 further development of OLPC. Set vsm size to 35k. add PCI IRQ for USB. 
Set linuxbios size to 28k. Drop debug level to 8.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-08 14:19:49 +00:00
Ronald G. Minnich
b5fcfdbf89 add DK8HTX support. 
VSAs now required to be nrv2 compressed


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2312 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-25 22:08:23 +00:00
Yinghai Lu
9a8e36da2d init the ECC for BSP and AP at the same time. So reduce init cpus time 
from 2.1x to 1.1x or from 4x(SERIAL_CPU_INIT) to 1.1x  


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2309 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-18 17:02:17 +00:00
Ronald G. Minnich
bad9d105cf cleanup some of the compressed rom stream ugliness -- more to do! 
olpc and rumba can now boot linux out of flash. vsa was resized to 64K. 
olpc and rumba now used compressed payload -- thanks stefan!


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2307 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-18 03:07:16 +00:00
Ronald G. Minnich
49a89f19f2 Use a real variable to configure rom base for vsa ... 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2301 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-06 02:54:45 +00:00
Stefan Reinauer
ab4f5d0c10 fix the tree 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2296 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-04 10:08:04 +00:00
Yinghai Lu
52377deec0 core range and set_init_ram_access 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2294 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-04 00:58:14 +00:00
Yinghai Lu
b73fd56488 rm unused file 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2293 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-04 00:48:49 +00:00
Yinghai Lu
608d4b2c44 merge zrom to rom_stream and print olen ilen 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2292 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-04 00:47:15 +00:00
Stefan Reinauer
4c47532134 oops! Slap me on the head for this one. Quick fix for ward until 
YhLu's suggestions are all there..


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2291 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-03 23:10:00 +00:00
Stefan Reinauer
ead73689db add automatic payload compression method to LinuxBIOS 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2288 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-02 12:05:13 +00:00
Ronald G. Minnich
d3ba4aaa24 Fall back to pre-broken settings and setup for GX2. 
We lost a few things, but this is still worth it.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2287 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-02 03:07:11 +00:00
Li-Ta Lo
c1a4b2b0e5 code cleanup, comments added 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2284 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-27 18:40:15 +00:00
Li-Ta Lo
05c0869fac boot to kernel 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2264 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-20 21:26:01 +00:00
Ronald G. Minnich
ea9db56d0e add SystemPreInit() and support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2254 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-13 19:44:50 +00:00
Li-Ta Lo
d8d8fffa0e minor modification 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2253 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-13 17:00:38 +00:00
Ronald G. Minnich
45f6c5e3d4 add cpureginit to romcc code. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2249 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-10 16:40:19 +00:00
Ronald G. Minnich
526b2c429e clean up gx2def.h a bit. 
Add cpureginit.c
added called to cpureginit to model_gx2_init.c


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2248 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-10 16:14:19 +00:00
Ronald G. Minnich
44f72eb3a3 add bug support for 2.1 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2239 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-06 20:45:10 +00:00
Li-Ta Lo
69085400f1 reformat 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2238 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-06 20:23:29 +00:00
Li-Ta Lo
5917c62749 more fix for vsm, not working yet 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2237 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-06 20:19:04 +00:00
Li-Ta Lo
8854d30d6e did I commit the last change? 
try to fix 0x10000026


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2235 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-03 22:20:05 +00:00
Yinghai Lu
9a791dffea new cache_as_ram support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-03 20:38:34 +00:00
Ronald G. Minnich
96cb656806 added this file 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2225 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-22 16:25:49 +00:00
Ronald G. Minnich
7f809097f8 add vsm support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2223 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-21 15:24:46 +00:00
Ronald G. Minnich
e4ad801495 cpubug is fine. 
adding vsm support now.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2222 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-21 03:38:53 +00:00
Ronald G. Minnich
db44be9405 added definitions. added cpubug support. added object. Commented out 
msr set in northbridge that conflicted with the cpubug support. 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2218 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-20 20:49:34 +00:00
Stefan Reinauer
3cb4dc9c6b small cleanup attempt in sc520 code. there needs to be some major spring 
cleaning


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2214 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-19 17:50:54 +00:00
Stefan Reinauer
dba3f846f0 - sc520 updates. move PAR setup to mainboard auto.c 
- some ts5300 code. Let's push this upstream for now.
- fix a typo in device.c


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2211 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-17 22:48:23 +00:00
Stefan Reinauer
410075e0f1 fix mmcrval, small cosmetics to raminit 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2207 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-03-17 18:32:10 +00:00
Li-Ta Lo
b2528aa653 remove unused GX1 asm code 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2187 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-02-28 16:30:41 +00:00
Li-Ta Lo
a51e6f1e56 more GX2 commit 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2185 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-02-27 18:28:30 +00:00
Ronald G. Minnich
f8a1228872 rename 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2165 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-01-28 19:55:01 +00:00
Ronald G. Minnich
2bb216a880 adding preliminary, and almost certainly wrong, rumba support. 
This is just a skeleton, basically, and will most likely not even 
compile yet.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2164 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-01-27 23:46:30 +00:00
Yinghai Lu
3a68aeb903 don't need copy_secondary_start_to_1m_below for non-smp 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2158 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-01-09 20:42:50 +00:00
Yinghai Lu
815ced3f7a 1M boundary for _RAMBASE=1M, and CONFIG_LB_TOPK 8M above support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2152 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-01-04 20:41:05 +00:00
Yinghai Lu
6c02eb2cb5 indirect jmp with * 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2145 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-12-14 23:13:13 +00:00
Yinghai Lu
30576601f6 from issue 53: don't set TOM2 if 4G less mem installed, opt for init_ecc 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2144 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-12-14 20:16:49 +00:00
Yinghai Lu
6f63c0297c support HDT disassembly when cache as ram auto stage 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2143 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-12-14 20:08:23 +00:00
Yinghai Lu
72ee9b0ebe issue 51 and 52: set mtrr for ap before stop it, and _RAMBASE above 1M 
support and pgtbl after 1M support


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2142 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-12-14 02:39:33 +00:00
Yinghai Lu
f42e1770f9 make clear_1m_ram.c to support gcc 3 and gcc4 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2141 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-12-09 01:58:07 +00:00
Yinghai Lu
c3b3600222 use CONFIG_LB_MEM_TOPK instead 1M hardcode from issue 50 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2139 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-12-07 19:02:45 +00:00
Stefan Reinauer
7ce8c54e2b 1201_ht_bus0_dev0_fidvid_core.diff 
https://openbios.org/roundup/linuxbios/issue41
Lord have mercy upon us.




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2118 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-12-02 21:52:30 +00:00
Stefan Reinauer
f5183cfa19 Applying YhLu's patch from issue 37. 
a. apic id liftting to way that kernel like and let bsp
   to stay with 0
b. hw memhole: solve if hole_startk == some node
   basek
                 
This, together with the previous one will break most of 
the tree, but Yinghai Lu is really good
at fixing things, so...

   


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2116 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-12-01 11:01:01 +00:00
Stefan Reinauer
806e146e75 Applying 11_26_car_tyan.diff from Yinghai Lu. 
NOTE: This will break the tree so it can be fixed up later



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2115 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-12-01 10:54:44 +00:00
Stefan Reinauer
f622d598db - Apply 11_24_a_s1_core.diff from 
https://openbios.org/roundup/linuxbios/issue24
- fix up for via epia-m



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2110 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-11-26 16:56:05 +00:00
Stefan Reinauer
af77a61a9c add another Via C3 cpu id reported by grzegorz@el-kom.pl 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-11-26 11:57:57 +00:00