Commit graph

2822 commits

Author SHA1 Message Date
Angel Pons
a23aff3651 src: Report byte-sized access for GPE0
According to the ACPI specification, version 6.3:

    OSPM accesses GPE registers through byte
    accesses (regardless of their length).

So, reporting dword-sized access is wrong and means nothing anyway.

Tested on Asus P8Z77-V LX2, Windows 10 still boots.

Change-Id: I965131a28f1a385d065c95f286549665c3f9693e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42671
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-24 11:50:50 +00:00
Angel Pons
0623b01036 sb/intel/bd82x6x: Align mei_recv_msg() functions
They only differ in rather small details, so we can iron them out.

Tested on Asus P8Z77-V LX2, still boots.

Change-Id: I01907f1b8576e82c74b7beeea31ae8ee3e2cc773
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42010
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-24 11:50:12 +00:00
Kyösti Mälkki
c3c55210ee ACPI: Replace smm_setup_structures()
Except for whitespace and varying casts the codes were
the same when implemented.

Platforms that did not implement this are tagged with
ACPI_NO_SMI_GNVS.

Change-Id: I31ec85ebce03d0d472403806969f863e4ca03b6b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42362
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2020-06-24 11:49:15 +00:00
Kyösti Mälkki
5daa1d3898 ACPI: Replace uses of CBMEM_ID_ACPI_GNVS
These are the simple cbmem_find() cases. Also drop the redundant
error messages.

Change-Id: I78e5445eb09c322ff94fe4f65345eb2997bd10ef
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42361
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-06-24 11:48:38 +00:00
Angel Pons
013711b533 sb/intel/i82801ix/fadt.c: Use acpi.h definitions
Tested with BUILD_TIMELESS=1, Roda RK9 remains identical.

Change-Id: I284eec23a8804f7bb18d2ef493c1200c197c109e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42668
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2020-06-22 14:49:49 +00:00
Angel Pons
aaa8ab7ac3 sb/intel/i82801{ix,jx}/hdaudio.c: Use Azalia in printk
For some reason, one printk statement begins with `HD Audio` instead of
the more common `Azalia`. Change the different prefix for consistency.

Change-Id: Ia79e340f331b9186cc09b04f925ff9d94204955e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42642
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
2020-06-22 14:49:24 +00:00
Angel Pons
98a8b441e5 sb/intel/i82801{gx,ix,jx}/hdaudio.c: Drop unused typedef
Tested with BUILD_TIMELESS=1, Roda RK9 does not change.

Change-Id: I9967d625a8e6d2e1063b9b38965d81a466738964
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42636
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-06-22 14:49:09 +00:00
Angel Pons
7a2864b421 sb/intel/i82801jx/hdaudio.c: Align with i82801ix
The code is pretty much the same, only differing in a comment and a
printk statement.

Change-Id: Ic404ef466636fc05c2baa70aad8a39bb1b458d42
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42635
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2020-06-22 14:48:57 +00:00
Angel Pons
c9d6333ab6 sb/intel/i82801ix/hdaudio.c: Clean up cosmetics
Reflow some comments and add spaces around an operator.

Tested with BUILD_TIMELESS=1, Roda RK9 does not change.

Change-Id: I655d74ecbefa664d79b1af805f92cbcf877a43ac
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42641
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2020-06-22 14:48:20 +00:00
Angel Pons
3bff419824 sb/intel/i82801ix/early_init.c: Reorder functions
Both i82801gx and i82801jx start with the LPC setup function. For some
reason this isn't reproducible, but it should not effect functionality.

Change-Id: I9d26a151757d60e56ed70181ff7aef48e229d322
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42634
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2020-06-22 14:47:54 +00:00
Angel Pons
9f75f68978 sb/intel/i82801ix: Rename i82801ix_lpc_decode()
For consistency with other Intel southbridges, we rename this function
to `i82801ix_lpc_setup`.

Tested with BUILD_TIMELESS=1, Roda RK9 does not change.

Change-Id: Id8b3bcc9174277e085868866a1b5d90b5c51201a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42633
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2020-06-22 14:47:37 +00:00
Angel Pons
9b43b89296 sb/intel/i82801{ix,jx}: Correct include guards
These southbridges are not i82801gx.

Tested with BUILD_TIMELESS=1, Roda RK9 does not change.

Change-Id: I6b4c7bc11bcb668adb0aae463defea982cf9059c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42632
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2020-06-22 14:47:12 +00:00
Elyes HAOUAS
8d9a6f1625 sb/intel/i82801gx: Constify struct southbridge_intel_i82801gx_config
Change-Id: Ia5af84782d41a007be04c3dccc291b788ddfddfd
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40773
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-22 11:54:08 +00:00
Kyösti Mälkki
1a1b04ea51 device/smbus_host: Declare common early SMBus prototypes
Change-Id: I1157cf391178a27db437d1d08ef5cb9333e976d0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38233
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-06-22 11:53:31 +00:00
Kyösti Mälkki
c4ef8e4c2b sb/intel/i82801dx: Drop APM_CNT_GNVS_UPDATE
In commit 96cb252 the accompanying implementation
of smm_setup_structures() was already dropped.

Change-Id: I9cff0cbaa85cf771cc7761b6c5286ec34a76ee9a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42425
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-22 11:46:06 +00:00
Kyösti Mälkki
b486f29a44 cpu/x86/smm: Define APM_CNT_ROUTE_ALL_XHCI
Change-Id: I0bc321f499278e0cdbfb40be9a2b2ae21828d2f4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42619
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-06-22 11:45:41 +00:00
Kyösti Mälkki
933f90147b sb/intel/lynxpoint: Drop stale code paths
These appear to be leftovers from old SMM relocation code.

Change-Id: I689bee55943b29990f54cb798b999940eae180bc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42618
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-06-22 11:45:28 +00:00
Kyösti Mälkki
d15183144a cpu/x86/smm: Define APM_CNT_NOOP_SMI
Old (!PARALLEL_MP) cpu bringup uses this as the first
control to do SMM relocation.

Change-Id: I4241120b00fac77f0491d37f05ba17763db1254e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42617
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-06-22 11:44:45 +00:00
Angel Pons
08e8cab578 src: Substitute __FUNCTION__ with __func__
The former is not standard C, and we primarily use the latter form.

Change-Id: Ia7091b494ff72588fb6910710fd72165693c1ac5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42516
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
2020-06-21 09:24:42 +00:00
Patrick Georgi
b8fba86b14 Kconfig: Escape variable to accommodate new Kconfig versions
Kconfig 4.17 started using the $(..) syntax for environment variable
expansion while we want to keep expansion to the build system.
Older Kconfig versions (like ours) simply drop the escapes, not
changing the behavior.

While we could let Kconfig expand some of the variables, that only
splits the handling in two places, making debugging harder and
potentially messing with reproducible builds (e.g. when paths end up
in configs), so escape them all.

Change-Id: Ibc4087fdd76089352bd8dd0edb1351ec79ea4faa
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42481
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
2020-06-19 15:29:04 +00:00
Kyösti Mälkki
7e75f33de5 sb/intel/common/pmutil: Add dump_all_status()
Change-Id: I10582941afd68425603f6c4cadd228797cd098e9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42360
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-06-16 10:19:35 +00:00
Kyösti Mälkki
96cb2522fd sb/intel/i82801dx: Drop smm_setup_structures()
The only board that builds this does not have ACPI S3 support.
Also the code is wrong.

Change-Id: Ifb8e0ae5b6d862fa6a52b8e08197a84e7da4be36
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42357
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-06-16 08:05:02 +00:00
Kyösti Mälkki
b264c5ce10 sb/amd/x/hudson: Replace hudson_enable_smi_generation()
Change-Id: I08b2d1af16c247e66bf1a352887b0f9387055225
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42356
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-06-16 08:04:27 +00:00
Kyösti Mälkki
0778c86b3b sb,soc/intel: Replace smm_southbridge_enable_smi()
Change-Id: I8a2e8b0c104d9e08f07aeb6a2c32106480ace3e5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41961
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-06-16 08:04:09 +00:00
Kyösti Mälkki
ad882c3b17 sb/intel: Remove spurious HAVE_SMI_HANDLER test
There are no side-effects in calling acpi_is_wakeup_s3()
and apm_control() is a no-op with HAVE_SMI_HANDLER=n.

Change-Id: Ia9195781955cc5fa96d0690aa7735fc590e527e4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41986
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-16 08:02:54 +00:00
Kyösti Mälkki
b6585481e8 arch/x86: Create helper for APM_CNT SMI triggers
Attempts to write to APM_CNT IO port should always be guarded
with a test to verify SMI handler has been installed.

Immediate followup removes redundant HAVE_SMI_HANDLER tests.

Change-Id: If3fb0f1a8b32076f1d9f3fea9f817dd4b093ad98
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41971
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-16 08:02:18 +00:00
Kyösti Mälkki
9446447475 sb/intel: Clean up some SMI enables
Change-Id: I191ad709fd3c6f906cd34b0053eeaebdb80d410d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42354
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-06-16 08:01:55 +00:00
Alexey Buyanov
2232e89065 southbridge/intel/common: Introduce ASL2.0 syntax
Modify southbridge/intel/common .asl files to comply with ASL2.0 syntax for
better code readability and clarity

BUG=none
BRANCH=none
TEST= Google Parrot platform coreboot binary remains the same after the changes are applied

Signed-off-by: Alexey Buyanov <alexey.buyanov@intel.com>
Change-Id: Ia11769d5ac6154ed79d967d7bab36e12a1db751a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42084
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-14 16:55:02 +00:00
Kyösti Mälkki
ba5a951a93 sb/intel/i82801ix: Fix SPDX license header
Change-Id: I4c8ef49f86f6d5344741ab92035e108cccfe30b1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42294
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-06-14 14:09:34 +00:00
Angel Pons
6740647cfd sb/intel/i82801ix: Use PCI bitwise ops
Tested with BUILD_TIMELESS=1, Roda RK9 does not change.

Change-Id: Ie05f484cf4b346601e6128c95ff2b27ce59b995f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42188
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-12 01:10:17 +00:00
Angel Pons
2048cb4386 sb/intel/i82801jx: Use PCI bitwise ops
Tested with BUILD_TIMELESS=1, Intel DG43GT does not change.

Change-Id: Ifd5b8cd7644811a56afae82468c8eb0a7b6b7ff9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42157
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-12 00:12:17 +00:00
Angel Pons
c803f65206 sb/intel/bd82x6x: Use PCI bitwise ops
Some cases could not be factored out while keeping reproducibility.
Also mark some potential bugs with a FIXME comment, since fixing them
while also keeping the binary unchanged is pretty much impossible.

Tested with BUILD_TIMELESS=1, Asus P8Z77-V LX2 does not change.

Change-Id: Iafe62d952a146bf53a28a1a83b87a3ae31f46720
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42152
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-06-10 18:48:32 +00:00
Angel Pons
7333ea91ea sb/intel/bd82x6x/pcie.c: Move pch_pcie_acpi_name up
The ASSERT() macro depends on the line number, so changing the line it
appears in breaks reproducibility testing using BUILD_TIMELESS=1.

Work around this problem by placing the `pch_pcie_acpi_name` function,
which contains this macro, at the beginning of the file. This allows
refactoring the rest of the code without affecting the ASSERT() macro.

Change-Id: I2e0432ec9ae6c7d033fc7495afb3a71fe7e77729
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42195
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-06-10 18:48:24 +00:00
Kyösti Mälkki
cfc3c358b2 ACPI: Remove Kconfig COMMON_FADT
Also remove default mb/*/fadt.c from Makefiles.

Change-Id: I6a2839c524f8311ec9a382a84066afc7d579eaca
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41948
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-10 12:53:08 +00:00
Kyösti Mälkki
56da63c3dc sb,soc/amd, ACPI: Do not override FADT preferred_pm_profile
Setting preferred_pm_profile under sb/ or soc/ overrides the
default determined from SYSTEM_TYPE_xx (or possibly
SMBIOS_ENCLOSURE_TYPE with followup work). This is not desireable.

With the overrides removed, AMD platforms will switch from
PM_UNSPECIFIED to PM_DESKTOP as their preferred profile.

Boards need to either select a pre-defined SYSTEM_TYPE_xx or provide
board-specific mainboard_fill_fadt() should they need to change this.

As they already select SYSTEM_TYPE_LAPTOP, following boards
will change to PM_MOBILE:

  google/kahlee
  hp/pavilion_m6_1035dx
  lenovo/g505s

Change-Id: I45c4a495a4bf3422adae9e22a6e436adef252e77
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42032
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-06-10 01:20:13 +00:00
Kyösti Mälkki
ab516294a5 sb/amd/agesa,cimx,pi: Select COMMON_FADT
Change-Id: Ib6a0f8a3beb3d02dfd90234b1af6eccd3cde21bb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41924
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-10 01:17:49 +00:00
Kyösti Mälkki
55c0c4bc86 mb,sb/amd/cimx/sb800: Remove FADT_PM_PROFILE
The platform_cfg.h files under mainboard/ are a legacy configuration
mechanism used with AGESA family14 boards.

With this change following boards will have FADT preferred_pm_profile
changed from PM_UNSPECIFIED to PM_DESKTOP:

  amd/inaqua
  amd/south_station
  amd/union_station
  asrock/e350m1

Change-Id: Ic28761eb238dbbaf3e8f820a29ec64b89f12bf53
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42031
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-06-10 01:08:24 +00:00
Kyösti Mälkki
4a09b97cad sb,soc/amd: Remove FADT_PM_PROFILE
This was copy-paste from fam14 configuration mechanism
using platform_cfg.h files.

Change-Id: I7fdd89a8b1fe9c7e558841e24fb832d0cffd3454
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42030
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-10 01:06:53 +00:00
Kyösti Mälkki
ba17829de4 sb/intel, ACPI: Do not override FADT preferred_pm_profile
Setting preferred_pm_profile under sb/ overrides the
default determined from SYSTEM_TYPE_xx (or possibly
SMBIOS_ENCLOSURE_TYPE with followup work). This is not desireable.

Boards need to either select a pre-defined SYSTEM_TYPE_xx or provide
board-specific mainboard_fill_fadt() should they need to change this.

As they already select SYSTEM_TYPE_LAPTOP, following boards
will maintain PM_MOBILE:

  lenovo/t400
  lenovo/x200
  roda/rk9

Following will change to PM_DESKTOP:

  aopen/dxplplusu
  asus/p2b
  emulation/qemu-i440fx
  emulation/qemu-q35

Change-Id: I2986eb0a8abc94507e9797cc8b64611ae4bd888a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42186
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-06-10 01:03:05 +00:00
Kyösti Mälkki
64e07ebde2 sb/intel/i82801ix: Select COMMON_FADT
Change-Id: Iffdce450b1d4c9984ec5efe11eff62bf9184e314
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41922
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-10 01:01:32 +00:00
Kyösti Mälkki
8ad52fff64 sb/intel/i82371eb: Select COMMON_FADT
Change-Id: I0b1f3e16b2a801e5fcf5f96d59922f6231d73636
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41925
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-10 01:00:54 +00:00
Kyösti Mälkki
df63ff8b55 aopen/dxplplusu,intel/i82801dx: Select COMMON_FADT
Move existing fadt.c file under southbridge.

Change-Id: Ie2fdc715e4d1af347d25b51e83189f28cd9af014
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41923
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-10 01:00:11 +00:00
Kyösti Mälkki
d4acee887e ACPI: Move redundant FADT reserved entry
Change-Id: I35f66cdad6b8bedf4337aa8e5af7b0f1b53fe674
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42033
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-09 17:53:50 +00:00
Nico Huber
e9e13d41e9 Revert "sb/amd/cimx/sb800: Fix 16-bit read/write PCI_COMMAND register"
This reverts commit 04506e2987.

Turned out that `dev->command` is only a `u8` and the way it's used
here is wrong: It is not supposed to reflect the state of the register
but only gathers (lower) bits to be enabled during allocation.

Change-Id: Iacd2b753939e8adcf5aedd4b9cf101638a324aa6
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42163
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-09 06:28:47 +00:00
Angel Pons
7f32df379c sb/intel/bd82x6x: Align some ME functions
This eliminates the differences in the first part of the file.

Change-Id: Ifb7d57da08e02664a28819e65bc8e9697ed38c4c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42009
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-07 21:48:22 +00:00
Angel Pons
1fc0edd9fe src: Use pci_dev_ops_pci where applicable
Change-Id: Ie004a94a49fc8f53c370412bee1c3e7eacbf8beb
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41944
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-06-06 20:36:51 +00:00
Elyes HAOUAS
abf51abe1d src: Remove unused '#include <cpu/x86/smm.h>'
Change-Id: I1632d03a7a73de3e3d3a83bf447480b0513873e7
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41685
Reviewed-by: David Guckian
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-06 09:40:38 +00:00
Elyes HAOUAS
04506e2987 sb/amd/cimx/sb800: Fix 16-bit read/write PCI_COMMAND register
Change-Id: I779387fb0c9d3ad6e16d4ccfc39c38dfe6620345
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40806
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-06-06 09:36:10 +00:00
Kyösti Mälkki
0a9e72e87e arch/x86: Declare permanent_smi_handler()
Advertising SMI triggers in FADT is only valid if we exit with
SMI installed. There has been some experiments to delay SMM
installation to OS, yet there are new platforms that allow some
configuration access only to be done inside SMM.

Splitting static HAVE_SMI_HANDLER variable helps to manage cases
where SMM might be both installed and cleared prior to entering
payload.

Change-Id: Iad92c4a180524e15199633693446a087787ad3a2
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41910
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-06-06 09:24:44 +00:00
Kyösti Mälkki
c328a680de soc,southbridge/intel: Control SMI related FADT entries
When no SMI is installed, FADT should not advertise a trigger
mechanism that does not respond.

Change-Id: Ifb4f99c11a72e75ec20b9faaf62aed5546de91fa
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41909
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-06 09:24:11 +00:00